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    • 4. 发明授权
    • Parallel operation system of transmission amplifier
    • 传输放大器并联运行系统
    • US07254377B2
    • 2007-08-07
    • US10015369
    • 2001-12-12
    • Satoshi MaruyamaOsamu MitaYasuyuki OishiTokuro KuboNorio TozawaFumihiko Kobayashi
    • Satoshi MaruyamaOsamu MitaYasuyuki OishiTokuro KuboNorio TozawaFumihiko Kobayashi
    • H04B1/04
    • H03F3/602H03F1/3241H03F1/3247H04B1/0483H04B2001/0425
    • A parallel operation system of transmission amplifiers enable the parallel running by the two distortion compensation amplifiers using the digital pre-distorter system and to provide a parallel operation system of the transmission amplifiers that makes it possible to switch to respective single running easily. The parallel operation system includes first and second transmission amplifiers which receive common input signals for outputting amplified signals from respective ones; and a coupling unit which combines outputs of the first and second transmission amplifiers, to provide as its output; the first and second transmission amplifiers each having a main amplifier; and a modulation unit disposed on the input side of the main amplifier; wherein the output of one of the modulation units included in the first and second transmission amplifiers is fed in common to the main amplifiers included in the first and second transmission amplifiers.
    • 传输放大器的并行操作系统使得能够通过使用数字预失真器系统的两个失真补偿放大器的并行运行,并且提供可以容易地切换到相应的单个运行的发送放大器的并行操作系统。 并行操作系统包括第一和第二发送放大器,其接收用于从相应输入信号输出放大信号的公共输入信号; 以及耦合单元,其组合第一和第二发送放大器的输出,以提供其输出; 第一和第二发送放大器各自具有主放大器; 以及调制单元,设置在所述主放大器的输入侧; 其中包括在第一和第二发送放大器中的调制单元之一的输出被共同馈送到包括在第一和第二发送放大器中的主放大器。
    • 5. 发明授权
    • Feed-forward amplifying device and base station with feed-forward
amplifying device
    • 前馈放大装置和具有前馈放大装置的基站
    • US5757231A
    • 1998-05-26
    • US661386
    • 1996-06-11
    • Norio Tozawa
    • Norio Tozawa
    • H03F1/32H03F3/193H04J1/00
    • H03F3/1935H03F1/3229
    • The present invention relates to a feed-forward amplifying device suitable for radio communications systems such as digital automobile telephones. The feed-forward amplifying device includes a distortion extracting loop circuit unit unit including a main amplifier which amplifies a main signal in a main signal system, the main amplifier having a first transistor and a first matching circuit arranged to at least one of the input side and the output side of the first transistor, the distortion extracting loop circuit unit generating a distortion extracted signal obtained by canceling a main signal component of an output from the main amplifier; and a distortion removing loop circuit unit including an auxiliary amplifier, with a passage delay time shorter than that of the main amplifier, which amplifies the distortion extracting signal from the distortion extracting loop circuit unit, the auxiliary amplifier including a second transistor with an output smaller than that of the first transistor and a second matching circuit arranged to at least one of the input side and the output side of the second transistor, the distortion removing loop circuit unit outputting only the main signal component from a signal in the main signal system at the rear stage of the main amplifier using the distortion extracted signal amplified by the auxiliary amplifier. The object of the invention is to improve the signal processing speed at a small power consumption and to realize a small, high-power feed-forward amplifying device.
    • 本发明涉及适用于诸如数字汽车电话的无线电通信系统的前馈放大装置。 前馈放大装置包括失真提取环路电路单元单元,该单元包括放大主信号系统中的主信号的主放大器,主放大器具有第一晶体管和第一匹配电路,该第一匹配电路布置在至少一个输入侧 和所述第一晶体管的输出侧,所述失真提取回路电路单元生成通过消除来自所述主放大器的输出的主信号分量而获得的失真提取信号; 以及失真消除环路电路单元,其包括具有比主放大器短的通过延迟时间的辅助放大器,其放大来自失真提取环路电路单元的失真提取信号,所述辅助放大器包括输出较小的第二晶体管 比第一晶体管和第二匹配电路布置在第二晶体管的输入侧和输出侧的至少一个上的失真消除循环电路单元仅从主信号系统中的信号仅输出主信号分量, 主放大器的后级使用由辅助放大器放大的失真提取信号。 本发明的目的是在小功率下提高信号处理速度并实现小型,大功率的前馈放大装置。
    • 6. 发明授权
    • FET gate bias circuit
    • FET栅极偏置电路
    • US5625323A
    • 1997-04-29
    • US544606
    • 1995-10-18
    • Norio Tozawa
    • Norio Tozawa
    • H03F3/60H03F1/30H03F1/52H03F3/193H03F3/34H03F3/16
    • H03F3/1935H03F1/306
    • An FET gate bias circuit having a Schottky barrier gate incorporated therein is provided which can prevent gate voltage variations and thus provide a high-performance, high-reliability GaAs FET amplifier. The FET gate bias circuit includes a PNP transistor having a collector connected to a negative power supply, an NPN transistor having a collector thereof grounded and an emitter connected to the emitter of the PNP transistor, a Schottky barrier gate FET having a source grounded and a gate connected to the node between the emitters of the PNP transistor and NPN transistor, and a base voltage applying circuit for applying predetermined base voltages to the respective bases of the PNP transistor and NPN transistor.
    • 提供了其中并入有肖特基势垒栅的FET栅极偏置电路,其可以防止栅极电压变化,从而提供高性能,高可靠性的GaAs FET放大器。 FET栅极偏置电路包括具有集电极连接到负电源的PNP晶体管,其集电极接地的NPN晶体管和连接到PNP晶体管的发射极的发射极,源极接地的肖特基势垒栅极和 连接到PNP晶体管和NPN晶体管的发射极之间的节点的栅极,以及用于将预定的基极电压施加到PNP晶体管和NPN晶体管的各个基极的基极电压施加电路。
    • 7. 发明授权
    • Microstrip which is able to supply DC bias current
    • 能够提供直流偏置电流的微带线
    • US5493263A
    • 1996-02-20
    • US27153
    • 1993-03-18
    • Norio Tozawa
    • Norio Tozawa
    • H01P3/08H05K1/02H05K3/24H05K3/40
    • H01P3/081H05K1/0265H05K1/0237H05K2201/098H05K2201/1028H05K3/244H05K3/4015
    • Provided is a microstrip line that permits a large current flow while maintaining a high characteristic impedance. The microstrip line, comprising a dielectric substrate (10), a grounded conductor (12), and a conducting strip (14), includes an upper conductor (16) formed substantially along the centerline of the conducting strip (14) and having a vertically elongated cross section such that a width w1 of a base (16a) of the cross section is smaller than the width W of the conducting strip (14), while a width w2 of a portion extending from the base (16a) to its opposing side (16b) is substantially equal to the width w1 of the base (16a) or gradually increases toward an upper portion. The upper conductor (16) having such cross section is formed by heat bonding a gold, silver, or copper wire, etched into a desired cross section, onto the conducting strip (14), or by depositing gold, silver, or copper by plating onto the conducting strip.
    • PCT No.PCT / JP92 / 00913 Sec。 371日期1993年3月18日 102(e)1993年3月18日PCT PCT 1992年7月17日PCT公布。 公开号WO93 / 02485 日期为1993年4月2日。提供了一种微带线,其允许大电流流动同时保持高特性阻抗。 包括电介质基板(10),接地导体(12)和导电条(14)的微带线包括基本上沿着导电条(14)的中心线形成的上导体(16),并且具有垂直 细长的横截面使得横截面的基部(16a)的宽度w1小于导电条(14)的宽度W,而从基部(16a)延伸到其相对侧的部分的宽度w2 (16b)基本上等于基座(16a)的宽度w1或朝向上部逐渐增大。 具有这种横截面的上导体(16)通过将金,银或铜线(被蚀刻成所需的横截面)热粘合到导电条(14)上,或者通过电镀沉积金,银或铜而形成 到导电条上。