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1. 发明申请

US20130109157A1 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20130109157A1
公开(公告)日：2013-05-02
申请号：US13723601
申请日：2012-12-21
申请人： Masaru KITO , Yoshiaki FUKUZUMI , Masaru KIDOH , Megumi ISHIDUKI , Yosuke KOMORI , Hiroyasu TANAKA , Ryota KATSUMATA , Hideaki AOCHI
发明人： Masaru KITO , Yoshiaki FUKUZUMI , Masaru KIDOH , Megumi ISHIDUKI , Yosuke KOMORI , Hiroyasu TANAKA , Ryota KATSUMATA , Hideaki AOCHI
IPC分类号： H01L29/792
CPC分类号： H01L29/7926 , H01L27/0688 , H01L27/11551 , H01L27/11556 , H01L29/7881
摘要： A non-volatile semiconductor storage device includes a plurality of memory strings each having a plurality of electrically rewritable memory cells connected in series. Each of the memory strings comprising: a first semiconductor layer including a columnar portion extending in a vertical direction with respect to a substrate; a plurality of first conductive layers formed to surround side surfaces of the columnar portions via insulation layers, and formed at a certain pitch in the vertical direction, the first conductive layers functioning as floating gates of the memory cells; and a plurality of second conductive layers formed to surround the first conductive layers via insulation layers, and functioning as control electrodes of the memory cells. Each of the first conductive layers has a length in the vertical direction that is shorter than a length in the vertical direction of each of the second conductive layers.
摘要翻译：非挥发性半导体存储装置包括多个存储串，每个存储串具有串联连接的多个电可重写存储单元。每个存储器串包括：第一半导体层，包括相对于衬底在垂直方向上延伸的柱状部分; 多个第一导电层，经由绝缘层形成为围绕柱状部分的侧表面，并以垂直方向上的一定间距形成，第一导电层用作存储器单元的浮动栅极; 以及形成为经由绝缘层包围第一导电层并且用作存储单元的控制电极的多个第二导电层。每个第一导电层在垂直方向上具有比每个第二导电层的垂直方向上的长度短的长度。

2. 发明申请

US20120135593A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20120135593A1
公开(公告)日：2012-05-31
申请号：US13366509
申请日：2012-02-06
申请人： Masaru KITO , Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KIDOH , Hiroyasu TANAKA , Megumi ISHIDUKI , Yosuke KOMORI , Hideaki AOCHI
发明人： Masaru KITO , Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KIDOH , Hiroyasu TANAKA , Megumi ISHIDUKI , Yosuke KOMORI , Hideaki AOCHI
IPC分类号： H01L21/336
CPC分类号： H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/792 , H01L29/7926
摘要： A nonvolatile semiconductor memory device includes a plurality of memory strings, each of which has a plurality of electrically rewritable memory cells connected in series; and select transistors, one of which is connected to each of ends of each of the memory strings. Each of the memory strings is provided with a first semiconductor layer having a pair of columnar portions extending in a perpendicular direction with respect to a substrate, and a joining portion formed so as to join lower ends of the pair of columnar portions; a charge storage layer formed so as to surround a side surface of the columnar portions; and a first conductive layer formed so as to surround the side surface of the columnar portions and the charge storage layer, and configured to function as a control electrode of the memory cells. Each of the select transistors is provided with a second semiconductor layer extending upwardly from an upper surface of the columnar portions; and a second conductive layer formed so as to surround a side surface of the second semiconductor layer with a gap interposed, and configured to function as a control electrode of the select transistors.
摘要翻译：非易失性半导体存储器件包括多个存储串，每个存储串具有串联连接的多个电可重写存储单元; 并选择晶体管，其中一个连接到每个存储器串的每一端。每个存储器串都具有第一半导体层，该第一半导体层具有相对于基板在垂直方向上延伸的一对柱状部分，以及形成为连接该一对柱状部分的下端的接合部分; 形成为围绕所述柱状部的侧面的电荷存储层; 以及形成为围绕柱状部分的侧面和电荷存储层的第一导电层，并且被配置为用作存储单元的控制电极。每个选择晶体管设置有从柱状部分的上表面向上延伸的第二半导体层; 以及第二导电层，其被形成为以间隔开的方式围绕所述第二半导体层的侧表面，并且被配置为用作所述选择晶体管的控制电极。

3. 发明申请

US20100072538A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100072538A1
公开(公告)日：2010-03-25
申请号：US12534576
申请日：2009-08-03
申请人： Masaru KITO , Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KIDOH , Hiroyasu TANAKA , Megumi ISHIDUKI , Yosuke KOMORI , Hideaki AOCHI
发明人： Masaru KITO , Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KIDOH , Hiroyasu TANAKA , Megumi ISHIDUKI , Yosuke KOMORI , Hideaki AOCHI
IPC分类号： H01L27/115 , H01L21/8246
CPC分类号： H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/792 , H01L29/7926
摘要： A nonvolatile semiconductor memory device includes a plurality of memory strings, each of which has a plurality of electrically rewritable memory cells connected in series; and select transistors, one of which is connected to each of ends of each of the memory strings. Each of the memory strings is provided with a first semiconductor layer having a pair of columnar portions extending in a perpendicular direction with respect to a substrate, and a joining portion formed so as to join lower ends of the pair of columnar portions; a charge storage layer formed so as to surround a side surface of the columnar portions; and a first conductive layer formed so as to surround the side surface of the columnar portions and the charge storage layer, and configured to function as a control electrode of the memory cells. Each of the select transistors is provided with a second semiconductor layer extending upwardly from an upper surface of the columnar portions; and a second conductive layer formed so as to surround a side surface of the second semiconductor layer with a gap interposed, and configured to function as a control electrode of the select transistors.
摘要翻译：非易失性半导体存储器件包括多个存储串，每个存储串具有串联连接的多个电可重写存储单元; 并选择晶体管，其中一个连接到每个存储器串的每一端。每个存储器串都具有第一半导体层，该第一半导体层具有相对于基板在垂直方向上延伸的一对柱状部分，以及形成为连接该一对柱状部分的下端的接合部分; 形成为围绕所述柱状部的侧面的电荷存储层; 以及形成为围绕柱状部分的侧面和电荷存储层的第一导电层，并且被配置为用作存储单元的控制电极。每个选择晶体管设置有从柱状部分的上表面向上延伸的第二半导体层; 以及第二导电层，其被形成为以间隔开的方式围绕所述第二半导体层的侧表面，并且被配置为用作所述选择晶体管的控制电极。

4. 发明申请

US20120064683A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20120064683A1
公开(公告)日：2012-03-15
申请号：US13301442
申请日：2011-11-21
申请人： Megumi ISHIDUKI , Ryota KATSUMATA , Masaru KIDOH , Hiroyasu TANAKA , Yosuke KOMORI , Masaru KITO , Yoshiaki FUKUZUMI , Hideaki AOCHI
发明人： Megumi ISHIDUKI , Ryota KATSUMATA , Masaru KIDOH , Hiroyasu TANAKA , Yosuke KOMORI , Masaru KITO , Yoshiaki FUKUZUMI , Hideaki AOCHI
IPC分类号： H01L21/336
CPC分类号： H01L27/11578 , H01L27/11565 , H01L27/11582 , H01L29/792 , H01L29/7926
摘要： A multilayer body is formed by alternately stacking electrode films serving as control gates and dielectric films in a direction orthogonal to an upper surface of a silicon substrate. Trenches extending in the word line direction are formed in the multilayer body and a memory film is formed on an inner surface of the trench. Subsequently, a silicon body is buried inside the trench, and a charge storage film and the silicon body are divided in the word line direction to form silicon pillars. This simplifies the configuration of memory cells in the bit line direction, and hence can shorten the arrangement pitch of the silicon pillars, decreasing the area per memory cell.
摘要翻译：通过在与硅衬底的上表面正交的方向上交替堆叠用作控制栅极和电介质膜的电极膜来形成多层体。在多层体中形成在字线方向上延伸的沟槽，并且在沟槽的内表面上形成记忆膜。随后，将硅体埋在沟槽内，并且电荷存储膜和硅体在字线方向上分开以形成硅柱。这简化了位线方向上的存储单元的配置，因此可以缩短硅柱的排列间距，减小每个存储单元的面积。

5. 发明申请

US20100207194A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20100207194A1
公开(公告)日：2010-08-19
申请号：US12706127
申请日：2010-02-16
申请人： Hiroyasu TANAKA , Hideaki AOCHI , Ryota KATSUMATA , Masaru KIDOH , Masaru KITO , Yoshiaki FUKUZUMI , Yosuke KOMORI , Megumi ISHIDUKI , Tomoko FUJIWARA , Junya MATSUNAMI , Ryouhei KIRISAWA
发明人： Hiroyasu TANAKA , Hideaki AOCHI , Ryota KATSUMATA , Masaru KIDOH , Masaru KITO , Yoshiaki FUKUZUMI , Yosuke KOMORI , Megumi ISHIDUKI , Tomoko FUJIWARA , Junya MATSUNAMI , Ryouhei KIRISAWA
IPC分类号： H01L27/115 , H01L21/8246
CPC分类号： H01L29/792 , H01L27/11578 , H01L27/11582 , H01L29/66833
摘要： A nonvolatile semiconductor memory device includes: a semiconductor substrate; a stacked body provided on the semiconductor substrate, the stacked body having electrode films and insulating films being alternately stacked; a first and second semiconductor pillars; and a first and second charge storage layers. The first and second semiconductor pillars are provided inside a through hole penetrating through the stacked body in a stacking direction of the stacked body. The through hole has a cross section of an oblate circle, when cutting in a direction perpendicular to the stacking direction. The first and second semiconductor pillars face each other in a major axis direction of the first oblate circle. The first and second semiconductor pillars extend in the stacking direction. The first and second charge storage layers are provided between the electrode film and the first and second semiconductor pillars, respectively.
摘要翻译：非易失性半导体存储器件包括：半导体衬底; 设置在所述半导体基板上的层叠体，具有交替堆叠的电极膜和绝缘膜的层叠体，第一和第二半导体柱; 以及第一和第二电荷存储层。第一半导体柱和第二半导体柱设置在层叠体的层叠方向上贯穿层叠体的贯通孔内。当沿垂直于堆叠方向的方向切割时，通孔具有扁圆形的横截面。第一和第二半导体柱在第一扁圆的长轴方向上彼此面对。第一和第二半导体柱沿层叠方向延伸。第一和第二电荷存储层分别设置在电极膜和第一和第二半导体柱之间。

6. 发明申请

US20100038703A1 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE 有权
标题翻译：非挥发性半导体存储器件
公开(公告)号：US20100038703A1
公开(公告)日：2010-02-18
申请号：US12501142
申请日：2009-07-10
申请人： Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KITO , Masaru KIDOH , Hiroyasu TANAKA , Megumi ISHIDUKI , Yosuke KOMORI , Hideaki AOCHI
发明人： Yoshiaki FUKUZUMI , Ryota KATSUMATA , Masaru KITO , Masaru KIDOH , Hiroyasu TANAKA , Megumi ISHIDUKI , Yosuke KOMORI , Hideaki AOCHI
IPC分类号： H01L29/792 , H01L27/112
CPC分类号： H01L29/792 , G11C5/02 , G11C5/025 , G11C5/063 , G11C8/14 , G11C16/0483 , H01L27/11565 , H01L27/11578 , H01L27/11582 , H01L29/42348 , H01L29/7926
摘要： A memory string has a semiconductor layer with a joining portion that is formed to join a plurality of columnar portions extending in a vertical direction with respect to a substrate and lower ends of the plurality of columnar portions. First conductive layers are formed in a laminated fashion to surround side surfaces of the columnar portions and an electric charge storage layer, and function as control electrodes of memory cells. A second conductive layer is formed around the plurality of columnar portions via a gate insulation film, and functions as control electrodes of selection transistors. Bit lines are formed to be connected to the plurality of columnar portions, respectively, with a second direction orthogonal to a first direction taken as a longitudinal direction.
摘要翻译：存储器串具有半导体层，其具有接合部分，该接合部分形成为连接相对于衬底在垂直方向上延伸的多个柱状部分和多个柱状部分的下端。第一导电层以叠层的方式形成以包围柱状部分的侧表面和电荷存储层，并且用作存储单元的控制电极。通过栅极绝缘膜在多个柱状部分周围形成第二导电层，并且用作选择晶体管的控制电极。位线分别形成为与第一方向正交的第二方向作为纵向连接到多个柱状部分。

7. 发明申请

US20100327339A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100327339A1
公开(公告)日：2010-12-30
申请号：US12728727
申请日：2010-03-22
申请人： Hiroyasu TANAKA , Ryota Katsumata , Hideaki Aochi , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Yosuke Komori , Megumi Ishiduki , Junya Matsunami , Tomoko Fujiwara , Ryouhei Kirisawa , Yoshimasa Mikajiri , Shigeto Oota
发明人： Hiroyasu TANAKA , Ryota Katsumata , Hideaki Aochi , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Yosuke Komori , Megumi Ishiduki , Junya Matsunami , Tomoko Fujiwara , Ryouhei Kirisawa , Yoshimasa Mikajiri , Shigeto Oota
IPC分类号： H01L27/115 , H01L21/8246
CPC分类号： H01L27/11578 , H01L27/11573 , H01L27/11575 , H01L27/11582
摘要： A semiconductor memory device provided with a cell array section and a peripheral circuit section, the device includes: a back gate electrode; a stacked body provided on the back gate electrode; a plurality of semiconductor pillars extending in a stacking direction; connection members, each of the connection members connecting one of the semiconductor pillars to another one of the semiconductor pillars; a back-gate electrode contact applying a potential to the back gate electrode; a gate electrode provided in the peripheral circuit section; and a gate electrode contact applying a potential to the gate electrode, the back gate electrode and the gate electrode respectively including: a lower semiconductor layer; a conductive layer provided on the lower semiconductor layer; and an upper semiconductor layer provided on the conductive layer, the connection members being provided in or on the upper semiconductor layer, the back-gate electrode contact and the gate electrode contact being in contact with the conductive layer.
摘要翻译：一种设置有单元阵列部分和外围电路部分的半导体存储器件，该器件包括：背栅电极; 设置在所述背栅电极上的层叠体; 沿层叠方向延伸的多个半导体柱; 连接构件，每个连接构件将半导体柱之一连接到另一个半导体柱; 向所述背栅电极施加电位的背栅极电极接触; 设置在所述外围电路部中的栅电极; 以及向所述栅电极，所述背栅电极和所述栅电极施加电位的栅电极接触部，分别包括：下半导体层; 设置在下半导体层上的导电层; 以及设置在所述导电层上的上半导体层，所述连接构件设置在所述上半导体层中或所述上半导体层上，所述背栅电极接触和所述栅电极接触与所述导电层接触。

8. 发明申请

US20100244186A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100244186A1
公开(公告)日：2010-09-30
申请号：US12722920
申请日：2010-03-12
申请人： Ryota KATSUMATA , Masaru KITO , Yoshiaki FUKUZUMI , Masaru KIDOH , Hiroyasu TANAKA , Yosuke KOMORI , Megumi ISHIDUKI , Hideaki AOCHI , Ryouhei KIRISAWA , Junya MATSUNAMI , Tomoko FUJIWARA
发明人： Ryota KATSUMATA , Masaru KITO , Yoshiaki FUKUZUMI , Masaru KIDOH , Hiroyasu TANAKA , Yosuke KOMORI , Megumi ISHIDUKI , Hideaki AOCHI , Ryouhei KIRISAWA , Junya MATSUNAMI , Tomoko FUJIWARA
IPC分类号： H01L27/10 , H01L21/822 , G11C17/16
CPC分类号： H01L27/1021 , H01L23/5252 , H01L27/0207 , H01L27/101 , H01L27/112 , H01L27/11206 , H01L2924/0002 , H01L2924/00
摘要： A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of stacked component units stacked in a first direction, each of the stacked component units including a first conducting film made of a semiconductor of a first conductivity type provided perpendicular to the first direction and a first insulating film stacked in the first direction with the first conducting film; a semiconductor pillar piercing the stacked structural unit in the first direction and including a conducting region of a second conductivity type, the semiconductor pillar including a first region opposing each of the first conducting films, and a second region provided between the first regions with respect to the first direction, the second region having a resistance different from a resistance of the first region; and a second insulating film provided between the semiconductor pillar and the first conducting film.
摘要翻译：一种非易失性半导体存储器件，包括：堆叠结构单元，包括沿第一方向堆叠的多个堆叠的元件单元，每个堆叠元件单元包括由垂直于第一元件垂直设置的第一导电类型的半导体制成的第一导电膜方向和与第一导电膜在第一方向上堆叠的第一绝缘膜; 所述半导体柱在所述第一方向上穿透所述层叠结构单元，并且包括第二导电类型的导电区域，所述半导体柱包括与所述第一导电膜相对的第一区域，以及设置在所述第一区域之间的第二区域，所述第一方向，所述第二区域具有与所述第一区域的电阻不同的电阻; 以及设置在所述半导体柱和所述第一导电膜之间的第二绝缘膜。

9. 发明申请

US20100117047A1 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20100117047A1
公开(公告)日：2010-05-13
申请号：US12562402
申请日：2009-09-18
申请人： Hiroyasu TANAKA , Masaru KIDOH , Ryota KATSUMATA , Masaru KITO , Yosuke KOMORI , Megumi ISHIDUKI , Hideaki AOCHI , Yoshiaki FUKUZUMI
发明人： Hiroyasu TANAKA , Masaru KIDOH , Ryota KATSUMATA , Masaru KITO , Yosuke KOMORI , Megumi ISHIDUKI , Hideaki AOCHI , Yoshiaki FUKUZUMI
IPC分类号： H01L45/00 , H01L21/18
CPC分类号： H01L27/115 , G11C13/003 , G11C2213/33 , G11C2213/34 , G11C2213/71 , G11C2213/72 , G11C2213/78 , H01L27/0203 , H01L27/101 , H01L27/1021 , H01L27/2409 , H01L27/2454 , H01L27/249 , H01L45/04 , H01L45/1226 , H01L45/145
摘要： A non-volatile semiconductor storage device includes a plurality of memory element groups, each of the memory element groups having a plurality of memory elements, each of the memory elements having a resistance-change element and a Schottky diode connected in series. Each of the memory element groups includes: a first columnar layer extending in a lamination direction; a first insulation layer formed on a side surface of the first columnar layer and functioning as the resistance-change element; and a first conductive layer formed to surround the first columnar layer via the first insulation layer. The first conductive layer is formed of metal. The first columnar layer is formed of a semiconductor having such a impurity concentration that the first conductive layer and the semiconductor configure the Schottky diode.
摘要翻译：非挥发性半导体存储装置包括多个存储元件组，每个存储元件组具有多个存储元件，每个存储元件具有串联连接的电阻变化元件和肖特基二极管。每个存储元件组包括：沿层叠方向延伸的第一柱状层; 第一绝缘层，形成在第一柱状层的侧表面上并用作电阻变化元件; 以及经由所述第一绝缘层包围所述第一柱状层的第一导电层。第一导电层由金属形成。第一柱状层由具有第一导电层和半导体构成肖特基二极管的杂质浓度的半导体形成。

10. 发明申请

US20100109071A1 SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：半导体存储器件
公开(公告)号：US20100109071A1
公开(公告)日：2010-05-06
申请号：US12562781
申请日：2009-09-18
申请人： Hiroyasu TANAKA , Masaru Kidoh , Ryota Katsumata , Masaru Kito , Yosuke Komori , Megumi Ishiduki , Hideaki Aochi , Yoshiaki Fukuzumi
发明人： Hiroyasu TANAKA , Masaru Kidoh , Ryota Katsumata , Masaru Kito , Yosuke Komori , Megumi Ishiduki , Hideaki Aochi , Yoshiaki Fukuzumi
IPC分类号： H01L29/792
CPC分类号： H01L27/11578 , H01L27/11582
摘要： A semiconductor memory device includes: a semiconductor substrate; a stacked body with a plurality of conductive layers and a plurality of dielectric layers alternately stacked, the stacked body being provided on the semiconductor substrate; a semiconductor layer provided inside a hole formed through the stacked body, the semiconductor layer extending in stacking direction of the conductive layers and the dielectric layers; and a charge storage layer provided between the conductive layers and the semiconductor layer. The stacked body in a memory cell array region including a plurality of memory strings is divided into a plurality of blocks by slits with an interlayer dielectric film buried therein, the memory string including as many memory cells series-connected in the stacking direction as the conductive layers, the memory cell including the conductive layer, the semiconductor layer, and the charge storage layer provided between the conductive layer and the semiconductor layer, and each of the block is surrounded by the slits formed in a closed pattern.
摘要翻译：半导体存储器件包括：半导体衬底; 具有交替堆叠的多个导电层和多个电介质层的层叠体，所述层叠体设置在所述半导体基板上; 设置在通过所述层叠体形成的孔内的半导体层，所述半导体层沿所述导电层和所述电介质层的堆叠方向延伸; 以及设置在导电层和半导体层之间的电荷存储层。包含多个存储器串的存储单元阵列区域中的堆叠体被埋置在其中的层间电介质膜的狭缝分成多个块，该存储串包括在堆叠方向上串联连接的存储单元作为导电存储单元包括导电层，半导体层和设置在导电层和半导体层之间的电荷存储层，并且每个块被形成为封闭图案的狭缝包围。

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