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    • 1. 发明授权
    • Signal processing apparatus for disc memory devices
    • 光盘存储装置的信号处理装置
    • US4764913A
    • 1988-08-16
    • US942713
    • 1986-12-17
    • Hiroshi SasakiTomio ChibaMitsuyasu KidoYoshio SatoAtsumi Watanabe
    • Hiroshi SasakiTomio ChibaMitsuyasu KidoYoshio SatoAtsumi Watanabe
    • G11B5/012G11B7/013G11B20/10
    • G11B7/24085G11B20/10G11B5/012
    • A disc is provided with the equal-interval pits along tracks, at which digital signals are recorded bit by bit. Such a disc is rotated at the constant angular velocity. A signal processing apparatus according to the present invention detects the linear velocity of the track which is at present followed by a pickup. The filtering of a source signal to be recorded and the analog-to-digital conversion of the filtered signal, in the signal processing for recording, are controlled and timed in accordance with the detected linear velocity. Further, the digital-to-analog conversion of a signal read out from the disc and the filtering of the converted signal, in the signal processing for reproducing, are also timed and controlled in response to the detected linear velocity. Thereby, a disc memory device having the large storage capacity and suited for the random access memory can be realized.
    • 光盘上设有沿轨道的等间隔凹坑,数字信号逐位记录。 这样的盘以恒定的角速度旋转。 根据本发明的信号处理设备检测当前跟踪拾取的轨道的线速度。 在记录的信号处理中对要记录的源信号的滤波和滤波信号的模数转换根据检测到的线速度被控制和定时。 此外,在用于再现的信号处理中,从盘读出的信号的数模转换和转换的信号的滤波也响应于检测到的线速度而被定时和控制。 因此,可以实现具有大存储容量并且适合随机存取存储器的盘存储器件。
    • 8. 发明授权
    • Protective relay
    • 保护继电器
    • US4562507A
    • 1985-12-31
    • US573137
    • 1984-01-23
    • Hiroyuki KudoAtsumi WatanabeHiroshi Sasaki
    • Hiroyuki KudoAtsumi WatanabeHiroshi Sasaki
    • H02H3/40H02H3/38H02H3/26
    • H02H3/382
    • A protective relay which hardly makes maloperation in itself regardless of mixing of low-order higher harmonics in its at least two sinusoidal input signals comprises a first and a second phase detection comparator generating two different-phase square signals indicative of the phase difference between the sinusoidal input signals, a first and a second timer receiving the square signals generated from the first and second phase detection comparators respectively and generating their output signals as a result of comparison between a first period of time and one of the periods or the period of presence or absence of the square signals, a third timer receiving the same square signal as that applied to the first timer and generating its output signal as a result of comparison between a second period of time and the other period or the period of absence or presence of the square signal, a fourth timer receiving the same square signal as that applied to the second timer and generating its output signal as a result of comparison between the second period of time and the other period or the period of absence or presence of the square signal, a first flip-flop set by the first timer and reset by the third timer, a second flip-flop set by the second timer and reset by the fourth timer, and a third flip-flop set and reset by an AND circuit and a NOR circuit respectively connected to the outputs of the first and second flip-flop.
    • 无论在其至少两个正弦输入信号中混合低次高次谐波,本身几乎不会发生误操作的保护继电器包括:第一和第二相位检测比较器,产生指示正弦波形之间的相位差的两个不同相位方波信号 输入信号,第一和第二定时器分别接收从第一和第二相位检测比较器产生的平方信号,并且作为第一时间段与存在的一个周期或周期之间的比较的结果产生其输出信号,或者 不存在平方信号,第三定时器接收与施加到第一定时器相同的平方信号,并且作为第二时间段与另一周期之间的比较的结果产生其输出信号,或者存在 接收与施加到第二定时器相同的平方信号并产生其第二定时器的第四定时器 作为第二时间段与另一个周期之间的比较结果或不存在或存在平方信号的周期的结果,由第一定时器设置并由第三定时器复位的第一触发器,第二触发器, 由第二定时器设置并由第四定时器复位,以及由AND电路和NOR电路设置和复位的第三触发器,该AND电路和NOR电路分别连接到第一和第二触发器的输出。
    • 9. 发明授权
    • Inverter control system
    • 变频器控制系统
    • US4028607A
    • 1977-06-07
    • US566091
    • 1975-04-08
    • Atsumi Watanabe
    • Atsumi Watanabe
    • H02M7/525H02M7/00
    • H02M7/525
    • An inverter in the D.C. power transmission is controlled by gate pulses which are synchronized with voltages of an A.C. system and whose interval is constant for respective arms of the inverter. Simultaneously therewith, in order to prevent the inverter from causing a commutation failure due to a fault in the A.C. system, a control voltage for making the gate pulses is corrected by the use of the lowest one of the phase voltages or line voltages of the A.C. system. The control voltage becomes greater as the phase voltage or the line voltage lowers more from a rated voltage. When the control voltage increases, the gate pulses are provided at a timing of a larger advanced control angle so as to maintain the extinction angle constant.
    • 直流输电中的逆变器通过与交流电系统的电压同步并且其逆变器各臂的间隔恒定的门脉冲来控制。 与此同时,为了防止逆变器由于交流系统的故障导致换向故障,通过使用AC中的最低相位电压或线电压来校正用于产生栅极脉冲的控制电压 系统。 当相电压或线电压从额定电压降低时,控制电压变大。 当控制电压增加时,栅极脉冲以较大的先进控制角度的定时被提供,以便保持消光角恒定。
    • 10. 发明授权
    • Gate controlling apparatus for a thyristor valve
    • 晶闸管阀门控制装置
    • US4100434A
    • 1978-07-11
    • US669751
    • 1976-03-24
    • Ryuji IyotaniAtsumi WatanabeHisao AmanoFumio Ogata
    • Ryuji IyotaniAtsumi WatanabeHisao AmanoFumio Ogata
    • H02M1/08H02M1/088H02M1/092H03K17/14
    • H02M1/092H02M1/088
    • A gate controlling apparatus for a thyristor valve including a plurality of series connected thyristors controlled by a narrow gate pulse. The apparatus includes means for judging whether the thyristor valve is to be in the conductive state or not, means for detecting a forward voltage across at least one of the thyristors in the thyristor valve, and an AND circuit for generating an output at a time when an AND condition between the respective outputs of the judging means and the forward voltage detector means is satisfied. The apparatus further includes means for detecting a period of inverse voltage across at least one of the thyristors in the thyristor valve. The forward and inverse voltages may be, respectively, detected by detecting the forward and inverse voltages of specified thyristors.
    • 一种用于晶闸管阀的门控制装置,包括由窄门脉冲控制的多个串联连接的晶闸管。 该装置包括用于判断晶闸管阀是否处于导通状态的装置,用于检测晶闸管阀中的至少一个晶闸管的正向电压的装置,以及用于产生输出的“与”电路, 满足判断装置和正向电压检测装置的各个输出之间的“与”条件。 该装置还包括用于检测跨越可控硅阀中的至少一个晶闸管的反向电压周期的装置。 分别通过检测指定晶闸管的正向和反向电压来检测正向和反向电压。