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1. 发明申请

US20070242682A1 INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, PROGRAM, AND RECORDING MEDIUM 失效
标题翻译：信息处理设备，信息处理方法，程序和记录介质
公开(公告)号：US20070242682A1
公开(公告)日：2007-10-18
申请号：US11669679
申请日：2007-01-31
申请人： Hiroshi Kyusojin , Masato Kajimoto , Chiaki Yamana , Tsuyoshi Kano , Mitsuki Hinosugi , Hideki Matsumoto
发明人： Hiroshi Kyusojin , Masato Kajimoto , Chiaki Yamana , Tsuyoshi Kano , Mitsuki Hinosugi , Hideki Matsumoto
IPC分类号： H04L12/56
CPC分类号： H03M13/09 , H04L1/0045 , H04L1/0061 , H04L2001/0095
摘要： An information processing device is provided. The information processing device includes a frame acquiring unit for acquiring a frame using a signal transmitted via a network, a computing unit for computing a check sequence on the basis of data included in the frame, a checking unit for checking whether the frame is corrupted by checking whether the check sequence coincides with a check sequence added to the frame in advance, a storing unit for storing a table that is a list of check sequences computed in advance on the basis of a plurality of pieces of data representing addresses of frames to be received by the information processing device, and a determining unit for determining whether the frame should be received by determining whether a check sequence computed by the computing unit on the basis of data representing a destination address of the frame coincides with any one of the check sequences included in the table.
摘要翻译：提供信息处理装置。信息处理装置包括：帧获取单元，用于使用经由网络发送的信号获取帧;计算单元，用于基于包括在帧中的数据计算检查序列;检查单元，用于检查帧是否被检查所述检查序列是否与预先添加到所述帧的检查序列一致;存储单元，用于存储作为预先计算的检查序列的列表的表，所述表是基于要表示的帧的地址的多个数据块由信息处理装置接收的确定单元，以及确定单元，用于通过确定由计算单元基于表示帧的目的地地址的数据计算的检查序列是否与检查序列中的任一个一致，来确定是否应该接收该帧包括在表中。

2. 发明授权

US08412871B2 Information processing apparatus, information processing method, and program 失效
标题翻译：信息处理装置，信息处理方法和程序
公开(公告)号：US08412871B2
公开(公告)日：2013-04-02
申请号：US11913164
申请日：2006-05-23
申请人： Hiroshi Kyusojin , Hideki Matsumoto , Masato Kajimoto , Chiaki Yamana , Tsuyoshi Kano , Mitsuki Hinosugi
发明人： Hiroshi Kyusojin , Hideki Matsumoto , Masato Kajimoto , Chiaki Yamana , Tsuyoshi Kano , Mitsuki Hinosugi
IPC分类号： G06F15/163 , G06F13/24
CPC分类号： G06F13/24
摘要： The present invention relates to an information processing apparatus, an information processing method, and a program capable of simplifying an interrupt processing and reducing a time necessary to the interrupt processing. An interrupt generation unit 140 generates an interrupt signal. An interrupt status holding unit 142 stores an interrupt status showing a cause of generation of the interrupt signal. An interrupt status supply unit 141 supplies an interrupt status stored by an interrupt status holding unit to a RAM and causes the RAM to store it. A CPU executes a predetermined processing in response to the interrupt status stored to the RAM. The present invention can be applied to, for example, a network card.
摘要翻译：本发明涉及一种信息处理装置，信息处理方法以及能够简化中断处理并减少中断处理所需的时间的程序。中断产生单元140产生中断信号。中断状态保持单元142存储表示产生中断信号的原因的中断状态。中断状态提供单元141将由中断状态保持单元存储的中断状态提供给RAM，并使RAM存储它。 CPU响应于存储到RAM的中断状态来执行预定的处理。本发明可以应用于例如网卡。

3. 发明申请

US20090172302A1 Information Processing Apparatus, Information Processing Method, and Program 失效
标题翻译：信息处理装置，信息处理方法和程序
公开(公告)号：US20090172302A1
公开(公告)日：2009-07-02
申请号：US11913164
申请日：2006-05-23
申请人： Hiroshi Kyusojin , Hideki Matsumoto , Masato Kajimoto , Chiaki Yamana , Tsuyoshi Kano , Mitsuki Hinosugi
发明人： Hiroshi Kyusojin , Hideki Matsumoto , Masato Kajimoto , Chiaki Yamana , Tsuyoshi Kano , Mitsuki Hinosugi
IPC分类号： G06F12/00 , G06F13/24
CPC分类号： G06F13/24
摘要： The present invention relates to an information processing apparatus, an information processing method, and a program capable of simplifying an interrupt processing and reducing a time necessary to the interrupt processing. An interrupt generation unit 140 generates an interrupt signal. An interrupt status holding unit 142 stores an interrupt status showing a cause of generation of the interrupt signal. An interrupt status supply unit 141 supplies an interrupt status stored by an interrupt status holding unit to a RAM and causes the RAM to store it. A CPU executes a predetermined processing in response to the interrupt status stored to the RAM. The present invention can be applied to, for example, a network card.
摘要翻译：本发明涉及一种信息处理装置，信息处理方法以及能够简化中断处理并减少中断处理所需的时间的程序。中断产生单元140产生中断信号。中断状态保持单元142存储表示产生中断信号的原因的中断状态。中断状态提供单元141将由中断状态保持单元存储的中断状态提供给RAM，并使RAM存储它。 CPU响应于存储到RAM的中断状态来执行预定的处理。本发明可以应用于例如网卡。

4. 发明授权

US07961614B2 Information processing device, information processing method, and recording medium for reducing consumption of memory capacity 失效
标题翻译：信息处理装置，信息处理方法和用于减少存储容量消耗的记录介质
公开(公告)号：US07961614B2
公开(公告)日：2011-06-14
申请号：US11669679
申请日：2007-01-31
申请人： Hiroshi Kyusojin , Masato Kajimoto , Chiaki Yamana , Tsuyoshi Kano , Mitsuki Hinosugi , Hideki Matsumoto
发明人： Hiroshi Kyusojin , Masato Kajimoto , Chiaki Yamana , Tsuyoshi Kano , Mitsuki Hinosugi , Hideki Matsumoto
IPC分类号： H04L9/00
CPC分类号： H03M13/09 , H04L1/0045 , H04L1/0061 , H04L2001/0095
摘要： An information processing device is provided. The information processing device includes a frame acquiring unit for acquiring a frame using a signal transmitted via a network, a computing unit for computing a check sequence on the basis of data included in the frame, a checking unit for checking whether the frame is corrupted by checking whether the check sequence coincides with a check sequence added to the frame in advance, a storing unit for storing a table that is a list of check sequences computed in advance on the basis of a plurality of pieces of data representing addresses of frames to be received by the information processing device, and a determining unit for determining whether the frame should be received by determining whether a check sequence computed by the computing unit on the basis of data representing a destination address of the frame coincides with any one of the check sequences included in the table.
摘要翻译：提供信息处理装置。信息处理装置包括：帧获取单元，用于使用经由网络发送的信号获取帧;计算单元，用于基于包括在帧中的数据计算检查序列;检查单元，用于检查帧是否被检查所述检查序列是否与预先添加到所述帧的检查序列一致;存储单元，用于存储作为预先计算的检查序列的列表的表，所述表是基于要表示的帧的地址的多个数据块由信息处理装置接收的确定单元，以及确定单元，用于通过确定由计算单元基于表示帧的目的地地址的数据计算的检查序列是否与检查序列中的任一个一致，来确定是否应该接收该帧包括在表中。

5. 发明申请

US20070183786A1 APPARATUS, METHOD, AND PROGRAM FOR COMMUNICATION 失效
标题翻译：设备，通信方法和程序
公开(公告)号：US20070183786A1
公开(公告)日：2007-08-09
申请号：US11672386
申请日：2007-02-07
申请人： Mitsuki Hinosugi , Hiroshi Kyusojin , Hideki Matsumoto , Masato Kajimoto , Tsuyoshi Kano
发明人： Mitsuki Hinosugi , Hiroshi Kyusojin , Hideki Matsumoto , Masato Kajimoto , Tsuyoshi Kano
IPC分类号： H04B10/00
CPC分类号： H04B10/40
摘要： A communication apparatus is provided. The communication apparatus includes a transmission unit adapted to transmit data via a network, a receiving unit adapted to receive data supplied via the network, an interface unit adapted to supply to-be-transmitted data to the transmission unit and extract particular information from data received by the receiving unit, and a control unit configured to control an operation state of the interface unit.
摘要翻译：提供一种通信装置。通信装置包括适于经由网络发送数据的发送单元，适于接收经由网络提供的数据的接收单元，适于向发送单元提供被发送数据的接口单元，并从接收的数据中提取特定信息以及被配置为控制接口单元的操作状态的控制单元。

6. 发明授权

US07743268B2 Apparatus, method, and program for communication 失效
标题翻译：用于通信的装置，方法和程序
公开(公告)号：US07743268B2
公开(公告)日：2010-06-22
申请号：US11672386
申请日：2007-02-07
申请人： Mitsuki Hinosugi , Hiroshi Kyusojin , Hideki Matsumoto , Masato Kajimoto , Tsuyoshi Kano
发明人： Mitsuki Hinosugi , Hiroshi Kyusojin , Hideki Matsumoto , Masato Kajimoto , Tsuyoshi Kano
IPC分类号： G06F1/32 , G06F1/26
CPC分类号： H04B10/40
摘要： A communication apparatus is provided. The communication apparatus includes a transmission unit adapted to transmit data via a network, a receiving unit adapted to receive data supplied via the network, an interface unit adapted to supply to-be-transmitted data to the transmission unit and extract particular information from data received by the receiving unit, and a control unit configured to control an operation state of the interface unit.
摘要翻译：提供一种通信装置。通信装置包括适于经由网络发送数据的发送单元，适于接收经由网络提供的数据的接收单元，适于向发送单元提供被发送数据的接口单元，并从接收的数据中提取特定信息以及被配置为控制接口单元的操作状态的控制单元。

7. 发明授权

US08151015B2 Systems and methods for effecting DMA data transfers 失效
标题翻译：用于实现DMA数据传输的系统和方法
公开(公告)号：US08151015B2
公开(公告)日：2012-04-03
申请号：US12218179
申请日：2008-07-10
申请人： Tsuyoshi Kano , Mitsuki Hinosugi , Masato Kajimoto , Yoichi Mizutani
发明人： Tsuyoshi Kano , Mitsuki Hinosugi , Masato Kajimoto , Yoichi Mizutani
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： Disclosed herein is an information processing apparatus that transfers information, using direct memory access (DMA), between a first storage section in an information processing system and a second storage section in an information transfer system. The information processing system includes the first storage section for storing the information, and a control section. The information transfer system includes: the second storage section for storing descriptor information indicating the location at which the information is stored in the first storage section and the size of the information; and a DMA transfer section for DMA transferring the information between the first storage section and the second storage section based on the descriptor information. The DMA transfer section DMA transfers the descriptor information concerning the DMA transferred information from the second storage section to the first storage section. The control section loads the descriptor information from the first storage section.
摘要翻译：这里公开了一种信息处理装置，其在信息处理系统中的第一存储部分和信息传送系统中的第二存储部分之间传送使用直接存储器访问（DMA）的信息。信息处理系统包括用于存储信息的第一存储部分和控制部分。信息传送系统包括：第二存储部分，用于存储指示信息存储在第一存储部分中的位置的描述符信息和信息的大小; 以及DMA传送部分，用于基于描述符信息在第一存储部分和第二存储部分之间传送信息。 DMA传送部分DMA将关于DMA传送信息的描述符信息从第二存储部分传送到第一存储部分。控制部分加载来自第一存储部分的描述符信息。

8. 发明申请

US20090049225A1 Information processing apparatus, information processing method, program for executing the information processing method, storage medium storing the program, DMA controller, DMA transfer method, program for executing the DMA transfer method, and storage medium storing the program 失效
标题翻译：信息处理装置，信息处理方法，执行信息处理方法的程序，存储程序的存储介质，DMA控制器，DMA传送方法，用于执行DMA传送方法的程序以及存储程序的存储介质
公开(公告)号：US20090049225A1
公开(公告)日：2009-02-19
申请号：US12218179
申请日：2008-07-10
申请人： Tsuyoshi Kano , Mitsuki Hinosugi , Masato Kajimoto , Yoichi Mizutani
发明人： Tsuyoshi Kano , Mitsuki Hinosugi , Masato Kajimoto , Yoichi Mizutani
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： Disclosed herein is an information processing apparatus that transfers information, using direct memory access (DMA), between a first storage section in an information processing system and a second storage section in an information transfer system. The information processing system includes the first storage section for storing the information, and a control section. The information transfer system includes: the second storage section for storing descriptor information indicating the location at which the information is stored in the first storage section and the size of the information; and a DMA transfer section for DMA transferring the information between the first storage section and the second storage section based on the descriptor information. The DMA transfer section DMA transfers the descriptor information concerning the DMA transferred information from the second storage section to the first storage section. The control section loads the descriptor information from the first storage section.
摘要翻译：这里公开了一种信息处理装置，其在信息处理系统中的第一存储部分和信息传送系统中的第二存储部分之间传送使用直接存储器访问（DMA）的信息。信息处理系统包括用于存储信息的第一存储部分和控制部分。信息传送系统包括：第二存储部分，用于存储指示信息存储在第一存储部分中的位置的描述符信息和信息的大小; 以及DMA传送部分，用于基于描述符信息在第一存储部分和第二存储部分之间传送信息。 DMA传送部分DMA将关于DMA传送信息的描述符信息从第二存储部分传送到第一存储部分。控制部分加载来自第一存储部分的描述符信息。

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