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    • 7. 发明授权
    • Frequency voltage converter
    • 频率电压转换器
    • US06798678B2
    • 2004-09-28
    • US09900017
    • 2001-07-09
    • Hiroshi KomurasakiHisayasu SatoTakahiro Miki
    • Hiroshi KomurasakiHisayasu SatoTakahiro Miki
    • H02M500
    • H03L7/0805H03D3/06H03K5/135H03K9/06H03L7/0812H03L7/0995H04L27/14
    • There is provided a frequency voltage converter comprises a first transmission line for transmitting an input signal and a second transmission line provided with a delay line circuit, a third transmission line for transmitting a reference signal and a fourth transmission line provided with a delay line circuit, a mixer circuit, and a locked loop having a control circuit for outputting the same control signal to control portions of both delay line circuits so that the amount of a delay by the delay line circuit reaches one cycle of the reference signal, thereby holding linearity with respect to the frequency of a modulated wave signal and executing frequency voltage conversion even when a center frequency is low.
    • 提供了一种频率电压转换器,包括用于发送输入信号的第一传输线和设置有延迟线电路的第二传输线,用于传送参考信号的第三传输线和设置有延迟线电路的第四传输线, 混频器电路和锁定环路,具有控制电路,用于将相同的控制信号输出到两个延迟线电路的控制部分,使得延迟线电路的延迟量达到参考信号的一个周期,从而保持与 相对于调制波信号的频率,即使中心频率低,也执行频率电压转换。
    • 8. 发明授权
    • Filter circuit and communication semiconductor device using the same
    • 滤波电路和通信半导体器件使用相同
    • US08116715B2
    • 2012-02-14
    • US12197703
    • 2008-08-25
    • Tomohiro SanoTakaya MaruyamaHisayasu Sato
    • Tomohiro SanoTakaya MaruyamaHisayasu Sato
    • H04B1/10H04K3/00
    • H02M3/07H03H15/00
    • The present invention intends to provide a filter circuit in which an area occupied by the circuit can be reduced by suppressing the scale of its circuit configuration while a predetermined vicinity disturbance wave rejection ratio is maintained and a communication semiconductor device using the same, the filter circuit filtering an analog signal and including a voltage/current conversion circuit for converting the analog signal from voltage to current, and a capacitor array which executes signal processing by charging/discharging the current converted by the voltage/current conversion circuit to/from plural capacitors, the capacitor array being so constructed that the plural capacitors are divided to plural stages so that signals averaged by the capacitor on a preceding stage are accumulated in the capacitor on a next stage successively.
    • 本发明旨在提供一种滤波电路,其中通过在保持预定的邻近干扰波抑制比的同时抑制其电路结构的规模并且使用该滤波电路的通信半导体器件,可以减小电路占据的面积,滤波电路 滤波模拟信号,并包括用于将模拟信号从电压转换成电流的电压/电流转换电路;以及电容器阵列,其通过从/从多个电容器转换电压/电流转换电路的电流进行充电/放电来执行信号处理, 电容器阵列被构造成使得多个电容器被分成多个级,使得在前一级上的电容器平均的信号在下一级依次累积在电容器中。
    • 9. 发明授权
    • Frequency mixer preventing degradation in linearity on amplitude of input signal
    • 混频器防止输入信号幅度的线性降低
    • US07382175B2
    • 2008-06-03
    • US11083242
    • 2005-03-18
    • Takaya MaruyamaHisayasu Sato
    • Takaya MaruyamaHisayasu Sato
    • G06F7/44H04B1/26
    • H03D7/1441H03D7/1458H03D7/1491H03D2200/0033H03D2200/0043
    • A frequency mixer includes a first N channel MOS transistor, second and third N channel MOS transistors constituting a local oscillator signal differential pair, and having substantially identical properties, a first load, and a second load. The first N channel MOS transistor receives an RF signal at its gate. A local oscillator signal is applied to the gates of the second and third N channel MOS transistors. The drain current of the second and third N channel MOS transistors is output to the drain of the first N channel MOS transistor. An amplitude-current conversion circuit receives the RF signal and provides an output current to the drain of the first N channel MOS transistor to decrease monotonously the output current with respect to the amplitude of the RF signal.
    • 混频器包括构成本地振荡器信号差分对的第一N沟道MOS晶体管,第二和第三N沟道MOS晶体管,并且具有基本相同的特性,第一负载和第二负载。 第一N沟道MOS晶体管在其栅极接收RF信号。 本地振荡器信号施加到第二和第三N沟道MOS晶体管的栅极。 第二和第三N沟道MOS晶体管的漏极电流输出到第一N沟道MOS晶体管的漏极。 振幅电流转换电路接收RF信号并向第一N沟道MOS晶体管的漏极提供输出电流,以相对于RF信号的幅度单调减小输出电流。
    • 10. 发明申请
    • FILTER CIRCUIT AND COMMUNICATION SEMICONDUCTOR DEVICE USING THE SAME
    • 滤波电路和通信半导体器件
    • US20120092065A1
    • 2012-04-19
    • US13335284
    • 2011-12-22
    • Tomohiro SANOTakaya MaruyamaHisayasu Sato
    • Tomohiro SANOTakaya MaruyamaHisayasu Sato
    • H03B1/04
    • H02M3/07H03H15/00
    • The present invention intends to provide a filter circuit in which an area occupied by the circuit can be reduced by suppressing the scale of its circuit configuration while a predetermined vicinity disturbance wave rejection ratio is maintained and a communication semiconductor device using the same, the filter circuit filtering an analog signal and including a voltage/current conversion circuit for converting the analog signal from voltage to current, and a capacitor array which executes signal processing by charging/discharging the current converted by the voltage/current conversion circuit to/from plural capacitors, the capacitor array being so constructed that the plural capacitors are divided to plural stages so that signals averaged by the capacitor on a preceding stage are accumulated in the capacitor on a next stage successively.
    • 本发明旨在提供一种滤波电路,其中通过在保持预定的邻近干扰波抑制比的同时抑制其电路结构的规模并且使用该滤波电路的通信半导体器件,可以减小电路占据的面积,滤波电路 滤波模拟信号,并包括用于将模拟信号从电压转换成电流的电压/电流转换电路;以及电容器阵列,其通过从/从多个电容器转换电压/电流转换电路的电流进行充电/放电来执行信号处理, 电容器阵列被构造成使得多个电容器被分成多个级,使得在前一级上的电容器平均的信号在下一级依次累积在电容器中。