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1. 发明授权

US5793097A Semiconductor device having conducting structure 失效
标题翻译：具有导电结构的半导体器件
公开(公告)号：US5793097A
公开(公告)日：1998-08-11
申请号：US519096
申请日：1995-08-24
申请人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
发明人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
IPC分类号： H01C7/06 , H01L21/02 , H01L21/822 , H01L27/04 , H01L27/06 , H01L29/00 , H01L23/48 , H01L29/76
CPC分类号： H01L27/0652 , H01L27/0688 , H01L28/20
摘要： The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
摘要翻译：本发明提供了一种其电阻值被控制的多晶硅导电结构（例如电阻器），并且可以相对于任何电阻值而言可以变化较小并且对温度的依赖性较小，及其制造方法。使用至少包括具有大晶粒尺寸的第一多晶硅层和小晶粒尺寸的第二多晶硅层的两层结构，并且第一多晶硅层具有正的温度对电阻的依赖性，而第二多晶硅层的第二多晶层具有负电阻的温度依赖性，反之亦然。此外，可以通过高剂量离子注入和退火，或者通过在不同温度下的化学气相沉积来沉积这些层，形成大晶粒和小晶粒层，可以形成大晶粒尺寸的多晶硅层。

2. 发明授权

US06610569B1 Semiconductor device and process of producing the same 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US06610569B1
公开(公告)日：2003-08-26
申请号：US09649504
申请日：2000-08-28
申请人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
发明人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
IPC分类号： H01L21336
CPC分类号： H01L27/0652 , H01L27/0688 , H01L28/20
摘要： The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the polycrystalline first silicon layer has a positive in temperature dependence of resist while the second polycrystalline layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
摘要翻译：本发明提供了一种其电阻值被控制的多晶硅导电结构（例如电阻器），并且可以相对于任何电阻值而言可以变化较小并且对温度的依赖性较小，及其制造方法。使用至少包括具有大晶粒尺寸的第一多晶硅层和小晶粒尺寸的第二多晶硅层的两层结构，并且多晶第一硅层的抗蚀剂的温度依赖性为正，而第二多晶层具有电阻的负温度依赖性，反之亦然。此外，可以通过高剂量离子注入和退火，或者通过在不同温度下的化学气相沉积来沉积这些层，形成大晶粒和小晶粒层，可以形成大晶粒尺寸的多晶硅层。

3. 发明申请

US20050101097A1 Semiconductor device and process of producing the same 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20050101097A1
公开(公告)日：2005-05-12
申请号：US11000092
申请日：2004-12-01
申请人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
发明人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
IPC分类号： H01C7/06 , H01L21/02 , H01L21/822 , H01L27/04 , H01L27/06 , H01L21/20 , H01L21/8222
CPC分类号： H01L27/0652 , H01L27/0688 , H01L28/20
摘要： The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline silicon layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
摘要翻译：本发明提供了一种其电阻值被控制的多晶硅导电结构（例如电阻器），并且可以相对于任何电阻值而言可以变化较小并且对温度的依赖性较小，及其制造方法。使用至少包括具有大晶粒尺寸的第一多晶硅层和小晶粒尺寸的第二多晶硅层的两层结构，并且第一多晶硅层具有正的温度对电阻的依赖性，而第二多晶硅层的第二多晶硅层具有负电阻的温度依赖性，反之亦然。此外，可以通过高剂量离子注入和退火，或者通过在不同温度下的化学气相沉积来沉积这些层，形成大晶粒和小晶粒层，可以形成大晶粒尺寸的多晶硅层。

4. 发明授权

US6133094A Semiconductor device and process of producing the same 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US6133094A
公开(公告)日：2000-10-17
申请号：US123405
申请日：1998-07-28
申请人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
发明人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
IPC分类号： H01C7/06 , H01L21/02 , H01L21/822 , H01L27/04 , H01L27/06 , H01L21/336
CPC分类号： H01L27/0652 , H01L27/0688 , H01L28/20
摘要： The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
摘要翻译：本发明提供了一种其电阻值被控制的多晶硅导电结构（例如电阻器），并且可以相对于任何电阻值而言可以变化较小并且对温度的依赖性较小，及其制造方法。使用至少包括具有大晶粒尺寸的第一多晶硅层和小晶粒尺寸的第二多晶硅层的两层结构，并且第一多晶硅层具有正的温度对电阻的依赖性，而第二多晶硅层的第二多晶层具有负电阻的温度依赖性，反之亦然。此外，可以通过高剂量离子注入和退火，或者通过在不同温度下的化学气相沉积来沉积这些层，形成大晶粒和小晶粒层，可以形成大晶粒尺寸的多晶硅层。

5. 发明授权

US07238582B2 Semiconductor device and process of producing the same 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US07238582B2
公开(公告)日：2007-07-03
申请号：US11000092
申请日：2004-12-01
申请人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
发明人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
IPC分类号： H01L21/8222
CPC分类号： H01L27/0652 , H01L27/0688 , H01L28/20
摘要： The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline silicon layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
摘要翻译：本发明提供了一种其电阻值被控制的多晶硅导电结构（例如电阻器），并且可以相对于任何电阻值而言可以变化较小并且对温度的依赖性较小，及其制造方法。使用至少包括具有大晶粒尺寸的第一多晶硅层和小晶粒尺寸的第二多晶硅层的两层结构，并且第一多晶硅层具有正的温度对电阻的依赖性，而第二多晶硅层的第二多晶硅层具有负电阻的温度依赖性，反之亦然。此外，可以通过高剂量离子注入和退火，或者通过在不同温度下的化学气相沉积来沉积这些层，形成大晶粒和小晶粒层，可以形成大晶粒尺寸的多晶硅层。

6. 发明授权

US06835632B2 Semiconductor device and process of producing the same 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US06835632B2
公开(公告)日：2004-12-28
申请号：US10460215
申请日：2003-06-13
申请人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
发明人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
IPC分类号： H01L2120
CPC分类号： H01L27/0652 , H01L27/0688 , H01L28/20
摘要： The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline silicon layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
摘要翻译：本发明提供了一种其电阻值被控制的多晶硅导电结构（例如电阻器），并且可以相对于任何电阻值而言可以变化较小并且对温度的依赖性较小，及其制造方法。使用至少包括具有大晶粒尺寸的第一多晶硅层和小晶粒尺寸的第二多晶硅层的两层结构，并且第一多晶硅层具有正的温度对电阻的依赖性，而第二多晶硅层的第二多晶硅层具有负电阻的温度依赖性，反之亦然。此外，可以通过高剂量离子注入和退火，或者通过在不同温度下的化学气相沉积来沉积这些层，形成大晶粒和小晶粒层，可以形成大晶粒尺寸的多晶硅层。

7. 发明授权

US06524924B1 Semiconductor device and process of producing the same 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US06524924B1
公开(公告)日：2003-02-25
申请号：US09123406
申请日：1998-07-28
申请人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
发明人： Hiromi Shimamoto , Takashi Uchino , Takeo Shiba , Kazuhiro Ohnishi , Yoichi Tamaki , Takashi Kobayashi , Toshiyuki Kikuchi , Takahide Ikeda
IPC分类号： H01L2120
CPC分类号： H01L27/0652 , H01L27/0688 , H01L28/20
摘要： The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistances while the second polycrystalline layer has a negative temperature dependance of resistance, or vise versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
摘要翻译：本发明提供了一种其电阻值被控制的多晶硅导电结构（例如电阻器），并且可以相对于任何电阻值而言可以变化较小并且对温度的依赖性较小，及其制造方法。使用包括具有大晶粒尺寸的第一多晶硅层和小晶粒尺寸的第二多晶硅层的至少两层结构，并且第一多晶硅层具有正电温度依赖性而第二多晶层具有电阻的负温度依赖性，反之亦然。此外，可以通过高剂量离子注入和退火，或者通过在不同温度下的化学气相沉积来沉积这些层，形成大晶粒和小晶粒层，可以形成大晶粒尺寸的多晶硅层。

8. 发明申请

US20080217740A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080217740A1
公开(公告)日：2008-09-11
申请号：US12017438
申请日：2008-01-22
申请人： Nobuhiro Shiramizu , Hiromi Shimamoto
发明人： Nobuhiro Shiramizu , Hiromi Shimamoto
IPC分类号： H01L27/06 , H01L21/02
CPC分类号： H01L27/016 , H01C7/006 , H01C7/06 , H01L28/20
摘要： An object of the invention is to provide a resistor element whose contact area is self-alignedly formed to reduce the contact area size and contact resistance variation and which can be formed finely and with high precision at low cost. A thin metal film is deposited on a substrate surface covered with an insulation film on which wirings are formed. The thin metal film is anisotropically etched to leave a desired portion such that the desired portion straddles between wirings, self-alignedly connecting the thin metal film to be a resistor and the wirings.
摘要翻译：本发明的目的是提供一种电阻元件，其接触面积是自对准地形成的，以减小接触面积尺寸和接触电阻变化，并且可以以低成本精细且高精度地形成。在覆盖有形成有布线的绝缘膜的基板表面上沉积薄金属膜。金属薄膜被各向异性地蚀刻以留出期望的部分，使得期望的部分跨接在布线之间，将薄金属膜自对准地连接成电阻器和布线。

9. 发明申请

US20060043418A1 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060043418A1
公开(公告)日：2006-03-02
申请号：US11070229
申请日：2005-03-03
申请人： Makoto Miura , Katsuyoshi Washio , Hiromi Shimamoto
发明人： Makoto Miura , Katsuyoshi Washio , Hiromi Shimamoto
IPC分类号： H01L31/109
CPC分类号： H01L29/7378 , H01L29/0821 , H01L29/66242
摘要： A bipolar type semiconductor device capable of attaining high current gain and high cut-off frequency and performing a satisfactory transistor operation also in a high current region while maintaining a high breakdown voltage performance, as well as a method of manufacturing the semiconductor device, are provided. In a collector comprising a first semiconductor layer and a second semiconductor layer narrower in band gap than the first semiconductor layer, an impurity is doped so as to have a peak of impurity concentration within the second collector layer and so that the value of the peak is higher than the impurity concentration at any position within the first collector layer. It is preferable to adjust the concentration of the doped impurity in such a manner that a collector-base depletion layer extends up to the first collector layer.
摘要翻译：提供一种能够在保持高的击穿电压性能的同时在高电流区域中获得高电流增益和高截止频率并执行令人满意的晶体管操作的双极型半导体器件，以及制造半导体器件的方法。在包含比第一半导体层窄的带隙的第一半导体层和第二半导体层的集电体中，掺杂杂质以使第二集电极层内的杂质浓度的峰值为峰值，高于第一收集层内任何位置的杂质浓度。优选以使得集电极 - 基极耗尽层向上延伸到第一集电极层的方式调节掺杂杂质的浓度。

10. 发明申请

US20050001238A1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050001238A1
公开(公告)日：2005-01-06
申请号：US10855378
申请日：2004-05-28
申请人： Eiji Oue , Katsuyoshi Washio , Hiromi Shimamoto , Katsuya Oda , Makoto Miura
发明人： Eiji Oue , Katsuyoshi Washio , Hiromi Shimamoto , Katsuya Oda , Makoto Miura
IPC分类号： H01L21/331 , H01L29/732 , H01L29/737 , H01L31/0328
CPC分类号： H01L29/66287 , H01L29/7322
摘要： A bipolar transistor is provided in which both the base resistance and the base-collector capacitance are reduced and which is capable of operating at a high cutoff frequency. The semiconductor device is structured so that the emitter and extrinsic base are separated from each other by an insulator sidewall and the bottom faces of the insulator sidewall, and the emitter are approximately on the same plane. The extrinsic base electrode and the collector region are separated from each other by an insulator.
摘要翻译：提供双极晶体管，其中基极电阻和基极集电极电容都减小，并且能够以高截止频率工作。半导体器件被构造成使得发射极和非本征基极通过绝缘体侧壁和绝缘体侧壁的底面彼此分离，并且发射极大致在同一平面上。外部基极和集电极区域通过绝缘体彼此分离。

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