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1. 发明申请

US20110203513A1 METHOD OF MANUFACTURING SILICON CARBIDE SUBSTRATE 审中-公开
标题翻译：制造碳化硅基板的方法
公开(公告)号：US20110203513A1
公开(公告)日：2011-08-25
申请号：US13029791
申请日：2011-02-17
申请人： Hiroki WATANABE , Yasuo Kitou , Kensaku Yamamoto , Hidefumi Takaya , Masahiro Sugimoto , Jun Morimoto , Yukihiko Watanabe , Narumasa Soejima , Tsuyoshi Ishikawa
发明人： Hiroki WATANABE , Yasuo Kitou , Kensaku Yamamoto , Hidefumi Takaya , Masahiro Sugimoto , Jun Morimoto , Yukihiko Watanabe , Narumasa Soejima , Tsuyoshi Ishikawa
IPC分类号： C30B19/12
CPC分类号： H01L21/02529 , C30B29/36 , C30B33/02 , H01L21/02378 , H01L21/02658 , H01L21/02667 , H01L29/66068
摘要： In a method of manufacturing a silicon carbide substrate, a defect-containing substrate made of silicon carbide is prepared. The defect-containing substrate has a front surface, a rear surface being opposite to the front surface, and a surface portion adjacent to the front surface. The detect-containing substrate includes a screw dislocation in the surface portion. The front surface of the defect-containing substrate is applied with an external force so that a crystallinity of the surface portion is reduced. After being applied with the external force, the defect-containing substrate is thermally treated so that the crystallinity of the surface portion is recovered.
摘要翻译：在制造碳化硅衬底的方法中，制备由碳化硅制成的含缺陷衬底。含缺陷的基板具有前表面，与前表面相对的后表面和与前表面相邻的表面部分。含检测基板包括在表面部分中的螺旋位错。使含有缺陷的基板的前表面被施加外力，使得表面部分的结晶度降低。在施加外力之后，对含缺陷的基板进行热处理，以恢复表面部分的结晶度。

2. 发明授权

US08518809B2 Manufacturing method of silicon carbide single crystal 有权
标题翻译：碳化硅单晶的制造方法
公开(公告)号：US08518809B2
公开(公告)日：2013-08-27
申请号：US13308721
申请日：2011-12-01
申请人： Hiroki Watanabe , Yasuo Kitou , Yasushi Furukawa , Kensaku Yamamoto , Hidefumi Takaya , Masahiro Sugimoto , Yukihiko Watanabe , Narumasa Soejima , Tsuyoshi Ishikawa
发明人： Hiroki Watanabe , Yasuo Kitou , Yasushi Furukawa , Kensaku Yamamoto , Hidefumi Takaya , Masahiro Sugimoto , Yukihiko Watanabe , Narumasa Soejima , Tsuyoshi Ishikawa
IPC分类号： H01L21/20
CPC分类号： H01L21/0262 , C30B25/186 , C30B29/36 , H01L21/02378 , H01L21/0243 , H01L21/02529 , H01L21/02658 , H01L21/046 , H01L21/0475 , H01L29/04
摘要： A manufacturing method of an SiC single crystal includes preparing an SiC substrate, implanting ions into a surface portion of the SiC substrate to form an ion implantation layer, activating the ions implanted into the surface portion of the SiC substrate by annealing, chemically etching the surface portion of the SiC substrate to form an etch pit that is caused by a threading screw dislocation included in the SiC substrate and performing an epitaxial growth of SiC to form an SiC growth layer on a surface of the SiC substrate including an inner wall of the etch pit in such a manner that portions of the SiC growth layer grown on the inner wall of the etch pit join with each other.
摘要翻译： SiC单晶的制造方法包括制备SiC衬底，将离子注入到SiC衬底的表面部分中以形成离子注入层，通过退火激活注入到SiC衬底的表面部分中的离子，化学蚀刻表面以形成由SiC衬底中的螺纹位错引起的蚀刻坑，并且在SiC衬底的表面上进行SiC的外延生长以形成SiC生长层，所述SiC生长层包括蚀刻的内壁以使得在蚀刻坑的内壁上生长的SiC生长层的部分彼此连接的方式形成凹坑。

3. 发明授权

US08492867B2 Semiconductor device including cell region and peripheral region having high breakdown voltage structure 有权
标题翻译：包括具有高击穿电压结构的单元区域和周边区域的半导体器件
公开(公告)号：US08492867B2
公开(公告)日：2013-07-23
申请号：US13164246
申请日：2011-06-20
申请人： Kensaku Yamamoto , Naohiro Suzuki , Hidefumi Takaya , Masahiro Sugimoto , Jun Morimoto , Narumasa Soejima , Tsuyoshi Ishikawa , Yukihiko Watanabe
发明人： Kensaku Yamamoto , Naohiro Suzuki , Hidefumi Takaya , Masahiro Sugimoto , Jun Morimoto , Narumasa Soejima , Tsuyoshi Ishikawa , Yukihiko Watanabe
IPC分类号： H01L21/20
CPC分类号： H01L29/7813 , H01L29/0619 , H01L29/0661 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/407 , H01L29/66068 , H01L29/7397 , H01L29/7811 , H01L29/8613
摘要： A semiconductor device includes a semiconductor substrate and an electric field terminal part. The semiconductor substrate includes a substrate, a drift layer disposed on a surface of the substrate, and a base layer disposed on a surface of the drift layer. The semiconductor substrate is divided into a cell region in which a semiconductor element is disposed and a peripheral region that surrounds the cell region. The base region has a bottom face located on a same plane throughout the cell region and the peripheral region and provides an electric field relaxing layer located in the peripheral region. The electric field terminal part surrounds the cell region and a portion of the electric field relaxing layer and penetrates the electric field relaxing layer from a surface of the electric field relaxing layer to the drift layer.
摘要翻译：半导体器件包括半导体衬底和电场端子部分。半导体衬底包括衬底，设置在衬底的表面上的漂移层和设置在漂移层的表面上的基底层。半导体衬底被分成其中设置半导体元件的单元区域和围绕单元区域的外围区域。基底区域具有位于整个电池区域和外围区域的同一平面上的底面，并且提供位于周边区域中的电场弛豫层。电场端子部围绕电池区域和电场缓和层的一部分，从电场缓和层的表面向漂移层贯通电场缓和层。

4. 发明申请

US20120319136A1 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：硅碳化硅半导体器件及其制造方法
公开(公告)号：US20120319136A1
公开(公告)日：2012-12-20
申请号：US13581497
申请日：2012-02-06
申请人： Masato Noborio , Kensaku Yamamoto , Hideo Matsuki , Hidefumi Takaya , Masahiro Sugimoto , Narumasa Soejima , Tsuyoshi Ishikawa , Yukihiko Watanabe
发明人： Masato Noborio , Kensaku Yamamoto , Hideo Matsuki , Hidefumi Takaya , Masahiro Sugimoto , Narumasa Soejima , Tsuyoshi Ishikawa , Yukihiko Watanabe
IPC分类号： H01L29/24 , H01L21/336
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/66068 , H01L29/66348 , H01L29/7397
摘要： A SiC device includes an inversion type MOSFET having: a substrate, a drift layer, and a base region stacked in this order; source and contact regions in upper portions of the base region; a trench penetrating the source and base regions; a gate electrode on a gate insulating film in the trench; a source electrode coupled with the source and base region; a drain electrode on a back of the substrate; and multiple deep layers in an upper portion of the drift layer deeper than the trench. Each deep layer has an impurity concentration distribution in a depth direction, and an inversion layer is provided in a portion of the deep layer on the side of the trench under application of the gate voltage.
摘要翻译： SiC器件包括反转型MOSFET，其具有：依次堆叠的衬底，漂移层和基极区域; 源极和接触区域在基极区域的上部; 穿透源区和基区的沟槽; 沟槽中的栅极绝缘膜上的栅电极; 源极与源极和基极区域耦合; 位于衬底背面的漏电极; 以及在漂移层的上部比沟槽更深的多个深层。每个深层在深度方向上具有杂质浓度分布，并且在施加栅极电压下在沟槽侧的深层的一部分中设置反转层。

5. 发明申请

US20140175459A1 SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：硅碳化硅半导体器件及其制造方法
公开(公告)号：US20140175459A1
公开(公告)日：2014-06-26
申请号：US13994855
申请日：2012-02-06
申请人： Kensaku Yamamoto , Masato Noborio , Hideo Matsuki , Hidefumi Takaya , Masahiro Sugimoto , Narumasa Soejima , Tsuyoshi Ishikawa , Yukihiko Watanabe
发明人： Kensaku Yamamoto , Masato Noborio , Hideo Matsuki , Hidefumi Takaya , Masahiro Sugimoto , Narumasa Soejima , Tsuyoshi Ishikawa , Yukihiko Watanabe
IPC分类号： H01L29/78 , H01L29/16 , H01L29/66
CPC分类号： H01L29/7813 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/66068 , H01L29/66348 , H01L29/7397
摘要： A SiC semiconductor device includes: a semiconductor switching element having: a substrate, a drift layer and a base region stacked in this order; a source region and a contact region in the base region; a trench extending from a surface of the source region to penetrate the base region; a gate electrode on a gate insulating film in the trench; a source electrode electrically coupled with the source region and the base region; a drain electrode on a back side of the substrate; and multiple deep layers in an upper portion of the drift layer deeper than the trench. Each deep layer has upper and lower portions. A width of the upper portion is smaller than the lower portion.
摘要翻译： SiC半导体器件包括：半导体开关元件，其具有：依次层叠的基板，漂移层和基极区域; 源极区域和基极区域中的接触区域; 从源极区域的表面延伸以穿透基部区域的沟槽; 沟槽中的栅极绝缘膜上的栅电极; 源极，与源极区域和基极区域电耦合; 位于所述基板的背面的漏电极; 以及在漂移层的上部比沟槽更深的多个深层。每个深层具有上部和下部。上部的宽度小于下部。

6. 发明授权

US08470091B2 SiC single crystal substrate, SiC single crystal epitaxial wafer, and SiC semiconductor device 有权
标题翻译： SiC单晶衬底，SiC单晶外延晶片和SiC半导体器件
公开(公告)号：US08470091B2
公开(公告)日：2013-06-25
申请号：US12656210
申请日：2010-01-21
申请人： Yasuo Kitou , Hiroki Watanabe , Masanori Nagaya , Kensaku Yamamoto , Eiichi Okuno
发明人： Yasuo Kitou , Hiroki Watanabe , Masanori Nagaya , Kensaku Yamamoto , Eiichi Okuno
IPC分类号： H01L29/24
CPC分类号： H01L29/1608 , C30B25/20 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L21/02609 , H01L29/045
摘要： A direction of a dislocation line of a threading dislocation is aligned, and an angle between the direction of the dislocation line of the threading dislocation and a [0001]-orientation c-axis is equal to or smaller than 22.5 degrees. The threading dislocation having the dislocation line along with the [0001]-orientation c-axis is perpendicular to a direction of a dislocation line of a basal plane dislocation. Accordingly, the dislocation does not provide an extended dislocation on the c-face, so that a stacking fault is not generated. Thus, when an electric device is formed in a SiC single crystal substrate having the direction of the dislocation line of the threading dislocation, which is the [0001]-orientation c-axis, a SiC semiconductor device is obtained such that device characteristics are excellent without deterioration, and a manufacturing yield ration is improved.
摘要翻译：螺纹位错的位错线的方向对准，穿透位错的位错线的方向与[0001]取向c轴的角度等于或小于22.5度。具有位错线以及[0001]取向c轴的穿透位错垂直于基面位错的位错线的方向。因此，位错不会在c面上提供扩展位错，因此不会产生堆垛错误。因此，当在具有作为[0001]取向c轴的穿透位错的位错线的方向的SiC单晶衬底中形成电子器件时，获得SiC半导体器件，使得器件特性优异不劣化，制造产率不断提高。

7. 发明申请

US20100200866A1 SiC single crystal substrate, SiC single crystal epitaxial wafer, and SiC semiconductor device 有权
标题翻译： SiC单晶衬底，SiC单晶外延晶片和SiC半导体器件
公开(公告)号：US20100200866A1
公开(公告)日：2010-08-12
申请号：US12656210
申请日：2010-01-21
申请人： Yasuo Kitou , Hiroki Watanabe , Masanori Nagaya , Kensaku Yamamoto , Eiichi Okuno
发明人： Yasuo Kitou , Hiroki Watanabe , Masanori Nagaya , Kensaku Yamamoto , Eiichi Okuno
IPC分类号： H01L29/24
CPC分类号： H01L29/1608 , C30B25/20 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L21/02609 , H01L29/045
摘要： A direction of a dislocation line of a threading dislocation is aligned, and an angle between the direction of the dislocation line of the threading dislocation and a [0001]-orientation c-axis is equal to or smaller than 22.5 degrees. The threading dislocation having the dislocation line along with the [0001]-orientation c-axis is perpendicular to a direction of a dislocation line of a basal plane dislocation. Accordingly, the dislocation does not provide an extended dislocation on the c-face, so that a stacking fault is not generated. Thus, when an electric device is formed in a SiC single crystal substrate having the direction of the dislocation line of the threading dislocation, which is the [0001]-orientation c-axis, a SiC semiconductor device is obtained such that device characteristics are excellent without deterioration, and a manufacturing yield ration is improved.
摘要翻译：螺纹位错的位错线的方向对准，穿透位错的位错线的方向与[0001]取向c轴的角度等于或小于22.5度。具有位错线以及[0001]取向c轴的穿透位错垂直于基面位错的位错线的方向。因此，位错不会在c面上提供扩展位错，因此不会产生堆垛错误。因此，当在具有作为[0001]取向c轴的穿透位错的位错线的方向的SiC单晶衬底中形成电子器件时，获得SiC半导体器件，使得器件特性优异不劣化，制造产率不断提高。

8. 发明授权

US09640655B2 Semiconductor device and manufacturing method of semiconductor device 有权
公开(公告)号：US09640655B2
公开(公告)日：2017-05-02
申请号：US14762607
申请日：2013-01-24
申请人： Shinya Nishimura , Narumasa Soejima , Kensaku Yamamoto
发明人： Shinya Nishimura , Narumasa Soejima , Kensaku Yamamoto
IPC分类号： H01L29/78 , H01L29/10 , H01L21/311 , H01L21/306 , H01L21/225 , H01L21/31 , H01L29/423 , H01L29/66 , H01L29/06 , H01L21/265 , H01L21/28
CPC分类号： H01L29/7834 , H01L21/225 , H01L21/2652 , H01L21/28238 , H01L21/30604 , H01L21/31 , H01L21/31116 , H01L29/0623 , H01L29/1095 , H01L29/4236 , H01L29/66621 , H01L29/66666 , H01L29/66734 , H01L29/7813 , H01L29/7841
摘要： A semiconductor device is provided with: a first conductivity type contact region; a second conductivity type body region; a first conductivity type drift region of; a trench formed through the contact region and body region from a front surface of the semiconductor substrate, wherein a bottom of the trench is positioned in the drift region; an insulating film covering an inner surface of the trench; a gate electrode accommodated in the trench in a state covered with the insulating film; and a second conductivity type floating region formed at a position deeper than the bottom of the trench, and adjacent to the bottom of the trench. The floating region includes a first layer adjacent to the bottom of the trench and a second layer formed at a position deeper than the first layer, wherein a width of the first layer is broader than a width of the second layer.

9. 发明申请

US20130239681A1 ANGULAR VELOCITY SENSOR 有权
标题翻译：角速度传感器
公开(公告)号：US20130239681A1
公开(公告)日：2013-09-19
申请号：US13989644
申请日：2011-12-22
申请人： Tsuyoshi Fujii , Kensaku Yamamoto
发明人： Tsuyoshi Fujii , Kensaku Yamamoto
IPC分类号： G01C19/56
CPC分类号： G01C19/5719 , G01C19/56 , G01C19/5607 , G01C19/574 , H01L41/1132
摘要： An angular velocity sensor includes a sensor element having a shape defined in an XYZ space, and can detect an angular velocity about a Z axis. The sensor element includes a support body extending in a direction of an X axis, an arm connected with the support body, and a weight connected with the arm. The arm has a first end connected with the support body and a second end connected with the weight. The arm has substantially a J-shape including a first arm portion extending in a direction of a Y axis from the first end to a first corner, a second arm portion extending in the direction of the X axis from the first corner to a second corner, and a third arm portion extending in the direction of the Y axis from the second corner to the second end. The length of the arm in the direction of the X axis is larger than the length of the weight in the direction of the X axis. This angular velocity sensor can improve the sensibility to angular velocity about the Z axis.
摘要翻译：角速度传感器包括具有限定在XYZ空间中的形状的传感器元件，并且可以检测围绕Z轴的角速度。传感器元件包括沿X轴方向延伸的支撑体，与支撑体连接的臂以及与臂相连的重物。臂具有与支撑体连接的第一端和与重物连接的第二端。臂具有大致J字形，包括从第一端到第一角沿Y轴方向延伸的第一臂部分，从X轴方向从第一角延伸到第二拐角的第二臂部分以及从Y轴方向从第二角延伸到第二端的第三臂部。臂沿X轴方向的长度大于X轴方向的重量长度。该角速度传感器可以提高围绕Z轴的角速度的敏感度。

10. 发明授权

US07994513B2 Silicon carbide semiconductor device including deep layer 有权
标题翻译：碳化硅半导体器件包括深层
公开(公告)号：US07994513B2
公开(公告)日：2011-08-09
申请号：US12385715
申请日：2009-04-16
申请人： Kensaku Yamamoto , Eiichi Okuno
发明人： Kensaku Yamamoto , Eiichi Okuno
IPC分类号： H01L21/02
CPC分类号： H01L29/7397 , H01L29/0623 , H01L29/0634 , H01L29/0847 , H01L29/1608 , H01L29/66068 , H01L29/7828
摘要： A silicon carbide semiconductor device includes a substrate, a drift layer located on a first surface of the substrate, a base region located on the drift layer, a source region located on the base region, a trench sandwiched by each of the base region to the drift layer, a channel layer located in the trench, a gate insulating layer located on the channel layer, a gate electrode located on the gate insulating layer, a source electrode electrically coupled with the source region and the base region, a drain electrode located on a second surface of the substrate, and a deep layer located under the base region and extending to a depth deeper than the trench. The deep layer is formed into a lattice pattern.
摘要翻译：碳化硅半导体器件包括衬底，位于衬底的第一表面上的漂移层，位于漂移层上的基极区域，位于基极区域上的源极区域，夹在基底区域之中的沟槽漂移层，位于沟槽中的沟道层，位于沟道层上的栅极绝缘层，位于栅极绝缘层上的栅电极，与源区和基极区电耦合的源电极，位于衬底的第二表面，以及位于基底区域下方并延伸到比沟槽深的深度的深层。深层形成为格子图案。

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