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1. 发明授权

US5973355A Nonvolatile semiconductor memory device and manufacturing method of the same 失效
标题翻译：非易失性半导体存储器件及其制造方法相同
公开(公告)号：US5973355A
公开(公告)日：1999-10-26
申请号：US851285
申请日：1997-05-05
申请人： Hiroki Shirai , Taishi Kubota , Ichiro Honma , Hirohito Watanabe , Haruhiko Ono , Takeshi Okazawa
发明人： Hiroki Shirai , Taishi Kubota , Ichiro Honma , Hirohito Watanabe , Haruhiko Ono , Takeshi Okazawa
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/42324 , H01L29/7883 , Y10S257/90
摘要： There is disclosed a nonvolatile semiconductor memory device, which is capable of maintaining a high capacitance ratio even when a memory cell is formed in a micronized size without increasing the number of manufacturing steps. In a flash memory having buried diffusion layer type cells, a source region and drain regions and are formed in self alignment with a polycrystalline film pattern which has a polycrystalline silicon film having projecting and recessing parts in its upper surface.
摘要翻译：公开了一种非易失性半导体存储器件，即使在不增加制造步骤的数量的情况下，即使在微细尺寸形成存储单元时，也能够保持高电容比。在具有掩埋扩散层型电池的闪速存储器中，源极区域和漏极区域形成为与其上表面具有突出和凹陷部分的多晶硅膜的多晶膜图案自对准地形成。

2. 发明授权

US5972750A Nonvolatile semiconductor memory device and manufacturing method of the same 失效
标题翻译：非易失性半导体存储器件及其制造方法相同
公开(公告)号：US5972750A
公开(公告)日：1999-10-26
申请号：US16952
申请日：1998-02-02
申请人： Hiroki Shirai , Taishi Kubota , Ichiro Honma , Hirohito Watanabe , Haruhiko Ono , Takeshi Okazawa
发明人： Hiroki Shirai , Taishi Kubota , Ichiro Honma , Hirohito Watanabe , Haruhiko Ono , Takeshi Okazawa
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792 , H01L29/72
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/42324 , H01L29/7883 , Y10S257/90
摘要： There are disclosed a nonvolatile semiconductor memory device, which is capable of maintaining a high capacitance ratio even when a memory cell is formed in a micronized size without increasing the number of manufacturing steps, and its manufacturing method. In a flash memory having buried diffusion layer type cells, a source region and drain regions and are formed in self alignment with a polycrystalline film pattern which has a polycrystalline silicon film having projecting and recessing parts in its upper surface.
摘要翻译：公开了一种非易失性半导体存储器件，即使在不增加制造步骤数量的情况下，即使在微型化尺寸形成存储单元时也能够保持高电容比及其制造方法。在具有掩埋扩散层型电池的闪速存储器中，源极区域和漏极区域形成为与其上表面具有突出和凹陷部分的多晶硅膜的多晶膜图案自对准地形成。

3. 发明申请

US20070090450A1 SEMICONDUCTOR DEVICE WITH HIGH DIELECTRIC CONSTANT INSULATING FILM AND MANUFACTURING METHOD FOR THE SAME 有权
标题翻译：具有高介电常数绝缘膜的半导体器件及其制造方法
公开(公告)号：US20070090450A1
公开(公告)日：2007-04-26
申请号：US11608078
申请日：2006-12-07
申请人： Heiji Watanabe , Haruhiko Ono , Nobuyuki Ikarashi
发明人： Heiji Watanabe , Haruhiko Ono , Nobuyuki Ikarashi
IPC分类号： H01L29/792 , H01L31/00 , H01L35/26
CPC分类号： H01L21/02142 , H01L21/02271 , H01L21/28185 , H01L21/28194 , H01L21/31604 , H01L21/31612 , H01L21/31637 , H01L21/31641 , H01L21/31645 , H01L29/517
摘要： A semiconductor device has a substrate and a dielectric film formed directly or indirectly on the substrate. The dielectric film contains a metal silicate film, and a silicon concentration in the metal silicate film is lower in a center portion in the film thickness direction than in an upper portion and in a lower portion.
摘要翻译：半导体器件具有直接或间接地形成在衬底上的衬底和电介质膜。电介质膜含有金属硅酸盐膜，并且在膜厚度方向上的中心部分，金属硅酸盐膜中的硅浓度比上部和下部低。

4. 发明授权

US07164169B2 Semiconductor device having high-permittivity insulation film and production method therefor 有权
标题翻译：具有高介电常数绝缘膜的半导体器件及其制造方法
公开(公告)号：US07164169B2
公开(公告)日：2007-01-16
申请号：US10477109
申请日：2002-08-22
申请人： Heiji Watanabe , Haruhiko Ono , Nobuyuki Ikarashi
发明人： Heiji Watanabe , Haruhiko Ono , Nobuyuki Ikarashi
IPC分类号： H01L27/12 , H01L29/24 , H01L35/26 , H01L29/40
CPC分类号： H01L21/02142 , H01L21/02271 , H01L21/28185 , H01L21/28194 , H01L21/31604 , H01L21/31612 , H01L21/31637 , H01L21/31641 , H01L21/31645 , H01L29/517
摘要： A semiconductor device has a substrate and a dielectric film formed directly or indirectly on the substrate. The dielectric film contains a metal silicate film, and a silicon concentration in the metal silicate film is lower in a center portion in the film thickness direction than in an upper portion and in a lower portion.
摘要翻译：半导体器件具有直接或间接地形成在衬底上的衬底和电介质膜。电介质膜含有金属硅酸盐膜，并且在膜厚度方向上的中心部分，金属硅酸盐膜中的硅浓度比上部和下部低。

5. 发明授权

US06521930B2 Semiconductor device having Ta2O5 thin film 有权
标题翻译：具有Ta2O5薄膜的半导体器件
公开(公告)号：US06521930B2
公开(公告)日：2003-02-18
申请号：US09875340
申请日：2001-06-06
申请人： Haruhiko Ono
发明人： Haruhiko Ono
IPC分类号： H01L2976
CPC分类号： H01L21/02183 , H01L21/02271 , H01L21/02323 , H01L21/02337 , H01L21/02348 , H01L21/31604
摘要： In the case where a Ta2O5 thin film having double bond Ta═O is employed for a capacitative insulating film, Rapid Thermal Anneal in oxygen, and UV/O3 treatment are executed at suitable temperature and in suitable time. Whether or not absorption peak which appears in 2340 cm−1 exists and whether it is large or small are monitored by measuring a transmission infrared absorption spectrum of a Ta2O5 thin film with Fourier Transform Infrared Spectroscopy. In the case where a Ta2O5 thin film, in which an abundance ratio of oxygen in a three coordinate bonding state is large, is employed for a capacitative insulating film, an intensity ratio of each double peak which appears in 510 cm−1 and 570 cm−1 is measured as well, so that the film whose ratio (510/570) is larger than another one is used as Man character to improve quality of a film. Consequently, it is made possible to provide a manufacturing method of a semiconductor device in which a Ta2O5 thin film, which has high permittivity and low leak current, is employed for a capacitative insulating film.
摘要翻译：在具有双键Ta = O的Ta 2 O 5薄膜用于电容性绝缘膜的情况下，氧气中的快速热退火和UV / O 3处理在合适的温度和适当的时间内进行。通过用傅立叶变换红外光谱测量Ta2O5薄膜的透射红外吸收光谱来监测是否存在2340cm-1中出现的吸收峰以及它是大还是小。在电容性绝缘膜中采用其中三配位结合状态的氧的丰度比大的Ta 2 O 5薄膜为510cm -1和570cm的每个双峰的强度比 -1也被测量，使得比率（510/570）大于另一个的膜被用作人物角色以提高膜的质量。因此，可以提供一种半导体器件的制造方法，其中采用具有高介电常数和低漏电流的Ta 2 O 5薄膜用于电容绝缘膜。

6. 发明授权

US07495264B2 Semiconductor device with high dielectric constant insulating film and manufacturing method for the same 有权
标题翻译：具有高介电常数绝缘膜的半导体器件及其制造方法相同
公开(公告)号：US07495264B2
公开(公告)日：2009-02-24
申请号：US11608078
申请日：2006-12-07
申请人： Heiji Watanabe , Haruhiko Ono , Nobuyuki Ikarashi
发明人： Heiji Watanabe , Haruhiko Ono , Nobuyuki Ikarashi
IPC分类号： H01L21/00 , H01L21/331 , H01L21/22
CPC分类号： H01L21/02142 , H01L21/02271 , H01L21/28185 , H01L21/28194 , H01L21/31604 , H01L21/31612 , H01L21/31637 , H01L21/31641 , H01L21/31645 , H01L29/517
摘要： A semiconductor device has a substrate and a dielectric film formed directly or indirectly on the substrate. The dielectric film contains a metal silicate film, and a silicon concentration in the metal silicate film is lower in a center portion in the film thickness direction than in an upper portion and in a lower portion.
摘要翻译：半导体器件具有直接或间接地形成在衬底上的衬底和电介质膜。电介质膜含有金属硅酸盐膜，并且在膜厚度方向上的中心部分，金属硅酸盐膜中的硅浓度比上部和下部低。

7. 发明授权

US06459126B1 Semiconductor device including a MIS transistor 有权
标题翻译：包括MIS晶体管的半导体器件
公开(公告)号：US06459126B1
公开(公告)日：2002-10-01
申请号：US09852658
申请日：2001-05-11
申请人： Tohru Mogami , Mitsuhiro Togo , Koji Watanabe , Toyoji Yamamoto , Nobuyuki Ikarashi , Kazutoshi Shiba , Toru Tatsumi , Haruhiko Ono
发明人： Tohru Mogami , Mitsuhiro Togo , Koji Watanabe , Toyoji Yamamoto , Nobuyuki Ikarashi , Kazutoshi Shiba , Toru Tatsumi , Haruhiko Ono
IPC分类号： H01L2362
CPC分类号： H01L21/28185 , H01L21/28202 , H01L21/823462 , H01L29/513 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： A MIS transistor has a gate insulating film made of silicon oxynitride and having a specific dielectric constant which is larger than the expected specific dielectric constant calculated based on a weighted average of the specific dielectric constants based on the weight ratio of the silicon oxide and the silicon nitride contained in the silicon oxynitride film. The gate insulating film having a smaller thickness prevents impurities in the overlying gate electrode from penetrating through the gate insulating film to degrade the silicon substrate.
摘要翻译： MIS晶体管具有由氮氧化硅制成的栅极绝缘膜，其具有比基于氧化硅和硅的重量比的基于特定介电常数的加权平均值计算的预期比介电常数的比介电常数包含在氮氧化硅膜中的氮化物。具有较小厚度的栅极绝缘膜防止上覆栅极电极中的杂质穿过栅极绝缘膜而劣化硅衬底。

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