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1. 发明授权

US5609737A Film manufacturing method using single reaction chamber for chemical-vapor deposition and sputtering 失效
标题翻译：使用单反应室进行化学气相沉积和溅射的膜制造方法
公开(公告)号：US5609737A
公开(公告)日：1997-03-11
申请号：US289713
申请日：1994-08-12
申请人： Hirofumi Fukui , Masanori Miyazaki , Masami Aihara , Chisato Iwasaki , Koichi Fukuda , Yasuhiko Kasama
发明人： Hirofumi Fukui , Masanori Miyazaki , Masami Aihara , Chisato Iwasaki , Koichi Fukuda , Yasuhiko Kasama
IPC分类号： H01L21/205 , C23C14/34 , C23C16/02 , C23C16/44 , C23C16/509 , H01L21/203 , H01L21/31 , H01L21/336 , H01L21/77 , H01L31/20 , C23C16/00
CPC分类号： H01L29/66765 , C23C14/34 , C23C16/0245 , C23C16/4405 , C23C16/5096 , H01J37/34 , H01L31/202 , H01J2237/32 , H01L27/1214 , Y02E10/50 , Y02P70/521
摘要： A method for manufacturing thin films in which a first film is formed on a substrate using chemical-vapor deposition (CVD), and a second film is formed on the substrate using sputtering, wherein the processes are sequentially performed in the same deposition chamber without exposing the substrate to an oxidative atmosphere. The deposition chamber includes a first electrode, and a second electrode located under the first electrode. During the CVD process, a dummy target is mounted on the first electrode and the substrate is mounted on the second electrode, a reactive gas is introduced into the chamber, and high frequency electrical power is applied to both the first and second electrodes, thereby causing the constituents of the reactive gas to deposit on the substrate to form the first film. Subsequently, any remaining reactive gas is removed from the chamber and an automated mechanism removes the dummy target from the first electrode and stores the dummy target in a storage chamber. A sputtering electrode is then mounted on the first electrode and a sputtering gas is introduced into the reaction chamber. High frequency electrical power is then applied to both the first and second electrodes, thereby causing the sputtering gas and sputtering target to deposit the second film on the substrate.
摘要翻译：一种用于制造薄膜的方法，其中使用化学气相沉积（CVD）在基板上形成第一膜，并且使用溅射在所述基板上形成第二膜，其中所述工艺在相同的沉积室中依次进行而不暴露底物转化为氧化性气氛。沉积室包括第一电极和位于第一电极下方的第二电极。在CVD工艺期间，将虚拟目标物安装在第一电极上，并且将基板安装在第二电极上，将反应性气体引入室中，并且将高频电力施加到第一和第二电极两者，由此引起反应气体的成分沉积在基底上以形成第一膜。随后，将任何剩余的反应气体从室中除去，并且自动化机构从第一电极移除虚设目标物并将虚拟目标物存储在储存室中。然后将溅射电极安装在第一电极上，并将溅射气体引入反应室。然后将高频电力施加到第一和第二电极，由此使溅射气体和溅射靶将第二膜沉积在基板上。

2. 发明授权

US5755938A Single chamber for CVD and sputtering film manufacturing 失效
标题翻译：用于CVD和溅射膜制造的单室
公开(公告)号：US5755938A
公开(公告)日：1998-05-26
申请号：US556188
申请日：1995-11-09
申请人： Hirofumi Fukui , Masanori Miyazaki , Masami Aihara , Chisato Iwasaki , Koichi Fukuda , Yasuhiko Kasama
发明人： Hirofumi Fukui , Masanori Miyazaki , Masami Aihara , Chisato Iwasaki , Koichi Fukuda , Yasuhiko Kasama
IPC分类号： H01L21/205 , C23C14/34 , C23C16/02 , C23C16/44 , C23C16/509 , H01L21/203 , H01L21/31 , H01L21/336 , H01L21/77 , H01L31/20 , C23C16/00
CPC分类号： H01L29/66765 , C23C14/34 , C23C16/0245 , C23C16/4405 , C23C16/5096 , H01J37/34 , H01L31/202 , H01J2237/32 , H01L27/1214 , Y02E10/50 , Y02P70/521
摘要： An apparatus which allows a first film to be formed on a substrate by chemical vapor deposition (CVD) and a second film to be formed on the substrate by sputtering, wherein the processes are performed sequentially in the same deposition chamber without exposing the substrate to an oxidative atmosphere. The deposition chamber includes a first electrode and a second electrode located under the first electrode. A transfer mechanism loads a dummy target onto the first electrode and the substrate onto the second electrode prior to a CVD process. The dummy target is resistant to sputtering and thus does not contaminate the film deposited on the substrate during CVD. After CVD and prior to sputtering, the transfer mechanism unloads the dummy target and replaces it with a sputtering target for film formation by sputtering. Both the dummy target and sputtering target can be loaded and unloaded from a single pressurized storage chamber. Thus, film formation by both sputtering and CVD can be accomplished by using a single deposition chamber without removing the substrate between processes.
摘要翻译：一种允许通过化学气相沉积（CVD）在衬底上形成第一膜和通过溅射形成在衬底上的第二膜的装置，其中在相同的沉积室中顺序地进行处理，而不将衬底暴露于氧化气氛。沉积室包括位于第一电极下方的第一电极和第二电极。转移机构在CVD工艺之前将虚拟靶加载到第二电极上的第一电极和衬底上。虚拟靶对溅射是耐受的，因此在CVD期间不会污染沉积在衬底上的膜。在CVD之后并且在溅射之前，转移机构卸载虚拟靶并用用溅射的成膜溅射靶代替它。虚拟靶和溅射靶都可以从单个加压储存室装载和卸载。因此，通过溅射和CVD的成膜可以通过使用单个沉积室而不在工艺之间移除基板来实现。

3. 发明授权

US5550091A Method of sputtering a silicon nitride film 失效
标题翻译：溅射氮化硅膜的方法
公开(公告)号：US5550091A
公开(公告)日：1996-08-27
申请号：US437606
申请日：1995-05-09
申请人： Koichi Fukuda , Tomofumi Oba , Masanori Miyazaki , Hirofumi Fukui , Chisato Iwasaki , Yasuhiko Kasama , Tadahiro Ohmi , Masaru Kubota , Hitoshi Kitagawa , Akira Nakano , Osamu Yoshida
发明人： Koichi Fukuda , Tomofumi Oba , Masanori Miyazaki , Hirofumi Fukui , Chisato Iwasaki , Yasuhiko Kasama , Tadahiro Ohmi , Masaru Kubota , Hitoshi Kitagawa , Akira Nakano , Osamu Yoshida
IPC分类号： C23C14/06 , H01L21/02 , H01L21/28 , H01L21/31 , H01L21/318 , H01L21/331 , H01L21/336
CPC分类号： C23C14/0652 , H01L21/0217 , H01L21/02211 , H01L21/02274 , H01L21/28008 , H01L21/3185 , H01L28/40 , H01L29/66765
摘要： There is provided an electronic device like a TFT using a silicon nitride insulating film of a single layer structure having an excellent dielectric voltage, and a method of producing the electronic device with reliability. In the electronic device, a conductive wiring pattern is deposited on a surface of an electrically insulated substrate, and an insulating layer is formed to cover the wiring pattern and the substrate. The insulating layer is made of a silicon nitride insulating film. A contact angle .theta. between the wiring pattern and the substrate is equals 60.degree. or more, and a value Tn1/Tg of a thickness Tn1 of the silicon nitride insulating film and a thickness Tg of the wiring pattern equals 2 or more. A horizontal distance Tn2 between a rise start position, where the silicon nitride film rises because of a step of the wiring pattern and the top end of the wiring pattern, and Tn1 are in a relation where 0.6.ltoreq.Tn2/Tn1.
摘要翻译：提供了一种使用具有优异的介电电压的单层结构的氮化硅绝缘膜的TFT的电子器件，以及可靠地制造该电子器件的方法。在电子设备中，在电绝缘基板的表面上沉积导电布线图案，并且形成绝缘层以覆盖布线图案和基板。绝缘层由氮化硅绝缘膜制成。布线图案和基板之间的接触角θ等于60°以上，氮化硅绝缘膜的厚度Tn1的值Tn1 / Tg和布线图案的厚度Tg等于2以上。由于布线图案的台阶和布线图案的上端而形成的氮化硅膜的上升起始位置和Tn1之间的水平距离Tn2为0.6

4. 发明授权

US5570031A Substrate surface potential measuring apparatus and plasma equipment 失效
标题翻译：基板表面电位测量装置和等离子体设备
公开(公告)号：US5570031A
公开(公告)日：1996-10-29
申请号：US336903
申请日：1994-11-10
申请人： Makoto Sasaki , Hirofumi Fukui , Masami Aihara , Koichi Fukuda , Yasuhiko Kasama , Tadahiro Ohmi
发明人： Makoto Sasaki , Hirofumi Fukui , Masami Aihara , Koichi Fukuda , Yasuhiko Kasama , Tadahiro Ohmi
IPC分类号： H01L21/302 , G01R29/12 , G01R31/28 , H01L21/203 , H01L21/205 , H01L21/3065 , H01L21/66 , G01R31/302 , G01R19/00
CPC分类号： G01R29/12 , G01R31/2831 , H01L22/14 , H01L2924/0002
摘要： There is provided a surface potential measuring apparatus cable of accurately measuring the potential of a substrate regardless of the material of the substrate, and a plasma equipment capable of accurately measuring and controlling ion energy. The substrate surface potential measuring apparatus measures the surface potential of a substrate in a plasma processing apparatus and includes a terminal electrically connected to a suscepter electrode for holding the substrate, a first condenser disposed between the terminal and the ground and a potential measuring device for measuring the potential of the terminal. The surface potential of the substrate is found from the potential of the suscepter electrode measured by the potential measuring means.
摘要翻译：提供了一种能够精确地测量衬底的电位的表面电位测量装置电缆，而不管衬底的材料如何，以及能够精确地测量和控制离子能量的等离子体设备。基板表面电位测量装置测量等离子体处理装置中的基板的表面电位，并且包括电连接到用于保持基板的可变电极的端子，设置在端子和地之间的第一冷凝器和用于测量的电位测量装置终端的潜力。基于由电位测量装置测量的电容器的电位，找到衬底的表面电位。

5. 发明授权

US5714407A Etching agent, electronic device and method of manufacturing the device 失效
标题翻译：蚀刻剂，电子装置及其制造方法
公开(公告)号：US5714407A
公开(公告)日：1998-02-03
申请号：US414973
申请日：1995-03-31
申请人： Matagoro Maeno , Masayuki Miyashita , Hirohisa Kikuyama , Tatsuhiro Yabune , Jun Takano , Hirofumi Fukui , Satoshi Miyazawa , Chisato Iwasaki , Tadahiro Ohmi , Yasuhiko Kasama , Hitoshi Seki
发明人： Matagoro Maeno , Masayuki Miyashita , Hirohisa Kikuyama , Tatsuhiro Yabune , Jun Takano , Hirofumi Fukui , Satoshi Miyazawa , Chisato Iwasaki , Tadahiro Ohmi , Yasuhiko Kasama , Hitoshi Seki
IPC分类号： C09K13/08 , H01L21/3213 , H01L21/00 , C09K13/00
CPC分类号： H01L21/32134 , C09K13/08
摘要： An etching agent and an electronic device manufacturing method using the etching agent. The etching agent contains, in a solution, hydrofluoric acid at a concentration of 0.05 to 0.5 mol/l, and halooxoacid ions, represented by the formula (XO.sub.n).sup.p- (wherein X is a halogen element, n is 3, 4 or 6, p is 1, 2 or 3), at a concentration of at least 0.01 mol/l. An electronic device manufactured using the etching agent requires only a single etching step to etch both conductive layers (such as aluminum) as well as ohmic contact layers (a-Si).
摘要翻译：蚀刻剂和使用该蚀刻剂的电子器件制造方法。蚀刻剂在溶液中含有浓度为0.05〜0.5mol / l的氢氟酸和由式（XOn）p-（其中X为卤素元素，n为3,4或6）表示的卤代酸离子，p为1,2或3），浓度为至少0.01mol / l。使用蚀刻剂制造的电子器件仅需要蚀刻两个导电层（例如铝）以及欧姆接触层（a-Si）的单一蚀刻步骤。

6. 发明授权

US5623161A Electronic element and method of producing same 失效
标题翻译：电子元件及其制造方法
公开(公告)号：US5623161A
公开(公告)日：1997-04-22
申请号：US442906
申请日：1995-05-17
申请人： Koichi Fukuda , Tomofumi Oba , Chisato Iwasaki , Yasuhiko Kasama , Tadahiro Ohmi
发明人： Koichi Fukuda , Tomofumi Oba , Chisato Iwasaki , Yasuhiko Kasama , Tadahiro Ohmi
IPC分类号： H01L21/318 , G02F1/1362 , H01L21/28 , H01L21/336 , H01L21/768 , H01L21/77 , H01L21/84 , H01L23/29 , H01L27/12 , H01L29/49 , H01L29/78 , H01L29/786 , H01L23/58
CPC分类号： H01L23/291 , H01L21/28008 , H01L21/76801 , H01L29/4908 , H01L29/66765 , G02F1/1362 , H01L2924/0002 , H01L2924/09701
摘要： An electronic element having a sufficient dielectric strength remarkably superior to any of the conventional ones. In this element, a conductive wire pattern is formed on the surface of a substrate which is insulative at least in its surface, and an insulating layer is so formed as to cover the substrate and the wire pattern either partially or entirely. The insulating layer is composed of a silicon nitride film where the oxygen content is less than 10 atomic percent at least in the vicinity of a step portion of the wire pattern. There is also provided a method of producing such electronic element, wherein the insulating layer is formed by plasma enhanced CVD under the conditions that the following relationship among a film forming temperature T (.degree. C.), an ion flux I (A) and a film forming speed v (nm/min): T.gtoreq.-651 (I/v)+390, 150.ltoreq.T.ltoreq.350 (where the ion flux denotes the current (A) per 60.times.60 cm.sup.2). According to this method, an insulating film of a high withstand voltage with a great dielectric strength can be obtained stably at a high yield rate.
摘要翻译：具有显着优于常规电介质的电介质强度的电子元件。在该元件中，在至少在其表面上绝缘的基板的表面上形成导线图案，并且形成绝缘层以部分或全部覆盖基板和线图案。绝缘层由至少在导线图案的台阶附近的氧含量小于10原子％的氮化硅膜构成。还提供了一种制造这种电子元件的方法，其中通过等离子体增强CVD形成绝缘层，条件是成膜温度T（℃），离子通量I（A）和成膜速度v（nm / min）：T> / = - 651（I / V）+390,150

7. 发明授权

US5573958A Method of fabricating a thin film transistor wherein the gate terminal is formed after the gate insulator 失效
标题翻译：制造薄膜晶体管的方法，其中栅极端子形成在栅极绝缘体之后
公开(公告)号：US5573958A
公开(公告)日：1996-11-12
申请号：US338713
申请日：1994-11-14
申请人： Hirofumi Fukui , Masanori Miyazaki , Hitoshi Seki , Makoto Sasaki , Yasuhiko Kasama
发明人： Hirofumi Fukui , Masanori Miyazaki , Hitoshi Seki , Makoto Sasaki , Yasuhiko Kasama
IPC分类号： G02F1/136 , G02F1/1362 , G02F1/1368 , H01L21/336 , H01L21/77 , H01L21/84 , H01L29/78 , H01L29/786 , H01L29/784
CPC分类号： G02F1/13458 , G02F1/1362 , H01L27/124 , H01L27/1259 , H01L29/66765
摘要： A method of fabricating a thin film transistor of an inverted stagger structure having a gate terminal, a gate insulator a semiconductor film, a source electrode and a drain electrode formed in that order; a gate terminal and a gate wiring are provided for supplying a scanning signal to the gate electrode; and a source terminal and a source wiring are provided for supplying a data signal to the source electrode, wherein the gate terminal is formed on an upper side of the gate insulating film and electrically connected to the gate wiring through a contact hole formed in the gate insulator.
摘要翻译：一种制造具有栅极端子，栅绝缘体，半导体膜，源电极和漏电极的反交错结构的薄膜晶体管的方法，该反向交错结构以该顺序形成。栅极端子和栅极布线用于向栅电极提供扫描信号; 并且提供源极端子和源极布线用于向源电极提供数据信号，其中栅极端子形成在栅极绝缘膜的上侧，并通过形成在栅极中的接触孔电连接到栅极布线绝缘子。

8. 发明授权

US4839510A Optical sensor including shortcircuit protection having notched electrode regions 失效
标题翻译：光传感器，包括具有凹口电极区域的短路保护
公开(公告)号：US4839510A
公开(公告)日：1989-06-13
申请号：US160703
申请日：1988-02-26
申请人： Kazuya Okabe , Yasuhiko Kasama , Hitoshi Seki , Chisato Iwasaki
发明人： Kazuya Okabe , Yasuhiko Kasama , Hitoshi Seki , Chisato Iwasaki
IPC分类号： H01L31/0248 , H01L31/0224 , H01L31/08 , H01L31/09
CPC分类号： H01L31/095 , H01L31/0224 , H01L31/09
摘要： In an optical sensor, there is a risk that a short-circuit occurs in a gap between opposite electrodes on a photoconductive body. A pair of band-shaped electrodes each having a width of "W" are formed on the photoconductive body under the condition that these electrodes are positioned opposite to each other via the gap having an interval of "L". A band-shaped first notch portion having a length of "W/2" and a width of "L" is formed which is opened to the gap. Furthermore, a second notch portion is formed which is closed other than the portion thereof communicated to the first notch portion. Thus, first and second bridge portions are formed in one electrode where the first and second notch portions have been formed. When the opposite electrodes are shortcircuited, one of these bridge portions is cut out so that the tip portion of the cut electrode functions as another electrode.
摘要翻译：在光学传感器中，存在在光电导体上的相对电极之间的间隙中发生短路的风险。在这些电极通过间隔为“L”的间隙彼此相对定位的条件下，在光电导体上形成一对宽度为“W”的带状电极。形成长度为“W / 2”且宽度“L”的带状的第一切口部分，其向间隙开口。此外，形成除了与第一切口部分相通的部分之外关闭的第二切口部分。因此，第一和第二桥接部分形成在形成第一和第二切口部分的一个电极中。当相对电极短路时，切出这些桥接部分之一，使得切割电极的尖端部分起另一电极的作用。

9. 发明授权

US5681487A Method of removing photoresist film 失效
标题翻译：去除光刻胶膜的方法
公开(公告)号：US5681487A
公开(公告)日：1997-10-28
申请号：US499538
申请日：1995-07-07
申请人： Hitoshi Seki , Chisato Iwasaki , Akane Sekiya , Yasuhiko Kasama , Tadahiro Ohmi
发明人： Hitoshi Seki , Chisato Iwasaki , Akane Sekiya , Yasuhiko Kasama , Tadahiro Ohmi
IPC分类号： G03F7/42 , H01L21/027 , G03C11/00
CPC分类号： G03F7/42
摘要： The present invention provides a method of removing a photoresist film, which exhibits the high ability to remove photoresist and excellent safety and handling properties such as workability, In the removing method, the photoresist film is removed by chemical decomposition in an inorganic aqueous solution under ultraviolet-light irradiation. The inorganic aqueous solution is an aqueous solution of peroxomonosulfate or an aqueous solution containing 4.5 to 36 wt % of sulfuric acid and 0.05 to 0.8 wt % of hydrogen peroxide.
摘要翻译：本发明提供一种去除光致抗蚀剂膜的方法，其具有高的去除光致抗蚀剂的能力和优异的安全性和操作性能如可加工性。在去除方法中，通过在紫外线下的无机水溶液中通过化学分解除去光致抗蚀剂膜光线照射。无机水溶液是含硫酸盐的水溶液或含有4.5〜36重量％的硫酸和0.05〜0.8重量％的过氧化氢的水溶液。

10. 发明授权

US4786780A Method for trimming thin-film transistor array 失效
标题翻译：薄膜晶体管阵列的修整方法
公开(公告)号：US4786780A
公开(公告)日：1988-11-22
申请号：US160533
申请日：1988-02-26
申请人： Kazuya Oakabe , Chisato Iwasaki , Hitoshi Seki , Yasuhiko Kasama
发明人： Kazuya Oakabe , Chisato Iwasaki , Hitoshi Seki , Yasuhiko Kasama
IPC分类号： H01L21/82 , G02F1/13 , G02F1/136 , G02F1/1362 , G02F1/1368 , G09F9/30 , H01L21/768 , H01L27/12 , H01L29/78 , H01L29/786 , B23K26/00
CPC分类号： H01L21/76886 , G02F1/136259 , G02F2001/136263
摘要： A thin-film transistor array is constructed of at least a first thin-film transistor and a second thin-film transistor connected in parallel with the first thin-film transistor. These transistors are formed on a substrate under the condition that a source bus and a gate bus are connected to these transistors with forming a crossover portion. These parallel-connected transistors drive one pixel of a liquid crystal element. The first and second thin-film transistors are independently positioned in a symmetrically positional relationship with sandwiching the gate and source buses. In accordance with a laser trimming method of the invention, either gate bus or source bus located at one side of the crossover portion is first cut out so as to electrically disconnect the normally operable thin-film transistor from the array.
摘要翻译：薄膜晶体管阵列由与第一薄膜晶体管并联连接的至少第一薄膜晶体管和第二薄膜晶体管构成。在源极总线和栅极总线与形成交叉部分的这些晶体管连接的条件下，在基板上形成这些晶体管。这些并联连接的晶体管驱动液晶元件的一个像素。第一和第二薄膜晶体管独立地以对称位置关系定位，夹着栅极和源极总线。根据本发明的激光修整方法，首先切割位于交叉部分一侧的栅极总线或源极总线，以将正常操作的薄膜晶体管与阵列电断开。

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