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1. 发明授权

US5598370A Nonvolatile memory with cluster-erase flash capability and solid state file apparatus using the same 失效
标题翻译：具有簇擦除闪存能力的非易失性存储器和使用其的固态文件设备
公开(公告)号：US5598370A
公开(公告)日：1997-01-28
申请号：US429395
申请日：1995-04-26
申请人： Hideto Niijima , Hideo Asano , Yoshinori Sakaue , Takashi Toyooka
发明人： Hideto Niijima , Hideo Asano , Yoshinori Sakaue , Takashi Toyooka
IPC分类号： G06F3/08 , G06F3/06 , G06F12/00 , G06F12/02 , G11C16/02 , G11C16/10 , G11C17/00 , G11C13/00
CPC分类号： G06F3/0601 , G06F12/023 , G06F12/0246 , G11C16/102 , G06F2003/0694 , G06F2212/7209
摘要： A nonvolatile memory-with cluster-erase flash capability. A cluster information sector is included in each of N clusters, the cluster information sector of each cluster being written with the sequence number assigned to the cluster so that no two clusters have the same sequence number. When erasing a given sector, a controller saves its sequence number prior to erasure. Then, when initializing a given erased sector, the controller sets its sequence number to a value greater than the current maximum sequence number. The controller writes user data to sectors other than the cluster information sector for the cluster thus initialized according to their address sequence. Accordingly, an invalid sector can be distinguished from a valid sector without using an overwrite approach.
摘要翻译：具有集群擦除闪存功能的非易失性存储器。集群信息扇区被包括在N个簇中的每一个中，每个簇的簇信息扇区被分配给簇的序列号写入，使得没有两个簇具有相同的序列号。擦除给定扇区时，控制器在擦除之前保存序列号。然后，当初始化给定的擦除扇区时，控制器将其序列号设置为大于当前最大序列号的值。控制器将用户数据写入群集信息扇区以外的扇区，根据其地址序列进行初始化。因此，可以将无效扇区与有效扇区区分开而不使用覆盖方法。

2. 发明授权

US5457658A Nonvolatile memory with cluster-erase flash capability and solid state file apparatus using the same 失效
标题翻译：具有簇擦除闪存能力的非易失性存储器和使用其的固态文件设备
公开(公告)号：US5457658A
公开(公告)日：1995-10-10
申请号：US200343
申请日：1994-02-23
申请人： Hideto Niijima , Hideo Asano , Yoshinori Sakaue , Takashi Toyooka
发明人： Hideto Niijima , Hideo Asano , Yoshinori Sakaue , Takashi Toyooka
IPC分类号： G06F3/08 , G06F3/06 , G06F12/00 , G06F12/02 , G11C16/02 , G11C16/10 , G11C17/00 , G11C13/00
CPC分类号： G06F3/0601 , G06F12/023 , G06F12/0246 , G11C16/102 , G06F2003/0694 , G06F2212/7209
摘要： A nonvolatile memory with cluster-erase flash capability. A cluster information sector is included in each of N clusters, the cluster information sector of each cluster being written with the sequence number assigned to the cluster so that no two clusters have the same sequence number. When erasing a given sector, a controller saves its sequence number prior to erasure. Then, when initializing a given erased sector, the controller sets its sequence number to a value greater than the current maximum sequence number. The controller writes user data to sectors other than the cluster information sector for the cluster thus initialized according to their address sequence. Accordingly, an invalid sector can be distinguished from a valid sector without using an overwrite approach.
摘要翻译：具有集群擦除闪存功能的非易失性存储器。集群信息扇区被包括在N个簇中的每一个中，每个簇的簇信息扇区被分配给簇的序列号写入，使得没有两个簇具有相同的序列号。擦除给定扇区时，控制器在擦除之前保存序列号。然后，当初始化给定的擦除扇区时，控制器将其序列号设置为大于当前最大序列号的值。控制器将用户数据写入群集信息扇区以外的扇区，根据其地址序列进行初始化。因此，可以将无效扇区与有效扇区区分开而不使用覆盖方法。

3. 发明授权

US5546402A Flash-erase-type nonvolatile semiconductor storage device 失效
标题翻译：闪存擦除型非易失性半导体存储器件
公开(公告)号：US5546402A
公开(公告)日：1996-08-13
申请号：US475524
申请日：1995-06-07
申请人： Hideto Niijima , Takashi Toyooka , Akashi Satoh , Yoshinori Sakaue
发明人： Hideto Niijima , Takashi Toyooka , Akashi Satoh , Yoshinori Sakaue
IPC分类号： G11C17/00 , G06F11/10 , G11C16/02 , G11C16/06 , G11C16/16 , G11C16/22 , G11C29/00 , G11C29/04 , G11C29/42 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792 , G11C11/34
CPC分类号： G11C29/765 , G11C16/16 , G11C16/22 , G11C29/82 , G11C29/88 , G06F11/1068
摘要： An array of memory cells is physically divided into a data area and a tag area so that respective parts of the two areas share a word line but can be separately erased en bloc. The data area and tag area sharing one word line constitute a single logical unit. In the logical unit, the tag area stores location information for defective memory cells in the corresponding data area. On the basis of this information, the system avoids the use of the defective memory cells. The defective memory cell information is programmed in a test step performed after chip manufacture and, at the same time, ECCs are generated for the defective memory cell information and written to the tag area. Furthermore, the system is informed of the invalidity of the data area that shares a word line with a tag area by writing predetermined data to the tag area. Even when the data area is erased en bloc, the tag area is not erased and the defective memory cell information is retained there.
摘要翻译：存储单元的阵列被物理地划分为数据区和标签区，使得两个区的各个部分共享一个字线，但是可以被单独地擦除。共享一个字线的数据区域和标签区域构成单个逻辑单元。在逻辑单元中，标签区域存储相应数据区域中的缺陷存储器单元的位置信息。在此信息的基础上，系统避免使用有缺陷的存储单元。在芯片制造之后执行的测试步骤中编程有缺陷的存储器单元信息，并且同时为缺陷存储器单元信息生成ECC并写入标签区域。此外，通过向标签区域写入预定数据，向系统通知与标签区域共享字线的数据区域的无效。即使数据区域被整体擦除，标签区域也不被擦除，并且存储单元信息被保留在那里。

4. 发明授权

US5509018A Flash-erase-type nonvolatile semiconductor storage device 失效
标题翻译：闪存擦除型非易失性半导体存储器件
公开(公告)号：US5509018A
公开(公告)日：1996-04-16
申请号：US119916
申请日：1993-09-10
申请人： Hideto Niijima , Takashi Toyooka , Akashi Satoh , Yoshinori Sakaue
发明人： Hideto Niijima , Takashi Toyooka , Akashi Satoh , Yoshinori Sakaue
IPC分类号： G11C17/00 , G06F11/10 , G11C16/02 , G11C16/06 , G11C16/16 , G11C16/22 , G11C29/00 , G11C29/04 , G11C29/42 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792 , G06F11/00 , G11C11/40
CPC分类号： G11C29/765 , G11C16/16 , G11C16/22 , G11C29/82 , G11C29/88 , G06F11/1068
摘要： An array of memory cells is physically divided into a data area and a tag area so that respective parts of the two areas share a word line but can be separately erased en bloc. The data area and tag area sharing one word line constitute a single logical unit. In the logical unit, the tag area stores location information for defective memory cells in the corresponding data area. On the basis of this information, the system avoids the use of the defective memory cells. The defective memory cell information is programmed in a test step performed after chip manufacture and, at the same time, ECCs are generated for the defective memory cell information and written to the tag area. Furthermore, the system is informed of the validity of the data area that shares a word line with a tag area by writing predetermined data to the tag area. Even when the data area is erased en bloc, the tag area is not erased and the defective memory cell information is retained there.
摘要翻译：存储单元的阵列被物理地划分成数据区和标签区，使得两个区的各个部分共享一个字线，但是可以被单独地擦除。共享一个字线的数据区域和标签区域构成单个逻辑单元。在逻辑单元中，标签区域存储相应数据区域中的缺陷存储器单元的位置信息。在此信息的基础上，系统避免使用有缺陷的存储单元。在芯片制造之后执行的测试步骤中编程有缺陷的存储器单元信息，并且同时为缺陷存储器单元信息生成ECC并写入标签区域。此外，通过向标签区域写入预定数据，向系统通知与标签区域共享字线的数据区域的有效性。即使数据区域被整体擦除，标签区域也不被擦除，并且存储单元信息被保留在那里。

5. 发明授权

US5844910A Flash-erase-type nonvolatile semiconductor storage device 失效
公开(公告)号：US5844910A
公开(公告)日：1998-12-01
申请号：US694002
申请日：1996-08-07
申请人： Hideto Niijima , Takashi Toyooka , Akashi Satoh , Yoshinori Sakaue
发明人： Hideto Niijima , Takashi Toyooka , Akashi Satoh , Yoshinori Sakaue
IPC分类号： G11C17/00 , G06F11/10 , G11C16/02 , G11C16/06 , G11C16/16 , G11C16/22 , G11C29/00 , G11C29/04 , G11C29/42 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792 , G06F11/00
CPC分类号： G11C29/765 , G11C16/16 , G11C16/22 , G11C29/82 , G11C29/88 , G06F11/1068
摘要： An array of memory cells is physically divided into a data area and a tag area so that respective parts of the two areas share a word line but can be separately erased en bloc. The data area and tag area sharing one word line constitute a single logical unit. In the logical unit, the tag area stores location information for defective memory cells in the corresponding data area. On the basis of this information, the system avoids the use of the defective memory cells. The defective memory cell information is programmed in a test step performed after chip manufacture and, at the same time, ECCs are generated for the defective memory cell information and written to the tag area. Furthermore, the system is informed of the invalidity of the data area that shares a word line with a tag area by writing predetermined data to the tag area. Even when the data area is erased en bloc, the tag area is not erased and the defective memory cell information is retained there.

6. 发明授权

US5524230A External information storage system with a semiconductor memory 失效
标题翻译：具有半导体存储器的外部信息存储系统
公开(公告)号：US5524230A
公开(公告)日：1996-06-04
申请号：US410589
申请日：1995-03-27
申请人： Yoshinori Sakaue , Hideto Niijima
发明人： Yoshinori Sakaue , Hideto Niijima
IPC分类号： G06F3/08 , G06F3/06 , G06F12/00 , G06F12/02 , G06F12/08 , G06F12/12 , G11C16/02 , G11C16/10 , G11C16/34 , G11C17/00 , G06F12/10
CPC分类号： G06F3/0601 , G06F12/0866 , G06F12/122 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G11C16/102 , G11C16/349
摘要： To provide an external storage system using a semiconductor memory in which the data reading and writing between the host CPU can be processed faster than the conventional magnetic disk, and only a particular sector is not frequently written and erased so that the whole memory is effectively used over a long period of time. An address control scheme was introduced in which flexibility is given to the address relation between the host CPU and the external storage and the physical address of the semiconductor memory is not one-sidedly determined by the logical address possessed by the command of the host CPU. Command processing section 34 always prepares memory blocks and sectors for writing or erasing and copying in preparation for the command processing of the host CPU, and records and holds the correspondence relation between the physical address of the selected memory block 32i or sector and the command of the host CPU in address conversion table 36. The status of memory blocks and sectors is recorded in respective managing tables 35 and 60, and used for control of processings such as writing, erasing and copying in preparation for or in response to the command of the host CPU.
摘要翻译：为了提供使用半导体存储器的外部存储系统，其中可以比常规磁盘更快地处理主机CPU之间的数据读取和写入，并且只有特定扇区不被频繁地写入和擦除，使得整个存储器被有效地使用在很长一段时间内。引入了一种地址控制方案，其中主机CPU和外部存储器之间的地址关系具有灵活性，并且半导体存储器的物理地址不是由主机CPU的命令所拥有的逻辑地址单方面确定的。命令处理部34总是准备用于写入或擦除和复制的存储块和扇区，以准备主机CPU的命令处理，并且记录并保持所选择的存储器块32i或扇区的物理地址与命令地址转换表36中的主机CPU。存储器块和扇区的状态被记录在相应的管理表35和60中，并且用于控制诸如写入，擦除和复制的处理，以准备或响应于主机CPU。

7. 发明授权

US4527174A Sheet pressing mechanism in a pen type recording device 失效
标题翻译：笔式记录装置中的纸张按压机构
公开(公告)号：US4527174A
公开(公告)日：1985-07-02
申请号：US507179
申请日：1983-06-23
申请人： Mitsugu Fujiwara , Yoshinori Sakaue , Tomio Aso , Koshiro Kurokawa , Hideo Obara
发明人： Mitsugu Fujiwara , Yoshinori Sakaue , Tomio Aso , Koshiro Kurokawa , Hideo Obara
IPC分类号： B41J2/49 , B41J11/02 , B41J11/04 , B41J13/02 , B41J13/076 , B43L13/00 , G01D15/24 , B41J11/00 , B65H17/38
CPC分类号： B41J13/076 , B41J11/04
摘要： A sheet pressing mechanism in a pen type recording device including a rotatable platen and a pen adapted to move in the axial direction of the platen while contacting the platen, in which pressure rollers are brought into contact with outer peripheral surfaces of end portions of the platen, the pressure rollers being rotatably mounted on a support shaft extending in parallel with the axis of the platen, and in which the said outer peripheral surfaces of the end portions of the platen are formed of a soft material capable of being depressed by the contact pressure of the pressure rollers.
摘要翻译：一种笔式记录装置中的片材按压机构，包括可旋转的压板和适于在压板接触的同时在压板的轴向方向上移动的笔，其中压力辊与压板的端部的外周面接触压力辊可旋转地安装在与压板的轴线平行延伸的支撑轴上，并且压板的端部的所述外周表面由能够被接触压力压下的软质材料形成的压力辊。

8. 发明授权

US5468663A Method of fabricating three-dimensional direct-write EEPROM arrays 失效
标题翻译：制造三维直写EEPROM阵列的方法
公开(公告)号：US5468663A
公开(公告)日：1995-11-21
申请号：US405128
申请日：1995-03-16
申请人： Claude L. Bertin , Donelli J. DiMaria , Makoto Miyakawa , Yoshinori Sakaue
发明人： Claude L. Bertin , Donelli J. DiMaria , Makoto Miyakawa , Yoshinori Sakaue
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11556 , H01L27/115 , H01L29/7882
摘要： A three-dimensional memory cell, suitable for electrically erasable programmable read only memories (EEPROMS), which has direct-write cell capability is disclosed. The memory cell is utilized in the fabrication of non-volatile, direct-write EEPROM arrays with high integration density. A typical EEPROM array includes a plurality of elongated shallow trenches formed in a semiconductor substrate. Multiple direct-write EEPROM cells are disposed within each elongated trench such that each EEPROM cell shares a recall gate and a program gate with another cell in the same trench. Preferably, a silicon rich dielectric (such as silicon rich oxide) disposed between each floating gate and its associated programming and recall gates. Both common source diffusion and isolated source diffusion embodiments are disclosed. Further, various fabrication methods for the direct-write EEPROM arrays presented are described.
摘要翻译：公开了一种适用于具有直写单元能力的电可擦除可编程只读存储器（EEPROMS）的三维存储单元。存储单元用于制造具有高集成度密度的非易失性直写EEPROM阵列。典型的EEPROM阵列包括形成在半导体衬底中的多个细长的浅沟槽。多个直写EEPROM单元被布置在每个细长沟槽内，使得每个EEPROM单元与相同沟槽中的另一个单元共享回调门和编程门。优选地，设置在每个浮动栅极与其相关联的编程和调用栅极之间的富硅电介质（例如富氧氧化物）。公开了源极扩散和隔离源扩散实施例。此外，描述了所呈现的用于直写EEPROM阵列的各种制造方法。

9. 发明授权

US5963983A Method and apparatus for dynamically creating conversion tables to access a semiconductor memory device 失效
标题翻译：用于动态地创建用于访问半导体存储器件的转换表的方法和装置
公开(公告)号：US5963983A
公开(公告)日：1999-10-05
申请号：US842554
申请日：1997-04-15
申请人： Tohru Sakakura , Yoshinori Sakaue
发明人： Tohru Sakakura , Yoshinori Sakaue
IPC分类号： G06F3/06 , G06F3/08 , G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G06F12/0292 , G06F3/0607 , G06F3/0661 , G06F3/0679 , G06F2212/7201
摘要： An improved external semiconductor memory device having a work memory for storing logical address-physical address conversion information. According to one embodiment of the present invention, a semiconductor memory device, which is connected to a host computer system and can be addressed as predetermined sector units, comprises: (a) a data storage having a nonvolatile memory that can be electrically rewritten; (b) an interface connected to the host computer system for receiving an access request; (c) volatile work memory; (d) first table preparating means for preparing a first table in the volatile work memory, by the page which consists of a plurality of sectors, for converting the requested logical sector address into a physical sector address among a physical memory space of the data storage; (e) second table preparation means for preparing a second table in the volatile work memory, by the unit which consists of a plurality of pages, for converting a logical page numbers addressed by the access request into a physical page numbers among a physical memory space of the data storage; (f) second access control means for, in response to an access request from the host computer system, referring to the second table for a unit to which the designated logical sector address belongs in order to acquire a corresponding physical page number; (g) first access control means for, in response to an access request from the host computer system, referring to the first table for a physical page to which the designated logical sector address belongs in order to acquire a corresponding physical sector address; and (h) data access means for accessing the data storage in accordance with the acquired physical sector address.
摘要翻译：一种改进的外部半导体存储器件，具有存储逻辑地址 - 物理地址转换信息的工作存储器。根据本发明的一个实施例，连接到主计算机系统并且可以被寻址为预定扇区单元的半导体存储器件包括：（a）具有可被电重写的非易失性存储器的数据存储器; （b）连接到主计算机系统的用于接收访问请求的接口; （c）挥发性工作记忆; （d）用于通过由多个扇区组成的页面来准备易失性工作存储器中的第一表的第一表准备装置，用于将所请求的逻辑扇区地址转换成数据存储器的物理存储器空间中的物理扇区地址 ; （e）第二表准备装置，用于通过由多个页组成的单元来准备易失性工作存储器中的第二表，用于将由访问请求寻址的逻辑页码转换成物理存储空间中的物理页码的数据存储; （f）第二访问控制装置，用于响应于来自所述主计算机系统的访问请求，参考所述指定逻辑扇区地址所属的单元的第二表，以便获取对应的物理页码; （g）第一访问控制装置，用于响应于来自主计算机系统的访问请求，参考第一表，指定逻辑扇区地址所属的物理页，以便获取对应的物理扇区地址; 和（h）用于根据获取的物理扇区地址访问数据存储器的数据访问装置。

10. 发明授权

US5617351A Three-dimensional direct-write EEPROM arrays and fabrication methods 失效
标题翻译：三维直写EEPROM阵列及制作方法
公开(公告)号：US5617351A
公开(公告)日：1997-04-01
申请号：US464018
申请日：1995-06-05
申请人： Claude L. Bertin , Donelli J. DiMaria , Makoto Miyakawa , Yoshinori Sakaue
发明人： Claude L. Bertin , Donelli J. DiMaria , Makoto Miyakawa , Yoshinori Sakaue
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792 , G11C16/04
CPC分类号： H01L27/11556 , H01L27/115 , H01L29/7882
摘要： A three-dimensional memory cell, suitable for electrically erasable programmable read only memories (EEPROMS), which has direct-write cell capability is disclosed. The memory cell is utilized in the fabrication of non-volatile, direct-write EEPROM arrays with high integration density. A typical EEPROM array includes a plurality of elongated shallow trenches formed in a semiconductor substrate. Multiple direct-write EEPROM cells are disposed within each elongated trench such that each EEPROM cell shares a recall gate and a program gate with another cell in the same trench. Preferably, a silicon rich dielectric (such as silicon rich oxide) disposed between each floating gate and its associated programming and recall gates. Both common source diffusion and isolated source diffusion embodiments are disclosed. Further, various fabrication methods for the direct-write EEPROM arrays presented are described.
摘要翻译：公开了一种适用于具有直写单元能力的电可擦除可编程只读存储器（EEPROMS）的三维存储单元。存储单元用于制造具有高集成度密度的非易失性直写EEPROM阵列。典型的EEPROM阵列包括形成在半导体衬底中的多个细长的浅沟槽。多个直写EEPROM单元被布置在每个细长沟槽内，使得每个EEPROM单元与相同沟槽中的另一个单元共享回调门和编程门。优选地，设置在每个浮动栅极与其相关联的编程和调用栅极之间的富硅电介质（例如富氧氧化物）。公开了源极扩散和隔离源扩散实施例。此外，描述了所呈现的用于直写EEPROM阵列的各种制造方法。

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