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1. 发明授权

US08912040B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08912040B2
公开(公告)日：2014-12-16
申请号：US13012987
申请日：2011-01-25
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L21/00 , H01L21/16 , H01L29/786 , H01L27/12
CPC分类号： H01L27/127 , G02F1/134309 , G02F1/136227 , G02F1/167 , G09F21/04 , G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2300/0809 , G09G2310/0251 , G09G2310/0286 , G09G2310/08 , G11C19/28 , H01L21/465 , H01L27/1225 , H01L27/124 , H01L27/3262 , H01L29/66969 , H01L29/7869 , H01L29/78696
摘要： An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.
摘要翻译：本发明的目的是建立一种其中使用氧化物半导体的半导体器件的制造中的加工技术。在基板上形成栅电极，在栅电极上形成栅极绝缘层，在栅极绝缘层上形成氧化物半导体层，通过湿蚀刻加工氧化物半导体层，形成岛状氧化物半导体层形成导电层以覆盖岛状氧化物半导体层，通过干蚀刻处理导电层以形成源电极，并且通过干蚀刻除去漏电极和岛状氧化物半导体层的一部分，在岛状氧化物半导体层中形成凹部。

2. 发明授权

US08741702B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08741702B2
公开(公告)日：2014-06-03
申请号：US12582079
申请日：2009-10-20
申请人： Shunichi Ito , Miyuki Hosoba , Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
发明人： Shunichi Ito , Miyuki Hosoba , Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L29/66969 , H01L27/1214 , H01L27/1225 , H01L27/1288 , H01L29/7869
摘要： An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by dry etching in which an etching gas is used, and a second etching step is performed by wet etching in which an etchant is used.
摘要翻译：目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。在蚀刻步骤中，通过使用蚀刻气体的干蚀刻进行第一蚀刻步骤，并且通过使用蚀刻剂的湿蚀刻进行第二蚀刻步骤。

3. 发明授权

US08686417B2 Oxide semiconductor device formed by using multi-tone mask 有权
标题翻译：通过使用多色调掩模形成的氧化物半导体器件
公开(公告)号：US08686417B2
公开(公告)日：2014-04-01
申请号：US13555579
申请日：2012-07-23
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka , Shunichi Ito , Miyuki Hosoba
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka , Shunichi Ito , Miyuki Hosoba
IPC分类号： H01L29/26
CPC分类号： H01L29/66969 , H01L27/1225 , H01L27/1288 , H01L29/66742 , H01L29/78621 , H01L29/7869
摘要： An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by wet etching in which an etchant is used, and a second etching step is performed by dry etching in which an etching gas is used.
摘要翻译：目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。在蚀刻步骤中，通过使用蚀刻剂的湿式蚀刻进行第一蚀刻步骤，并且通过使用蚀刻气体的干法蚀刻进行第二蚀刻步骤。

4. 发明授权

US08383487B2 Method for manufacturing SOI substrate 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US08383487B2
公开(公告)日：2013-02-26
申请号：US13198171
申请日：2011-08-04
申请人： Hideomi Suzawa , Shinya Sasagawa , Akihisa Shimomura , Junpei Momo , Motomu Kurata , Taiga Muraoka , Kosei Nei
发明人： Hideomi Suzawa , Shinya Sasagawa , Akihisa Shimomura , Junpei Momo , Motomu Kurata , Taiga Muraoka , Kosei Nei
IPC分类号： H01L21/76
CPC分类号： H01L21/76254
摘要： Forming an insulating film on a surface of the single crystal semiconductor substrate, forming a fragile region in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an ion beam through the insulating film, forming a bonding layer over the insulating film, bonding a supporting substrate to the single crystal semiconductor substrate by interposing the bonding layer between the supporting substrate and the single crystal semiconductor substrate, dividing the single crystal semiconductor substrate at the fragile region to separate the single crystal semiconductor substrate into a single crystal semiconductor layer attached to the supporting substrate, performing first dry etching treatment on a part of the fragile region remaining on the single crystal semiconductor layer, performing second dry etching treatment on a surface of the single crystal semiconductor layer subjected to the first etching treatment, and irradiating the single crystal semiconductor layer with laser light.
摘要翻译：在单晶半导体基板的表面上形成绝缘膜，在单晶半导体基板中通过用离子束照射单晶半导体基板通过绝缘膜形成脆性区域，在绝缘膜上形成接合层，通过将支撑基板和单晶半导体基板之间的接合层插入到单晶半导体基板的支撑基板上，将单晶半导体基板分割为脆性区域，将单晶半导体基板分离成单晶半导体层，所述支撑基板对残留在所述单晶半导体层上的所述易碎区域的一部分进行第一干蚀刻处理，对经过所述第一蚀刻处理的所述单晶半导体层的表面进行第二干蚀刻处理，具有激光的晶体半导体层。

5. 发明授权

US08003483B2 Method for manufacturing SOI substrate 有权
标题翻译：制造SOI衬底的方法
公开(公告)号：US08003483B2
公开(公告)日：2011-08-23
申请号：US12399047
申请日：2009-03-06
申请人： Hideomi Suzawa , Shinya Sasagawa , Akihisa Shimomura , Junpei Momo , Motomu Kurata , Taiga Muraoka , Kosei Nei
发明人： Hideomi Suzawa , Shinya Sasagawa , Akihisa Shimomura , Junpei Momo , Motomu Kurata , Taiga Muraoka , Kosei Nei
IPC分类号： H01L21/76
CPC分类号： H01L21/76254
摘要： Forming an insulating film on a surface of the single crystal semiconductor substrate, forming a fragile region in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an ion beam through the insulating film, forming a bonding layer over the insulating film, bonding a supporting substrate to the single crystal semiconductor substrate by interposing the bonding layer between the supporting substrate and the single crystal semiconductor substrate, dividing the single crystal semiconductor substrate at the fragile region to separate the single crystal semiconductor substrate into a single crystal semiconductor layer attached to the supporting substrate, performing first dry etching treatment on a part of the fragile region remaining on the single crystal semiconductor layer, performing second dry etching treatment on a surface of the single crystal semiconductor layer subjected to the first etching treatment, and irradiating the single crystal semiconductor layer with laser light.
摘要翻译：在单晶半导体基板的表面上形成绝缘膜，在单晶半导体基板中通过用离子束照射单晶半导体基板通过绝缘膜形成脆性区域，在绝缘膜上形成接合层，通过将支撑基板和单晶半导体基板之间的接合层插入到单晶半导体基板的支撑基板上，将单晶半导体基板分割为脆性区域，将单晶半导体基板分离成单晶半导体层，所述支撑基板对残留在所述单晶半导体层上的所述脆性区域的一部分进行第一干蚀刻处理，对经过所述第一蚀刻处理的所述单晶半导体层的表面进行第二干蚀刻处理，具有激光的晶体半导体层。

6. 发明授权

US08236635B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08236635B2
公开(公告)日：2012-08-07
申请号：US12582074
申请日：2009-10-20
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L21/00 , H01L21/336 , H01L21/8234 , H01L21/84 , H01L21/20
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1225 , H01L29/7869
摘要： In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. The etching step is performed by dry etching in which an etching gas is used.
摘要翻译：在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。蚀刻步骤通过使用蚀刻气体的干蚀刻进行。

7. 发明授权

US07915075B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07915075B2
公开(公告)日：2011-03-29
申请号：US12580512
申请日：2009-10-16
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L21/00 , H01L21/16
CPC分类号： H01L27/127 , G02F1/134309 , G02F1/136227 , G02F1/167 , G09F21/04 , G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2300/0809 , G09G2310/0251 , G09G2310/0286 , G09G2310/08 , G11C19/28 , H01L21/465 , H01L27/1225 , H01L27/124 , H01L27/3262 , H01L29/66969 , H01L29/7869 , H01L29/78696
摘要： An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.
摘要翻译：本发明的目的是建立一种其中使用氧化物半导体的半导体器件的制造中的加工技术。在基板上形成栅电极，在栅电极上形成栅极绝缘层，在栅极绝缘层上形成氧化物半导体层，通过湿蚀刻加工氧化物半导体层，形成岛状氧化物半导体层形成导电层以覆盖岛状氧化物半导体层，通过干蚀刻处理导电层以形成源电极，并且通过干蚀刻除去漏电极和岛状氧化物半导体层的一部分，在岛状氧化物半导体层中形成凹部。

8. 发明申请

US20100102315A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20100102315A1
公开(公告)日：2010-04-29
申请号：US12582082
申请日：2009-10-20
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka , Shunichi Ito , Miyuki Hosoba
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka , Shunichi Ito , Miyuki Hosoba
IPC分类号： H01L29/786
CPC分类号： H01L29/66969 , H01L27/1225 , H01L27/1288 , H01L29/66742 , H01L29/78621 , H01L29/7869
摘要： An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by wet etching in which an etchant is used, and a second etching step is performed by dry etching in which an etching gas is used.
摘要翻译：目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。在蚀刻步骤中，通过使用蚀刻剂的湿式蚀刻进行第一蚀刻步骤，并且通过使用蚀刻气体的干法蚀刻进行第二蚀刻步骤。

9. 发明授权

US08729546B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08729546B2
公开(公告)日：2014-05-20
申请号：US13557719
申请日：2012-07-25
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L29/10 , H01L29/12 , H01L29/04 , H01L31/062 , H01L31/113
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1225 , H01L29/7869
摘要： In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. The etching step is performed by dry etching in which an etching gas is used.
摘要翻译：在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。蚀刻步骤通过使用蚀刻气体的干蚀刻进行。

10. 发明授权

US08242494B2 Method for manufacturing thin film transistor using multi-tone mask 有权
标题翻译：使用多色调掩模制造薄膜晶体管的方法
公开(公告)号：US08242494B2
公开(公告)日：2012-08-14
申请号：US12582082
申请日：2009-10-20
申请人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka , Shunichi Ito , Miyuki Hosoba
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka , Shunichi Ito , Miyuki Hosoba
IPC分类号： H01L29/786
CPC分类号： H01L29/66969 , H01L27/1225 , H01L27/1288 , H01L29/66742 , H01L29/78621 , H01L29/7869
摘要： An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by wet etching in which an etchant is used, and a second etching step is performed by dry etching in which an etching gas is used.
摘要翻译：目的是以低成本，高生产率制造包括氧化物半导体的半导体器件，使得通过减少曝光掩模的数量来简化光刻工艺。在制造包括通道蚀刻反交错薄膜晶体管的半导体器件的方法中，使用使用作为曝光的多色调掩模形成的掩模层来蚀刻氧化物半导体膜和导电膜光透过该掩模以具有多个强度。在蚀刻步骤中，通过使用蚀刻剂的湿式蚀刻进行第一蚀刻步骤，并且通过使用蚀刻气体的干法蚀刻进行第二蚀刻步骤。

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