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1. 发明授权

US07460100B2 Liquid crystal display apparatus having level conversion circuit 有权
标题翻译：具有电平转换电路的液晶显示装置
公开(公告)号：US07460100B2
公开(公告)日：2008-12-02
申请号：US11148260
申请日：2005-06-09
申请人： Hideo Sato , Yoshiro Mikami , Hiroshi Kageyama , Tatsuya Ohkubo
发明人： Hideo Sato , Yoshiro Mikami , Hiroshi Kageyama , Tatsuya Ohkubo
IPC分类号： G09G3/36
CPC分类号： G09G5/006 , G09G3/3611 , G09G3/3674 , G09G3/3685 , G09G2310/0289 , H03K3/356147 , H03K19/018521
摘要： A liquid crystal display apparatus having a level conversion circuit in which a high speed operation can be attained and also a small transistor capacity can be obtained is provided. In the liquid crystal display apparatus, a signal circuit for driving pixel elements of a display unit and a scanning circuit are provided. The level conversion circuit is constituted of a first and a second transistors 111 and 112 in which a respective gate electrodes is connected to a first bias voltage power supply, and a third and a fourth transistors 121 and 122 in which a respective gate electrodes is connected to a second bias voltage power supply and a respective source electrodes is connected to a power supply.
摘要翻译：本发明提供一种液晶显示装置，其具有能够获得高速运转且能获得小的晶体管容量的电平转换电路。在液晶显示装置中，设置有用于驱动显示单元和扫描电路的像素元件的信号电路。电平转换电路由第一晶体管111和第二晶体管112构成，其中各个栅电极连接到第一偏置电压电源，第三和第四晶体管121和122分别连接各栅极电极到第二偏置电压电源，并且各个源电极连接到电源。

2. 发明授权

US06919873B2 Liquid crystal display apparatus having level conversion circuit 失效
标题翻译：具有电平转换电路的液晶显示装置
公开(公告)号：US06919873B2
公开(公告)日：2005-07-19
申请号：US10797013
申请日：2004-03-11
申请人： Hideo Sato , Yoshiro Mikami , Hiroshi Kageyama , Tatsuya Ohkubo
发明人： Hideo Sato , Yoshiro Mikami , Hiroshi Kageyama , Tatsuya Ohkubo
IPC分类号： G02F1/133 , G09G3/36 , H03K3/356 , H03K19/0185
CPC分类号： G09G5/006 , G09G3/3611 , G09G3/3674 , G09G3/3685 , G09G2310/0289 , H03K3/356147 , H03K19/018521
摘要： A liquid crystal display apparatus having a level conversion circuit in which a high speed operation can be attained and also a small transistor capacity can be obtained is provided. In the liquid crystal display apparatus, a signal circuit for driving pixel elements of a display unit and a scanning circuit are provided. The level conversion circuit is constituted of a first and a second transistors 111 and 112 in which a respective gate electrodes is connected to a first bias voltage power supply, and a third and a fourth transistors 121 and 122 in which a respective gate electrodes is connected to a second bias voltage power supply and a respective source electrodes is connected to a power supply.
摘要翻译：本发明提供一种液晶显示装置，其具有能够获得高速运转且能获得小的晶体管容量的电平转换电路。在液晶显示装置中，设置有用于驱动显示单元和扫描电路的像素元件的信号电路。电平转换电路由第一晶体管111和第二晶体管112构成，其中各个栅电极连接到第一偏置电压电源，第三和第四晶体管121和122分别连接各栅极电极到第二偏置电压电源，并且各个源电极连接到电源。

3. 发明授权

US06714184B2 Liquid crystal display apparatus having level conversion circuit 有权
标题翻译：具有电平转换电路的液晶显示装置
公开(公告)号：US06714184B2
公开(公告)日：2004-03-30
申请号：US10150952
申请日：2002-05-21
申请人： Hideo Sato , Yoshiro Mikami , Hiroshi Kageyama , Tatsuya Ohkubo
发明人： Hideo Sato , Yoshiro Mikami , Hiroshi Kageyama , Tatsuya Ohkubo
IPC分类号： G09G336
CPC分类号： G09G5/006 , G09G3/3611 , G09G3/3674 , G09G3/3685 , G09G2310/0289 , H03K3/356147 , H03K19/018521
摘要： A liquid crystal display apparatus having a level conversion circuit in which a high speed operation can be attained and also a small transistor capacity can be obtained is provided. In the liquid crystal display apparatus, a signal circuit for driving pixel elements of a display unit and a scanning circuit are provided. The level conversion circuit is constituted of a first and a second transistors 111 and 112 in which a respective gate electrodes is connected to a first bias voltage power supply, and a third and a fourth transistors 121 and 122 in which a respective gate electrodes is connected to a second bias voltage power supply and a respective source electrodes is connected to a power supply.
摘要翻译：本发明提供一种液晶显示装置，其具有能够获得高速运转且能获得小的晶体管容量的电平转换电路。在液晶显示装置中，设置有用于驱动显示单元和扫描电路的像素元件的信号电路。电平转换电路由第一晶体管111和第二晶体管112构成，其中各个栅电极连接到第一偏置电压电源，第三和第四晶体管121和122分别连接各栅极电极到第二偏置电压电源，并且各个源电极连接到电源。

4. 发明授权

US06392625B1 Liquid crystal display apparatus having level conversion circuit 有权
标题翻译：具有电平转换电路的液晶显示装置
公开(公告)号：US06392625B1
公开(公告)日：2002-05-21
申请号：US09337260
申请日：1999-06-22
申请人： Hideo Sato , Yoshiro Mikami , Hiroshi Kageyama , Tatsuya Ohkubo
发明人： Hideo Sato , Yoshiro Mikami , Hiroshi Kageyama , Tatsuya Ohkubo
IPC分类号： G09G336
CPC分类号： G09G5/006 , G09G3/3611 , G09G3/3674 , G09G3/3685 , G09G2310/0289 , H03K3/356147 , H03K19/018521
摘要： A liquid crystal display apparatus including a level conversion circuit in which a high speed operation can be attained and also a small transistor capacity can be obtained. In the liquid crystal display apparatus, a signal circuit for driving pixel elements of a display unit and a scanning circuit are provided. The level conversion circuit is constituted of first and second transistors 111 and 112, the respective gate electrodes of which are connected to a first bias voltage power supply, and third and fourth transistors 121 and 122, the respective gate electrodes of which are connected to a second bias voltage power supply and the respective source electrodes of which are connected to a power supply. The drain electrodes of the first and the second transistors 111 and 112 are connected to the respective drain electrodes of the third and the fourth transistors 121 and 122. To the respective source electrodes of the first and the second transistors 111 and 112, signals having a mutually different polarity and a low amplitude are inputted and from the respective drain electrodes of the first and the second transistors 111 and 112, signals having a mutually different polarity and a high amplitude are taken out.
摘要翻译：一种液晶显示装置，包括能够获得高速运转并且还能获得小的晶体管容量的电平转换电路。在液晶显示装置中，设置有用于驱动显示单元和扫描电路的像素元件的信号电路。电平转换电路由第一晶体管111和第二晶体管112构成，其各自的栅电极连接到第一偏置电压电源，第三和第四晶体管121和122，其各自的栅电极连接到第二偏压电源，其各自的源电极连接到电源。第一晶体管111和第二晶体管112的漏极连接到第三晶体管121和第四晶体管122的各个漏电极。对于第一晶体管111和第二晶体管112的各个源极，输入相互不同的极性和低振幅，并且从第一和第二晶体管111和112的各个漏极引出具有相互不同的极性和高振幅的信号。

5. 发明申请

US20060007216A1 Liquid crystal display apparatus having level conversion circuit 有权
公开(公告)号：US20060007216A1
公开(公告)日：2006-01-12
申请号：US11148260
申请日：2005-06-09
申请人： Hideo Sato , Yoshiro Mikami , Hiroshi Kageyama , Tatsuya Ohkubo
发明人： Hideo Sato , Yoshiro Mikami , Hiroshi Kageyama , Tatsuya Ohkubo
IPC分类号： G09G5/00
CPC分类号： G09G5/006 , G09G3/3611 , G09G3/3674 , G09G3/3685 , G09G2310/0289 , H03K3/356147 , H03K19/018521
摘要： A liquid crystal display apparatus having a level conversion circuit in which a high speed operation can be attained and also a small transistor capacity can be obtained is provided. In the liquid crystal display apparatus, a signal circuit for driving pixel elements of a display unit and a scanning circuit are provided. The level conversion circuit is constituted of a first and a second transistors 111 and 112 in which a respective gate electrodes is connected to a first bias voltage power supply, and a third and a fourth transistors 121 and 122 in which a respective gate electrodes is connected to a second bias voltage power supply and a respective source electrodes is connected to a power supply.

6. 发明授权

US07002212B2 Static RAM having a TFT with n-type source and drain regions and a p-type region in contact with only the intrinsic channel of the same 失效
标题翻译：具有具有n型源极和漏极区域的TFT的静态RAM和仅与其内部通道接触的p型区域
公开(公告)号：US07002212B2
公开(公告)日：2006-02-21
申请号：US10623534
申请日：2003-07-22
申请人： Tatsuya Ohkubo , Genshiro Kawachi , Yoshiro Mikami , Kazuhito Masuda , Hiroshi Kageyama
发明人： Tatsuya Ohkubo , Genshiro Kawachi , Yoshiro Mikami , Kazuhito Masuda , Hiroshi Kageyama
IPC分类号： H01L27/01
CPC分类号： H01L29/66757 , G02F1/1368 , H01L27/12 , H01L29/78615
摘要： To prevent an n-channel thin-film transistor from being deteriorated by hot holes generated in a gate-negative pulse mode. A thin polysilicon film 10 is provided with a p-type semiconductor region 13 in contact with a channel region 14. The p-type semiconductor region 13 is electrically connected to nowhere except the channel region 14. Holes induced on the surface due to a gate-negative pulse are further supplied from the p-type semiconductor region 13. An electric field established by the gate-negative pulse is relaxed by the holes, fewer hot holes are injected into the gate oxide film, and the TFT characteristics are less deteriorated.
摘要翻译：为了防止n沟道薄膜晶体管被栅极 - 负脉冲模式中产生的热孔恶化。薄多晶硅膜10设置有与沟道区域14接触的p型半导体区域13。除了沟道区域14之外，p型半导体区域13电连接。从p型半导体区域13进一步供给由栅极 - 负极脉冲引起的表面上的孔。由栅极负脉冲建立的电场被孔释放，较少的热孔被注入到栅极氧化膜中，并且TFT特性较差劣化。

7. 发明授权

US06611300B1 Semiconductor element and liquid crystal display device using the same 有权
标题翻译：半导体元件和使用其的液晶显示装置
公开(公告)号：US06611300B1
公开(公告)日：2003-08-26
申请号：US09694486
申请日：2000-10-24
申请人： Tatsuya Ohkubo , Genshiro Kawachi , Yoshiro Mikami , Kazuhito Masuda , Hiroshi Kageyama
发明人： Tatsuya Ohkubo , Genshiro Kawachi , Yoshiro Mikami , Kazuhito Masuda , Hiroshi Kageyama
IPC分类号： G02F1136
CPC分类号： H01L29/66757 , G02F1/1368 , H01L27/12 , H01L29/78615
摘要： To prevent an n-channel thin-film transistor from being deteriorated by hot holes generated in a gate-negative pulse mode. A thin polysilicon film 10 is provided with a p-type semiconductor region 13 in contact with a channel region 14. The p-type semiconductor region 13 is electrically connected to nowhere except the channel region 14. Holes induced on the surface due to a gate-negative pulse are further supplied from the p-type semiconductor region 13. An electric field established by the gate-negative pulse is relaxed by the holes, fewer hot holes are injected into the gate oxide film, and the TFT characteristics are less deteriorated.
摘要翻译：为了防止n沟道薄膜晶体管被栅极 - 负脉冲模式中产生的热孔恶化。薄的多晶硅膜10设置有与沟道区域14接触的p型半导体区域13.P型半导体区域13除了沟道区域14外还电连接。由于栅极而在表面上感应的孔阴极脉冲由p型半导体区域13进一步提供。由栅极 - 负脉冲建立的电场被孔释放，较少的热孔被注入到栅极氧化膜中，并且TFT特性劣化。

8. 发明授权

US6166786A Semiconductor element with N channel and P region connected only to the channel and liquid crystal display device using the same 失效
标题翻译：具有N沟道和P区域的半导体元件仅与沟道连接，液晶显示装置使用该半导体元件
公开(公告)号：US6166786A
公开(公告)日：2000-12-26
申请号：US74314
申请日：1998-05-08
申请人： Tatsuya Ohkubo , Genshiro Kawachi , Yoshiro Mikami , Kazuhito Masuda , Hiroshi Kageyama
发明人： Tatsuya Ohkubo , Genshiro Kawachi , Yoshiro Mikami , Kazuhito Masuda , Hiroshi Kageyama
IPC分类号： G02F1/136 , G02F1/1368 , H01L21/336 , H01L27/12 , H01L29/786 , H01L29/04
CPC分类号： H01L29/66757 , G02F1/1368 , H01L27/12 , H01L29/78615
摘要： To prevent an n-channel thin-film transistor from being deteriorated by hot holes generated in a gate-negative pulse mode, a thin polysilicon film 10 is provided with a p-type semiconductor region 13 in contact with a channel region 14. The p-type semiconductor region 13 is electrically connected to nowhere except the channel region 14. Holes induced on the surface due to a gate-negative pulse are further supplied from the p-type semiconductor region 13. An electric field established by the gate-negative pulse is relaxed by the holes, fewer hot holes are injected into the gate oxide film, and the TFT characteristics are less deteriorated.
摘要翻译：为了防止n沟道薄膜晶体管被栅极 - 负脉冲模式中产生的热孔恶化，薄多晶硅膜10设置有与沟道区14接触的p型半导体区13。型半导体区域13除了沟道区域14外电连接。另外，从p型半导体区域13供给由于栅极 - 负极脉冲而在表面上感应的孔。由栅极 - 负极脉冲通过孔松弛，较少的热孔注入到栅极氧化膜中，并且TFT特性较差劣化。

9. 发明授权

US06781646B2 Liquid crystal display device having gate electrode with two conducting layers, one used for self-aligned formation of the TFT semiconductor regions 有权
标题翻译：液晶显示装置具有具有两个导电层的栅电极，一个用于TFT半导体区域的自对准形成
公开(公告)号：US06781646B2
公开(公告)日：2004-08-24
申请号：US10384635
申请日：2003-03-11
申请人： Genshiro Kawachi , Tatsuya Ohkubo , Hiroshi Kageyama , Yoshiro Mikami , Kazuhito Masuda
发明人： Genshiro Kawachi , Tatsuya Ohkubo , Hiroshi Kageyama , Yoshiro Mikami , Kazuhito Masuda
IPC分类号： G02F1136
CPC分类号： H01L27/124 , G02F1/136213 , G02F1/136227 , H01L27/1214 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/78621 , H01L29/78645
摘要： A liquid crystal display apparatus includes semiconductor elements placed at intersection points between scanning wires and signal wires. Each semiconductor element includes: a semiconductor layer having a channel region and a pair of semiconductor regions which sandwich the channel region and which are each made of a high-resistance region and a low-resistance region; a first electrode formed on the intrinsic semiconductor region with an insulating film interposed therebetween; and second and third electrodes connected to the low-resistance regions. Each scanning wire constitutes the first electrode of the corresponding one of the semiconductor elements. The first electrode has a first wiring formed on the insulating film and second wiring formed in direct contact with a side surface of the first wiring, part of the second wiring being overlaid on part of a high-resistance region with the insulating film interposed therebetween.
摘要翻译：液晶显示装置包括放置在扫描线和信号线之间的交点处的半导体元件。每个半导体元件包括：半导体层，其具有沟道区域和夹持沟道区域的一对半导体区域，并且各自由高电阻区域和低电阻区域构成; 在本征半导体区域上形成绝缘膜的第一电极; 以及连接到低电阻区域的第二和第三电极。每个扫描线构成对应的一个半导体元件的第一电极。第一电极具有形成在绝缘膜上的第一布线和与第一布线的侧表面直接接触形成的第二布线，第二布线的一部分覆盖在绝缘膜之间的高电阻区域的一部分上。

10. 发明授权

US06559906B1 Liquid crystal display device having gate electrode with two conducting layers, one used for self-aligned formation of the TFT semiconductor regions 有权
公开(公告)号：US06559906B1
公开(公告)日：2003-05-06
申请号：US09601218
申请日：2000-07-28
申请人： Genshiro Kawachi , Tatsuya Ohkubo , Hiroshi Kageyama , Yoshiro Mikami , Kazuhito Masuda
发明人： Genshiro Kawachi , Tatsuya Ohkubo , Hiroshi Kageyama , Yoshiro Mikami , Kazuhito Masuda
IPC分类号： G02F1136
CPC分类号： H01L27/124 , G02F1/13454 , G02F1/136213 , G02F1/136227 , G02F1/1368 , H01L27/1214 , H01L29/66757 , H01L29/78621 , H01L29/78627
摘要： A liquid crystal display apparatus includes semiconductor elements placed at intersection points between scanning wires and signal wires. Each semiconductor element includes: a semiconductor layer having a channel region and a pair of semiconductor regions which sandwich the channel region and which are each made of a high-resistance region and a low-resistance region; a first electrode formed on the intrinsic semiconductor region with an insulating film interposed therebetween; and second and third electrodes connected to the low-resistance regions. Each scanning wire constitutes the first electrode of the corresponding one of the semiconductor elements. The first electrode has a first wiring formed on the insulating film and second wiring formed in direct contact with a side surface of the first wiring, part of the second wiring being overlaid on part of a high-resistance region with the insulating film interposed therebetween.

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