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    • 1. 发明申请
    • SEMICONDUCTOR CIRCUIT FOR WIRELESS RECEIVING PROVIDED WITH CONTROLLER CIRCUIT FOR CONTROLLING BIAS CURRENT
    • 用于控制电路的无线接收的半导体电路用于控制偏置电流
    • US20080139163A1
    • 2008-06-12
    • US11951071
    • 2007-12-05
    • Yasuo ObaHidehiko Kurimoto
    • Yasuo ObaHidehiko Kurimoto
    • H04B1/16
    • H04B1/28H04B1/18
    • A constant voltage source supplies a bias current to a wireless receiver circuit. A bias current detector circuit detects the bias current, and outputs a detection result to a current controller circuit. The current controller circuit outputs the detection result of the bias current to a memory circuit. The current controller circuit controls the bias current detector circuit to stop operating thereof, and then controls the bias current to decrease when the detected bias current is larger than a predetermined first threshold value and controls the bias current to increase when the detected bias current is smaller than a second threshold value smaller than the first threshold value, based on the detection result stored in the memory circuit.
    • 恒定电压源向无线接收器电路提供偏置电流。 偏置电流检测器电路检测偏置电流,并将检测结果输出到电流控制器电路。 电流控制器电路将偏置电流的检测结果输出到存储电路。 电流控制器电路控制偏置电流检测器电路以停止其工作,然后当检测到的偏置电流大于预定的第一阈值时控制偏置电流减小,并且当检测到的偏置电流较小时控制偏置电流增加 比基于存储在存储器电路中的检测结果小于第一阈值的第二阈值。
    • 3. 发明授权
    • Semiconductor circuit for wireless receiving provided with controller circuit for controlling bias current
    • 用于无线接收的半导体电路具有用于控制偏置电流的控制电路
    • US07835718B2
    • 2010-11-16
    • US11951071
    • 2007-12-05
    • Yasuo ObaHidehiko Kurimoto
    • Yasuo ObaHidehiko Kurimoto
    • H04B1/16H04K3/00
    • H04B1/28H04B1/18
    • A constant voltage source supplies a bias current to a wireless receiver circuit. A bias current detector circuit detects the bias current, and outputs a detection result to a current controller circuit. The current controller circuit outputs the detection result of the bias current to a memory circuit. The current controller circuit controls the bias current detector circuit to stop operating thereof, and then controls the bias current to decrease when the detected bias current is larger than a predetermined first threshold value and controls the bias current to increase when the detected bias current is smaller than a second threshold value smaller than the first threshold value, based on the detection result stored in the memory circuit.
    • 恒定电压源向无线接收器电路提供偏置电流。 偏置电流检测器电路检测偏置电流,并将检测结果输出到电流控制器电路。 电流控制器电路将偏置电流的检测结果输出到存储电路。 电流控制器电路控制偏置电流检测器电路以停止其工作,然后当检测到的偏置电流大于预定的第一阈值时控制偏置电流减小,并且当检测到的偏置电流较小时控制偏置电流增加 比基于存储在存储器电路中的检测结果小于第一阈值的第二阈值。
    • 6. 发明授权
    • Analog FIFO memory and switching device having a reset operation
    • 具有复位操作的模拟FIFO存储器和开关器件
    • US5822236A
    • 1998-10-13
    • US863209
    • 1997-05-27
    • Shiro DoshoHidehiko KurimotoNaoshi Yanagisawa
    • Shiro DoshoHidehiko KurimotoNaoshi Yanagisawa
    • G11C27/00G11C27/04H03H19/00H04N9/78
    • G11C27/04G11C27/00H03H19/004H04N9/78
    • The invention provides an analog FIFO memory from which a written analog signal can be accurately read by eliminating errors in the analog signal between the write operation and the read operation. Prior to the read operation for reading the analog signal from a memory cell through a memory bus, a reset operation for setting the memory bus at a predetermined potential is conducted so as to remove a charge stored in a parasitic capacitance of the memory bus. The input terminal of a read circuit is set at a predetermined potential, with a write circuit disconnected from the memory bus by using an input circuit and with the read circuit connected with the memory bus by using an output circuit. In this manner, the memory bus is set at the predetermined potential, and the charge stored in the parasitic capacitance is discharged. At this point, a switch in each memory cell is in an off-state, and hence, a charge corresponding to the analog signal can be retained in the memory cell.
    • 本发明提供了一种模拟FIFO存储器,通过消除写入操作和读取操作之间的模拟信号中的错误,可以准确地读取写入的模拟信号。 在从存储器单元通过存储器总线读取模拟信号的读取操作之前,进行用于将存储器总线设置在预定电位的复位操作,以便消除存储在存储器总线的寄生电容中的电荷。 读取电路的输入端子通过使用输入电路和与存储器总线连接的读取电路通过使用输出电路将写入电路从存储器总线断开而被设置在预定电位。 以这种方式,将存储器总线设置在预定电位,并且存储在寄生电容中的电荷被放电。 此时,每个存储单元中的开关处于截止状态,因此可以将与模拟信号相对应的电荷保留在存储单元中。
    • 7. 发明授权
    • Direct conversion receiver circuit
    • 直接转换接收电路
    • US07801503B2
    • 2010-09-21
    • US11400936
    • 2006-04-10
    • Hidehiko Kurimoto
    • Hidehiko Kurimoto
    • H04B1/06
    • H03D3/008
    • A receiver circuit includes a low noise amplifier (LNA) 1 to which a received signal is input, a mixer 2 for mixing an output of the LNA and a local signal, a first low-pass filter 3 for receiving an output of the mixer, and a composite amplifier in which a fixed gain amplifier 4, a high-pass filter 5, and a gain control amplifier 6 are connected in this order from the input side. An output of the first low-pass filter is input to the fixed gain amplifier. The gain of the fixed gain amplifier is 0 dB or more. The maximum gain of the gain control amplifier is 0 dB or less. The receiver circuit can suppress a transient response due to DC voltage fluctuations, even if the gains are changed while signals are received in a communication mode that performs continuous reception.
    • 接收机电路包括:输入接收信号的低噪声放大器(LNA)1,用于混合LNA的输出的混合器2和本地信号;接收混频器的输出的第一低通滤波器3, 以及其中固定增益放大器4,高通滤波器5和增益控制放大器6从输入侧依次连接的复合放大器。 第一低通滤波器的输出被输入到固定增益放大器。 固定增益放大器的增益为0 dB以上。 增益控制放大器的最大增益为0 dB或更小。 即使在以连续接收的通信方式接收信号的同时,接收电路也可以抑制由于直流电压波动引起的瞬态响应。
    • 10. 发明申请
    • Receiving circuit, and receiving apparatus and transmitting/receiving apparatus using the receiving circuit
    • 接收电路,以及使用接收电路的接收装置和发送/接收装置
    • US20070176682A1
    • 2007-08-02
    • US10591850
    • 2005-03-07
    • Makoto NakamuraHidehiko KurimotoKaoru Ishida
    • Makoto NakamuraHidehiko KurimotoKaoru Ishida
    • H03G3/00
    • H03G1/0088H03G3/3052H04B1/30
    • An object of the invention is to provide a receiving circuit where the quality of reception can be prevented from deteriorating when the gain changes, so that the good quality of the received signal can be preserved, as well as a receiving apparatus and a transmitting/receiving apparatus using the receiving circuit. In the configuration of the invention, a switch (113) is converted to a short state in response to a change in the gain of a variable gain amplifier (107) by means of a gain control apparatus 112, and thereby, the output terminal of a high pass filter (111) is fixed at a reference voltage and the cutoff frequency of a low pass filter (108) is increased. As a result, the period during which the DC voltage has transient response properties in the low pass filter (108) can be shortened, and this transient response prevented from passing through the high pass filter (111).
    • 本发明的目的是提供一种接收电路,其中当增益改变时可以防止接收质量恶化,从而可以保持接收信号的良好质量,以及接收装置和发送/接收 使用接收电路的装置。 在本发明的结构中,通过增益控制装置112响应于可变增益放大器(107)的增益的变化而将开关(113)转换为短状态,由此,输出端子 高通滤波器(111)被固定在参考电压上,并且低通滤波器(108)的截止频率增加。 结果,可以缩短在低通滤波器(108)中具有瞬态响应特性的直流电压的周期,并且防止该瞬态响应通过高通滤波器(111)。