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1. 发明申请

US20060199373A1 Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20060199373A1
公开(公告)日：2006-09-07
申请号：US11360703
申请日：2006-02-24
申请人： Hideshi Miyajima , Hideaki Masuda , Tsutomu Shimayama , Shunichi Shibuki
发明人： Hideshi Miyajima , Hideaki Masuda , Tsutomu Shimayama , Shunichi Shibuki
IPC分类号： H01L21/4763
CPC分类号： H01L21/76834 , H01L21/02126 , H01L21/02211 , H01L21/02274 , H01L21/0234 , H01L21/02351 , H01L21/31633 , H01L21/3185 , H01L21/76808 , H01L21/76811 , H01L21/76813 , H01L21/76825 , H01L21/76826 , H01L21/76829 , H01L21/76832 , H01L21/76835
摘要： A manufacturing method of a semiconductor device, comprising providing a low-relative-dielectric-constant film above a substrate containing at least oxygen and having a relative dielectric constant of 3.3 or more, a conductor being to be buried in the film, performing a plasma processing by discharging a gas containing a noble gas as a main component to the film, the plasma processing being executed while the substrate above which the film is provided is storing in a processing chamber having an inside covered with a material composed of an element except for oxygen and substantially set under an oxygen-free atmosphere, and providing a first insulating film above the low-relative-dielectric-constant film by a plasma CVD method, being made of a material containing at least one of a material containing oxygen and a material containing an element reacting with oxygen, a conductor being to be buried in the first insulating film.
摘要翻译：一种半导体器件的制造方法，包括在至少包含氧并且相对介电常数为3.3以上的衬底上提供低相对介电常数膜，导体将被埋在膜中，执行等离子体通过将含有惰性气体作为主要成分的气体排放到膜上进行处理，在其上设置有膜的基板上存储等离子体处理的处理室中，该处理室具有由除了氧并基本上设置在无氧气氛下，并且通过等离子体CVD法在低相对介电常数膜之上提供第一绝缘膜，该材料由含有氧和材料的材料中的至少一种含有与氧反应的元素，导体将被埋在第一绝缘膜中。

2. 发明申请

US20080194117A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20080194117A1
公开(公告)日：2008-08-14
申请号：US12020353
申请日：2008-01-25
申请人： Hideaki Masuda , Hideshi Miyajima , Tsutomu Shimayama
发明人： Hideaki Masuda , Hideshi Miyajima , Tsutomu Shimayama
IPC分类号： H01L21/31
CPC分类号： H01L21/31695 , C23C16/401 , C23C16/56 , H01L21/02126 , H01L21/022 , H01L21/02203 , H01L21/02216 , H01L21/02274 , H01L21/02348 , H01L21/02351 , H01L21/3122
摘要： A manufacturing method of a semiconductor device, includes forming a porous organo-siloxane film containing a porogen component having carbon as a main component above a semiconductor substrate, forming an upper-side insulating film having at least one of film density and film composition different from that of the porous organo-siloxane film on the porous organo-siloxane film, and applying at least one of an electron beam and an ultraviolet ray to the porous organo-siloxane film and upper-side insulating film to cause polymerization reaction of the porogen component in the porous organo-siloxane film.
摘要翻译：一种半导体器件的制造方法，包括在半导体衬底上形成含有以碳为主要成分的致孔剂成分的多孔有机硅氧烷膜，形成具有不同于膜密度和膜组成的膜密度和膜组成中的至少一种的上侧绝缘膜多孔有机硅氧烷膜上的多孔有机硅氧烷膜的多孔有机硅氧烷膜，并向多孔有机硅氧烷膜和上侧绝缘膜施加电子束和紫外线中的至少一种，引起致孔剂成分的聚合反应在多孔有机硅氧烷膜中。

3. 发明授权

US07569498B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US07569498B2
公开(公告)日：2009-08-04
申请号：US12020353
申请日：2008-01-25
申请人： Hideaki Masuda , Hideshi Miyajima , Tsutomu Shimayama
发明人： Hideaki Masuda , Hideshi Miyajima , Tsutomu Shimayama
IPC分类号： H01L21/469
CPC分类号： H01L21/31695 , C23C16/401 , C23C16/56 , H01L21/02126 , H01L21/022 , H01L21/02203 , H01L21/02216 , H01L21/02274 , H01L21/02348 , H01L21/02351 , H01L21/3122
摘要： A manufacturing method of a semiconductor device, includes forming a porous organo-siloxane film containing a porogen component having carbon as a main component above a semiconductor substrate, forming an upper-side insulating film having at least one of film density and film composition different from that of the porous organo-siloxane film on the porous organo-siloxane film, and applying at least one of an electron beam and an ultraviolet ray to the porous organo-siloxane film and upper-side insulating film to cause polymerization reaction of the porogen component in the porous organo-siloxane film.
摘要翻译：一种半导体器件的制造方法，包括在半导体衬底上形成含有以碳为主要成分的致孔剂成分的多孔有机硅氧烷膜，形成具有不同于膜密度和膜组成的膜密度和膜组成中的至少一种的上侧绝缘膜多孔有机硅氧烷膜上的多孔有机硅氧烷膜的多孔有机硅氧烷膜，并向多孔有机硅氧烷膜和上侧绝缘膜施加电子束和紫外线中的至少一种，引起致孔剂成分的聚合反应在多孔有机硅氧烷膜中。

4. 发明申请

US20130171819A1 METHODS FOR INTEGRATION OF METAL/DIELECTRIC INTERCONNECTS 审中-公开
标题翻译：金属/电介质互联的整合方法
公开(公告)号：US20130171819A1
公开(公告)日：2013-07-04
申请号：US13338486
申请日：2011-12-28
申请人： Hideshi Miyajima , Hideaki Masuda
发明人： Hideshi Miyajima , Hideaki Masuda
IPC分类号： H01L21/768
CPC分类号： H01L21/7682 , H01L21/76811 , H01L21/76813 , H01L21/76825 , H01L21/76826 , H01L21/76828 , H01L2221/1047
摘要： Described herein are methods for copper/low-k dielectric material integration. The methods involve depositing and curing a low-k dielectric material and depositing a mask on the low-k dielectric material. A via is patterned in the low-k dielectric material and a trench is patterned in the low-k dielectric material. After the via or trench is patterned, a portion of the low-k material is backfilled with a backfill material. The trench and via are filled with copper, then the mask and the copper filling the via are removed. After a first pre-CLN, the backfill material is removed. This creates a robust copper/porous low-k dielectric material interconnect.
摘要翻译：这里描述的是铜/低k电介质材料集成的方法。该方法包括沉积和固化低k电介质材料并在低k电介质材料上沉积掩模。在低k电介质材料中图案化通孔，并且在低k电介质材料中图案化沟槽。在通孔或沟槽被图案化之后，低k材料的一部分用回填材料回填。沟槽和通孔填充有铜，然后去除掩模和填充通孔的铜。在第一个预先CLN之后，回填材料被去除。这产生了坚固的铜/多孔低k电介质材料互连。

5. 发明授权

US07795142B2 Method for fabricating a semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US07795142B2
公开(公告)日：2010-09-14
申请号：US12370055
申请日：2009-02-12
申请人： Hideaki Masuda , Hideshi Miyajima , Toshiaki Idaka
发明人： Hideaki Masuda , Hideshi Miyajima , Toshiaki Idaka
IPC分类号： H01L21/44
CPC分类号： H01L21/31695 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/02348 , H01L21/02351 , H01L21/02362 , H01L21/3105 , H01L21/31116 , H01L21/76802 , H01L21/7682 , H01L21/76822 , H01L21/76825 , H01L21/76826 , H01L21/76835 , H01L2221/1047
摘要： A method for fabricating a semiconductor device includes forming a dielectric film containing a porogen material above a substrate; removing a portion of the porogen material contained in the dielectric film so as to make a concentration of the porogen material higher in a part on a lower side of the dielectric film than in another part on a higher side of the dielectric film; forming an opening halfway in the dielectric film from which a portion of the porogen material has been removed to leave the dielectric film below a bottom of the opening; removing or polymerizing a remainder of the porogen material contained in the dielectric film; and etching the bottom of the opening after removing or polymerizing the remainder of the porogen material.
摘要翻译：一种制造半导体器件的方法包括在衬底上形成含有致孔剂材料的电介质膜; 去除电介质膜中包含的致孔剂材料的一部分，以使介电膜的下侧的一部分中的致孔剂材料的浓度高于在电介质膜的较高侧的另一部分的浓度; 在电介质膜的中间形成开口，其中一部分致孔剂材料从该绝缘膜被去除，以将电介质膜留在开口的底部以下; 去除或聚合包含在电介质膜中的致孔剂材料的剩余部分; 并且在除去或聚合剩余的致孔剂材料之后蚀刻开口的底部。

6. 发明申请

US20060017164A1 Semiconductor device 有权
公开(公告)号：US20060017164A1
公开(公告)日：2006-01-26
申请号：US11129794
申请日：2005-05-16
申请人： Kiyotaka Tabuchi , Hideshi Miyajima , Hideaki Masuda
发明人： Kiyotaka Tabuchi , Hideshi Miyajima , Hideaki Masuda
IPC分类号： H01L23/52
CPC分类号： H01L23/5222 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device, wherein an increase of a capacity between wiring layers is suppressed, reliability of wiring and property of withstand voltage of a diffusion prevention insulation film can be improved and the wiring resistance can be maintained low, is provided by comprising an interlayer insulation film formed on a substrate, a wiring formed on a trench pattern formed on the interlayer insulation film, and a diffusion prevention insulation film formed on an upper surfaces of the interlayer insulation film including the wiring and preventing diffusion of metal from the wiring; wherein the diffusion prevention insulation film has a middle layer between a lowermost layer and an uppermost layer, wherein the lowermost layer is formed so as to contact the upper surfaces of the interlayer insulation layer including the wiring, the uppermost layer constitutes an uppermost portion of the diffusion prevention insulation film, and the middle layer has a lower relative dielectric constant than those of the lowermost layer and the uppermost layer.

7. 发明授权

US07534717B2 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07534717B2
公开(公告)日：2009-05-19
申请号：US11094182
申请日：2005-03-31
申请人： Hideshi Miyajima , Keiji Fujita , Hideaki Masuda , Rempei Nakata , Miyoko Shimada
发明人： Hideshi Miyajima , Keiji Fujita , Hideaki Masuda , Rempei Nakata , Miyoko Shimada
IPC分类号： H01L21/31 , H01L21/4763
CPC分类号： H01L21/02118 , H01L21/02126 , H01L21/02164 , H01L21/022 , H01L21/02216 , H01L21/02274 , H01L21/02282 , H01L21/02351 , H01L21/3122 , H01L21/76801 , H01L21/76807 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76835
摘要： The formation of an interlayer insulating film above a substrate, the formation of an insulating film of an organic material on the interlayer insulating film thereafter, and the irradiation of the insulating film of an organic material and the interlayer insulating film with electron beams, thereby curing at least the insulating film of an organic material, are proposed.
摘要翻译：在基板上形成层间绝缘膜，此后在层间绝缘膜上形成有机材料的绝缘膜，用电子束照射有机材料的绝缘膜和层间绝缘膜，从而固化至少提出了有机材料的绝缘膜。

8. 发明授权

US07154179B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07154179B2
公开(公告)日：2006-12-26
申请号：US11129794
申请日：2005-05-16
申请人： Kiyotaka Tabuchi , Hideshi Miyajima , Hideaki Masuda
发明人： Kiyotaka Tabuchi , Hideshi Miyajima , Hideaki Masuda
IPC分类号： H01L23/48
CPC分类号： H01L23/5222 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device, wherein an increase of a capacity between wiring layers is suppressed, reliability of wiring and property of withstand voltage of a diffusion prevention insulation film can be improved and the wiring resistance can be maintained low, is provided by comprising an interlayer insulation film formed on a substrate, a wiring formed on a trench pattern formed on the interlayer insulation film, and a diffusion prevention insulation film formed on an upper surfaces of the interlayer insulation film including the wiring and preventing diffusion of metal from the wiring; wherein the diffusion prevention insulation film has a middle layer between a lowermost layer and an uppermost layer, wherein the lowermost layer is formed so as to contact the upper surfaces of the interlayer insulation layer including the wiring, the uppermost layer constitutes an uppermost portion of the diffusion prevention insulation film, and the middle layer has a lower relative dielectric constant than those of the lowermost layer and the uppermost layer.
摘要翻译：通过包括层间绝缘膜，能够提高布线层之间的容量增大的布线层的增加，布线的可靠性和扩散防止绝缘膜的耐电压性能得到提高，并且布线电阻可以维持较低形成在基板上，形成在形成在层间绝缘膜上的沟槽图案上的布线以及形成在包括布线的层间绝缘膜的上表面上并防止金属从布线扩散的防扩散绝缘膜; 其中所述防扩散绝缘膜具有在最下层和最上层之间的中间层，其中所述最下层形成为与包括所述布线的所述层间绝缘层的上表面接触，所述最上层构成所述最上层扩散防止绝缘膜，并且中间层具有比最下层和最上层更低的相对介电常数。

9. 发明申请

US20050250311A1 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20050250311A1
公开(公告)日：2005-11-10
申请号：US11094182
申请日：2005-03-31
申请人： Hideshi Miyajima , Keiji Fujita , Hideaki Masuda , Rempei Nakata , Miyoko Shimada
发明人： Hideshi Miyajima , Keiji Fujita , Hideaki Masuda , Rempei Nakata , Miyoko Shimada
IPC分类号： H01L21/768 , H01L21/20 , H01L21/312
CPC分类号： H01L21/02118 , H01L21/02126 , H01L21/02164 , H01L21/022 , H01L21/02216 , H01L21/02274 , H01L21/02282 , H01L21/02351 , H01L21/3122 , H01L21/76801 , H01L21/76807 , H01L21/76825 , H01L21/76828 , H01L21/76829 , H01L21/76835
摘要： The formation of an interlayer insulating film above a substrate, the formation of an insulating film of an organic material on the interlayer insulating film thereafter, and the irradiation of the insulating film of an organic material and the interlayer insulating film with electron beams, thereby curing at least the insulating film of an organic material, are proposed.
摘要翻译：在基板上形成层间绝缘膜，此后在层间绝缘膜上形成有机材料的绝缘膜，用电子束照射有机材料的绝缘膜和层间绝缘膜，从而固化至少提出了有机材料的绝缘膜。

10. 发明申请

US20140054754A1 OPTICALLY REACTIVE MASKING 审中-公开
标题翻译：光学反应性掩蔽
公开(公告)号：US20140054754A1
公开(公告)日：2014-02-27
申请号：US13590341
申请日：2012-08-21
申请人： Tadayoshi Watanabe , Hideaki Masuda , Hideshi Miyajima
发明人： Tadayoshi Watanabe , Hideaki Masuda , Hideshi Miyajima
IPC分类号： H01L21/768 , H01L29/02
CPC分类号： H01L21/76814 , H01L21/3105 , H01L21/31111 , H01L21/31144
摘要： Systems and methods are presented for filling an opening with material of a high integrity. A material having properties in a first physical state suitable for formation of a hard mask layer and in a second physical state having properties facilitating removal of the former hard mask layer is utilized. Utilizing the material as a mask layer and subsequently removing the material enables a number of mask layers to be minimized in a subsequent filling operation (e.g., metallization). Material amenable to being in a first physical state and a second physical state is an optically reactive material. The optically reactive dielectric can comprise an element or compound which can act as an agent/catalyst in the optical conversion process along with any element or compound which can act as an accelerator for the optical reaction. Conversion can be brought about by exposure to electromagnetic radiation and/or application of thermal energy.
摘要翻译：提出了用高填充材料填充开口的系统和方法。使用具有适于形成硬掩模层的第一物理状态的属性并且具有便于去除前者的硬掩模层的性质的第二物理状态的材料。利用该材料作为掩模层并随后除去该材料使得能够在随后的填充操作（例如，金属化）中使多个掩模层最小化。适于处于第一物理状态和第二物理状态的材料是光反应性材料。光反应电介质可以包括可以在光学转换过程中作为试剂/催化剂的元素或化合物以及可用作光学反应的促进剂的任何元素或化合物。可以通过暴露于电磁辐射和/或施加热能来实现转换。

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