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1. 发明授权

US06911362B2 Methods for forming electronic devices including capacitor structures 失效
标题翻译：用于形成包括电容器结构的电子器件的方法
公开(公告)号：US06911362B2
公开(公告)日：2005-06-28
申请号：US10635195
申请日：2003-08-06
申请人： Ki-Nam Kim , Yoon-Jong Song , Heung-Jin Joo
发明人： Ki-Nam Kim , Yoon-Jong Song , Heung-Jin Joo
IPC分类号： H01L27/105 , H01L21/8246 , H01L27/115 , H01L21/8242
CPC分类号： H01L27/11502 , H01L27/11507
摘要： Methods for forming an electronic device can include forming a capacitor structure on a portion of a substrate with the capacitor structure including a first electrode on the substrate, a capacitor dielectric on the first electrode, a second electrode on the dielectric, and a hard mask on the second electrode. More particularly, the capacitor dielectric can be between the first and second electrodes, the first electrode and the capacitor dielectric can be between the second electrode and the substrate, and the first and second electrodes and the capacitor dielectric can be between the hard mask and the substrate. An interlayer dielectric layer can be formed on the hard mask and on portions of the substrate surrounding the capacitor structure, and portions of the interlayer dielectric layer can be removed to expose the hard mask while maintaining portions of the interlayer dielectric layer on portions of the substrate surrounding the capacitor structure. The hard mask can then be removed thereby exposing portions of the second electrode while maintaining the portions of the interlayer dielectric layer on portions of the substrate surrounding the capacitor.
摘要翻译：用于形成电子器件的方法可以包括在衬底的一部分上形成电容器结构，其中电容器结构包括在衬底上的第一电极，第一电极上的电容器电介质，电介质上的第二电极，第二电极。更具体地，电容器电介质可以在第一和第二电极之间，第一电极和电容器电介质可以在第二电极和衬底之间，并且第一和第二电极和电容器电介质可以在硬掩模和第二电极之间基质。可以在硬掩模和围绕电容器结构的基板的部分上形成层间电介质层，并且可以去除层间介电层的部分以暴露硬掩模，同时将层间电介质层的部分保持在基板的部分上围绕电容器结构。然后可以去除硬掩模，从而暴露第二电极的部分，同时保持层间电介质层的部分在包围电容器的基板的部分上。

2. 发明申请

US20080111171A1 Node structures under capacitor in ferroelectric random access memory device and methods of forming the same 审中-公开
标题翻译：铁电随机存取存储器件中电容器下的节点结构及其形成方法
公开(公告)号：US20080111171A1
公开(公告)日：2008-05-15
申请号：US11811931
申请日：2007-06-12
申请人： Heung-Jin Joo , Yoon-Jong Song , Ki-Nam Kim
发明人： Heung-Jin Joo , Yoon-Jong Song , Ki-Nam Kim
IPC分类号： H01L29/94 , H01L21/02
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55
摘要： In a node structure under a capacitor in a ferroelectric random access memory device and a method of forming the same, top surfaces of the node structures are disposed at substantially the same level as a top surface of an interlayer insulating layer surrounding the node structures, and thus crystal growth of a ferroelectric in the capacitor can be stabilized. To this end, a node insulating pattern is formed on a semiconductor substrate. A node defining pattern surrounding the node insulating pattern is disposed under the node insulating pattern. A node conductive pattern is disposed between the node defining pattern and the node insulating pattern.
摘要翻译：在铁电随机存取存储器件中的电容器下的节点结构及其形成方法中，节点结构的顶表面设置在与节点结构周围的层间绝缘层的顶表面基本相同的水平处，并且因此可以使电容器中的铁电体的晶体生长稳定。为此，在半导体衬底上形成节点绝缘图案。定义节点绝缘图案周围的节点的节点设置在节点绝缘图案之下。节点导电图案设置在节点限定图案和节点绝缘图案之间。

3. 发明申请

US20060011902A1 Phase change memory device and method for forming the same 有权
标题翻译：相变存储器件及其形成方法
公开(公告)号：US20060011902A1
公开(公告)日：2006-01-19
申请号：US11149755
申请日：2005-06-10
申请人： Yoon-Jong Song , Se-Ho Lee , Ki-Nam Kim , Su-Youn Lee , Jae-Hyun Park
发明人： Yoon-Jong Song , Se-Ho Lee , Ki-Nam Kim , Su-Youn Lee , Jae-Hyun Park
IPC分类号： H01L47/00
CPC分类号： H01L45/06 , G11C2213/52 , H01L45/1233 , H01L45/126 , H01L45/141 , H01L45/1683 , Y10S438/90
摘要： A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.
摘要翻译：相变存储器件包括设置在基板上的模具层，加热电极，填充绝缘图案和相变材料图案。加热电极设置在使基板穿过模具层的开口中。加热电极形成为大致圆筒形，其侧壁共形地设置在开口的下内壁上。填充绝缘图案填充由加热电极的侧壁围绕的空白区域。相变材料图案设置在模具层上并向下延伸以填充开口的空的部分。相变材料图案接触加热电极的侧壁的顶表面。

4. 发明授权

US07488628B2 Methods for fabricating ferroelectric memory devices with improved ferroelectric properties 有权
标题翻译：具有改进的铁电性能的制造铁电存储器件的方法
公开(公告)号：US07488628B2
公开(公告)日：2009-02-10
申请号：US11384689
申请日：2006-03-20
申请人： Yoon-Jong Song , Nak-Won Jang , Ki-Nam Kim
发明人： Yoon-Jong Song , Nak-Won Jang , Ki-Nam Kim
IPC分类号： H01L21/00 , H01L21/335 , H01L21/8232 , H01L21/8242
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/65
摘要： Pursuant to embodiments of the present invention, ferroelectric memory devices are provided which comprise a transistor that is provided on an active region in a semiconductor substrate, and a capacitor that has a bottom electrode, a capacitor-ferroelectric layer and a top electrode. These devices may further include at least one planarizing layer that is adjacent to the side surfaces of the bottom electrode such that the top surface of the planarizing layer(s) and the top surface of the bottom electrode form a planar surface. The capacitor-ferroelectric may be formed on this planar surface. The device may also include a plug that electrically connects the bottom electrode to a source-drain region of the transistor. The ferroelectric memory devices according to embodiments of the present invention may reduce ferroelectric degradation of the capacitor.
摘要翻译：根据本发明的实施例，提供了包括设置在半导体衬底中的有源区上的晶体管和具有底电极，电容器 - 铁电层和顶电极的电容器的铁电存储器件。这些装置还可以包括与底部电极的侧表面相邻的至少一个平坦化层，使得平坦化层的顶表面和底部电极的顶表面形成平坦的表面。电容器 - 铁电体可以形成在该平坦表面上。器件还可以包括将底部电极电连接到晶体管的源极 - 漏极区域的插头。根据本发明实施例的铁电存储器件可以减小电容器的铁电性能降低。

5. 发明授权

US07339185B2 Phase change memory device and method for forming the same 有权
公开(公告)号：US07339185B2
公开(公告)日：2008-03-04
申请号：US11149755
申请日：2005-06-10
申请人： Yoon-Jong Song , Se-Ho Lee , Ki-Nam Kim , Su-Youn Lee , Jae-Hyun Park
发明人： Yoon-Jong Song , Se-Ho Lee , Ki-Nam Kim , Su-Youn Lee , Jae-Hyun Park
IPC分类号： H01L47/00 , H01L21/00 , G11C11/00
CPC分类号： H01L45/06 , G11C2213/52 , H01L45/1233 , H01L45/126 , H01L45/141 , H01L45/1683 , Y10S438/90
摘要： A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.

6. 发明申请

US20060160252A1 Methods for fabricating ferroelectric memory devices with improved ferroelectric properties 有权
公开(公告)号：US20060160252A1
公开(公告)日：2006-07-20
申请号：US11384689
申请日：2006-03-20
申请人： Yoon-Jong Song , Nak-Won Jang , Ki-Nam Kim
发明人： Yoon-Jong Song , Nak-Won Jang , Ki-Nam Kim
IPC分类号： H01L21/00 , H01L21/8242
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/65
摘要： Pursuant to embodiments of the present invention, ferroelectric memory devices are provided which comprise a transistor that is provided on an active region in a semiconductor substrate, and a capacitor that has a bottom electrode, a capacitor-ferroelectric layer and a top electrode. These devices may further include at least one planarizing layer that is adjacent to the side surfaces of the bottom electrode such that the top surface of the planarizing layer(s) and the top surface of the bottom electrode form a planar surface. The capacitor-ferroelectric may be formed on this planar surface. The device may also include a plug that electrically connects the bottom electrode to a source-drain region of the transistor. The ferroelectric memory devices according to embodiments of the present invention may reduce ferroelectric degradation of the capacitor.

7. 发明授权

US07045839B2 Ferroelectric memory devices with improved ferroelectric properties and associated methods for fabricating such memory devices 失效
标题翻译：具有改进的铁电性能的铁电存储器件和用于制造这种存储器件的相关方法
公开(公告)号：US07045839B2
公开(公告)日：2006-05-16
申请号：US10775016
申请日：2004-02-10
申请人： Yoon-Jong Song , Nak-Won Jang , Ki-Nam Kim
发明人： Yoon-Jong Song , Nak-Won Jang , Ki-Nam Kim
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/65
摘要： Pursuant to embodiments of the present invention, ferroelectric memory devices are provided which comprise a transistor that is provided on an active region in a semiconductor substrate, and a capacitor that has a bottom electrode, a capacitor-ferroelectric layer and a top electrode. These devices may further include at least one planarizing layer that is adjacent to the side surfaces of the bottom electrode such that the top surface of the planarizing layer(s) and the top surface of the bottom electrode form a planar surface. The capacitor-ferroelectric may be formed on this planar surface. The device may also include a plug that electrically connects the bottom electrode to a source-drain region of the transistor. The ferroelectric memory devices according to embodiments of the present invention may reduce ferroelectric degradation of the capacitor.
摘要翻译：根据本发明的实施例，提供了包括设置在半导体衬底中的有源区上的晶体管和具有底电极，电容器 - 铁电层和顶电极的电容器的铁电存储器件。这些装置还可以包括与底部电极的侧表面相邻的至少一个平坦化层，使得平坦化层的顶表面和底部电极的顶表面形成平坦的表面。电容器 - 铁电体可以形成在该平坦表面上。器件还可以包括将底部电极电连接到晶体管的源极 - 漏极区域的插头。根据本发明实施例的铁电存储器件可以减小电容器的铁电性能降低。

8. 发明申请

US20080173862A1 Phase change memory device and method for forming the same 失效
标题翻译：相变存储器件及其形成方法
公开(公告)号：US20080173862A1
公开(公告)日：2008-07-24
申请号：US12008125
申请日：2008-01-09
申请人： Yoon-Jong Song , Se-Ho Lee , Ki-Nam Kim , Su-Youn Lee , Jae-Hyun Park
发明人： Yoon-Jong Song , Se-Ho Lee , Ki-Nam Kim , Su-Youn Lee , Jae-Hyun Park
IPC分类号： H01L45/00
CPC分类号： H01L45/06 , G11C2213/52 , H01L45/1233 , H01L45/126 , H01L45/141 , H01L45/1683 , Y10S438/90
摘要： A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.
摘要翻译：相变存储器件包括设置在基板上的模具层，加热电极，填充绝缘图案和相变材料图案。加热电极设置在使基板穿过模具层的开口中。加热电极形成为大致圆筒形，其侧壁共形地设置在开口的下内壁上。填充绝缘图案填充由加热电极的侧壁围绕的空白区域。相变材料图案设置在模具层上并向下延伸以填充开口的空的部分。相变材料图案接触加热电极的侧壁的顶表面。

9. 发明授权

US06825082B2 Ferroelectric memory device and method of forming the same 失效
标题翻译：铁电存储器件及其形成方法
公开(公告)号：US06825082B2
公开(公告)日：2004-11-30
申请号：US10800273
申请日：2004-03-11
申请人： Ki-Nam Kim , Yoon-Jong Song
发明人： Ki-Nam Kim , Yoon-Jong Song
IPC分类号： H01L218242
CPC分类号： H01L27/11502 , H01L21/3144 , H01L21/3185 , H01L21/76895 , H01L27/11507 , H01L28/55 , H01L28/60
摘要： A ferroelectric memory device along with a method of forming the same are provided. A first interlayer insulating layer is formed on a semiconductor substrate. A buried contact structure is formed on the first interlayer insulating layer. The buried contact structure is electrically connected to the substrate through a first contact hole extending through the first interlayer insulating layer. A blocking layer covers or encapsulates the buried contact structure and the first interlayer insulating layer. A second interlayer insulating layer is formed on the blocking layer. A ferroelectric capacitor formed on the second interlayer insulating layer and is electrically connected to the buried contact structure through a second contact hole that penetrates the second interlayer insulating layer and the blocking layer.
摘要翻译：提供了一种铁电存储器件及其形成方法。第一层间绝缘层形成在半导体衬底上。在第一层间绝缘层上形成掩埋接触结构。掩埋接触结构通过延伸穿过第一层间绝缘层的第一接触孔电连接至基板。阻挡层覆盖或封装埋层接触结构和第一层间绝缘层。在阻挡层上形成第二层间绝缘层。形成在所述第二层间绝缘层上的铁电电容器，其通过贯穿所述第二层间绝缘层和所述阻挡层的第二接触孔与所述埋入触点结构电连接。

10. 发明授权

US06713310B2 Ferroelectric memory device using via etch-stop layer and method for manufacturing the same 失效
公开(公告)号：US06713310B2
公开(公告)日：2004-03-30
申请号：US10354651
申请日：2003-01-29
申请人： Yoon-Jong Song , Ki-Nam Kim , Sang-Woo Lee
发明人： Yoon-Jong Song , Ki-Nam Kim , Sang-Woo Lee
IPC分类号： H01G706
CPC分类号： H01L27/11502 , H01L27/11507
摘要： A ferroelectric memory device and a method for manufacturing the same. The ferroelectric memory device comprises a lower interlayer insulating layer formed on a semiconductor substrate. The ferroelectric memory device further comprises at least two adjacent ferroelectric capacitors disposed on the lower interlayer insulating layer, an interlayer insulation layer formed over the ferroelectric capacitors, leaving a top surface of the ferroelectric capacitors exposed, a patterned via etch-stop layer formed on the interlayer insulation layer, leaving the top surface of the capacitors exposed, an upper interlayer insulating layer formed on the patterned via etch-stop layer, and a plate line commonly connected to the at least two adjacent ferroelectric capacitors. Thus, integration of the ferroelectric memory device can be substantially increased.

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