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1. 发明申请

US20070210367A1 Storage capacitor and method for producing such a storage capacitor 审中-公开
标题翻译：存储电容器及其制造方法
公开(公告)号：US20070210367A1
公开(公告)日：2007-09-13
申请号：US11606381
申请日：2006-11-30
申请人： Henry Bernhardt , Thomas Hecht , Michael Stadtmueller , Christian Kapteyn , Uwe Schroder , Yeong-Kwan Kim , Andreas Spitzer
发明人： Henry Bernhardt , Thomas Hecht , Michael Stadtmueller , Christian Kapteyn , Uwe Schroder , Yeong-Kwan Kim , Andreas Spitzer
IPC分类号： H01L29/94
CPC分类号： H01L28/40 , H01L27/10861
摘要： A storage capacitor includes a first electrode layer, second electrode layer and a dielectric interlayer arranged between the first electrode layer and the second electrode layer. The dielectric interlayer contains a high-k dielectric and at least one silicon-containing component.
摘要翻译：存储电容器包括布置在第一电极层和第二电极层之间的第一电极层，第二电极层和介电中间层。电介质中间层包含高k电介质和至少一种含硅组分。

2. 发明申请

US20060275981A1 Memory and method for fabricating it 审中-公开
标题翻译：记忆及其制作方法
公开(公告)号：US20060275981A1
公开(公告)日：2006-12-07
申请号：US11442602
申请日：2006-05-30
申请人： Alejandro Avellan , Matthias Goldbach , Thomas Hecht , Stefan Jakschik , Andreas Orth , Uwe Schroder , Michael Stadtmueller , Olaf Storbeck
发明人： Alejandro Avellan , Matthias Goldbach , Thomas Hecht , Stefan Jakschik , Andreas Orth , Uwe Schroder , Michael Stadtmueller , Olaf Storbeck
IPC分类号： H01L21/8242 , H01L29/94
CPC分类号： H01L29/66181 , H01L27/10829 , H01L27/10867
摘要： Memory and method for fabricating it A memory formed as an integrated circuit in a semiconductor substrate and having storage capacitors and switching transistors. The storage capacitors are formed in the semiconductor substrate in a trench and have an outer electrode layer, which is formed around the trench, a dielectric intermediate layer, which is embodied on the trench wall, and an inner electrode layer, with which the trench is essentially filled, and the switching transistors are formed in the semiconductor substrate in a surface region and have a first source/drain doping region, a second source/drain doping region and an intervening channel, which is separated from a gate electrode by an insulator layer.
摘要翻译：存储器及其制造方法在半导体衬底中形成为集成电路并具有存储电容器和开关晶体管的存储器。存储电容器形成在沟槽中的半导体衬底中，并且具有围绕沟槽形成的外部电极层，体现在沟槽壁上的电介质中间层和内部电极层，沟槽是基本上填充，并且开关晶体管形成在表面区域中的半导体衬底中，并且具有第一源极/漏极掺杂区域，第二源极/漏极掺杂区域和中间沟道，其通过绝缘体层与栅电极分离。

3. 发明申请

US20050118336A1 Method for the deposition of silicon nitride 审中-公开
标题翻译：沉积氮化硅的方法
公开(公告)号：US20050118336A1
公开(公告)日：2005-06-02
申请号：US10487952
申请日：2002-08-27
申请人： Henry Bernhardt , Michael Stadtmueller , Dietmar Ottenwaelder , Anja Morgenschweis
发明人： Henry Bernhardt , Michael Stadtmueller , Dietmar Ottenwaelder , Anja Morgenschweis
IPC分类号： C23C16/34 , C23C16/00
CPC分类号： C23C16/345
摘要： A process is described for depositing silicon nitride, in which the temperature in a furnace is set to from 600° C. to 645° C. The silicon nitride formed in this way is permeable to small molecules, such as in particular hydrogen molecules, yet nevertheless retains its etching selectivity with respect to silicon dioxide.
摘要翻译：描述了一种用于沉积氮化硅的方法，其中将炉中的温度设定为600℃至645℃。以这种方式形成的氮化硅可渗透小分子，例如特别是氢分子，但是然而仍然保持其对二氧化硅的蚀刻选择性。

4. 发明授权

US06802712B2 Heating system, method for heating a deposition or oxidation reactor, and reactor including the heating system 有权
标题翻译：加热系统，用于加热沉积或氧化反应器的方法和包括加热系统的反应器
公开(公告)号：US06802712B2
公开(公告)日：2004-10-12
申请号：US10685062
申请日：2003-10-14
申请人： Henry Bernhardt , Thomas Seidemann , Michael Stadtmueller
发明人： Henry Bernhardt , Thomas Seidemann , Michael Stadtmueller
IPC分类号： F27D110
CPC分类号： H01L21/67109 , C23C16/46 , C30B25/10 , C30B33/005
摘要： A heating system, a method for heating a deposition reactor or an oxidation reactor, and a reactor utilizing the heating system are particularly suited for low-pressure chemical vapor deposition or oxidation. A heating system is particularly useful for heating a reactor in which a plurality of wafers is held perpendicularly to the reactant gas flowing direction that is parallel to the longitudinal axis of the reactor, to enable a deposition or oxidation reaction. The heating system is adapted to change the reactor temperature during the process. In addition, a method heats a reactor to enable a reaction. Preferably, each of a plurality of reactor zones, into which the reactor is divided in a direction parallel to the reactant gas flowing direction, is heated at a different temperature profile indicating the temperature of this specific zone versus time. Thereby, the in-plane uniformity of deposited or oxidized layers can be largely improved.
摘要翻译：加热系统，用于加热沉积反应器或氧化反应器的方法以及利用加热系统的反应器特别适用于低压化学气相沉积或氧化。加热系统特别可用于加热其中多个晶片垂直于平行于反应器的纵向轴线的反应物气体流动方向保持的反应器，以实现沉积或氧化反应。加热系统适用于在过程中改变反应器温度。此外，一种方法加热反应器以进行反应。优选地，将反应器沿平行于反应物气体流动方向的方向分割的多个反应器区域中的每一个以指示该特定区域的温度相对于时间的不同温度分布被加热。由此，能够大幅提高沉积层或氧化层的面内均匀性。

5. 发明授权

US07144770B2 Memory cell and method for fabricating it 有权
标题翻译：记忆单元及其制造方法
公开(公告)号：US07144770B2
公开(公告)日：2006-12-05
申请号：US10980069
申请日：2004-11-03
申请人： Albert Birner , Matthias Foerster , Thomas Hecht , Michael Stadtmueller , Andreas Orth
发明人： Albert Birner , Matthias Foerster , Thomas Hecht , Michael Stadtmueller , Andreas Orth
IPC分类号： H01L21/8242
CPC分类号： H01L29/66181 , H01L29/945
摘要： The invention provides a method for fabricating a memory cell, a substrate (101) being provided, a trench-type depression (102) being etched into the substrate (101), a barrier layer (103) being deposited non-conformally in the trench-type depression (102), grain elements (104) being grown on the inner areas of the trench-type depression (102), a dielectric layer (202) being deposited on the surfaces of the grain elements and the inner areas of the trench-type depression, and a conduction layer being deposited on the dielectric layer, the grain elements (104) growing selectively on the inner areas (105) of the trench-type depression (102) in an electrode region (301) forming a lower region of the trench-type depression (102) and an amorphous silicon layer continuing to grow in a collar region (302) forming an upper region of the trench-type depression (102).
摘要翻译：本发明提供了一种用于制造存储单元的方法，提供了一种衬底（101），蚀刻到衬底（101）中的沟槽型凹陷（102），在沟槽中非保形地沉积的阻挡层（103）型凹陷（102），在沟槽型凹部（102）的内部区域上生长的晶粒元素（104），沉积在晶粒元素的表面上的介电层（202）和沟槽的内部区域型凹陷，并且导电层沉积在电介质层上，晶粒元素（104）选择性地生长在形成下部区域的电极区域（301）中的沟槽型凹陷（102）的内部区域（105）的沟槽型凹陷（102）和在形成沟槽型凹陷（102）的上部区域的凸缘区域（302）中继续生长的非晶硅层。

6. 发明申请

US20050158945A1 Memory cell and method for fabricating it 有权
标题翻译：记忆单元及其制造方法
公开(公告)号：US20050158945A1
公开(公告)日：2005-07-21
申请号：US10980069
申请日：2004-11-03
申请人： Albert Birner , Matthias Foerster , Thomas Hecht , Michael Stadtmueller , Andreas Orth
发明人： Albert Birner , Matthias Foerster , Thomas Hecht , Michael Stadtmueller , Andreas Orth
IPC分类号： H01L21/8239 , H01L21/334 , H01L21/8229 , H01L21/8242 , H01L29/94
CPC分类号： H01L29/66181 , H01L29/945
摘要： The invention provides a method for fabricating a memory cell, a substrate (101) being provided, a trench-type depression (102) being etched into the substrate (101), a barrier layer (103) being deposited non-conformally in the trench-type depression (102), grain elements (104) being grown on the inner areas of the trench-type depression (102), a dielectric layer (202) being deposited on the surfaces of the grain elements and the inner areas of the trench-type depression, and a conduction layer being deposited on the dielectric layer, the grain elements (104) growing selectively on the inner areas (105) of the trench-type depression (102) in an electrode region (301) forming a lower region of the trench-type depression (102) and an amorphous silicon layer continuing to grow in a collar region (302) forming an upper region of the trench-type depression (102).
摘要翻译：本发明提供了一种用于制造存储单元的方法，提供了一种衬底（101），蚀刻到衬底（101）中的沟槽型凹陷（102），在沟槽中非保形地沉积的阻挡层（103）型凹陷（102），在沟槽型凹部（102）的内部区域上生长的晶粒元素（104），沉积在晶粒元素的表面上的介电层（202）和沟槽的内部区域型凹陷，并且导电层沉积在电介质层上，晶粒元素（104）选择性地生长在形成下部区域的电极区域（301）中的沟槽型凹陷（102）的内部区域（105）的沟槽型凹陷（102）和在形成沟槽型凹陷（102）的上部区域的凸缘区域（302）中继续生长的非晶硅层。

7. 发明申请

US20080182344A1 Method and system for determining deformations on a substrate 审中-公开
标题翻译：用于确定衬底上的变形的方法和系统
公开(公告)号：US20080182344A1
公开(公告)日：2008-07-31
申请号：US11699926
申请日：2007-01-30
申请人： Steffen Mueller , Alfred Kersch , Boris Habets , Michael Stadtmueller , Thomas Hecht
发明人： Steffen Mueller , Alfred Kersch , Boris Habets , Michael Stadtmueller , Thomas Hecht
IPC分类号： H01L21/66
CPC分类号： G01B21/32
摘要： A method and system determines deformations in a substrate in the manufacturing of semiconductor devices. At least one property of vertical deformations of the substrate is measured at a plurality of locations on the substrate. Afterward, an automatic computation of horizontal deformations is determined based on the measured properties of vertical deformations with a model for the deformation behavior of the substrate.
摘要翻译：一种方法和系统在半导体器件的制造中确定衬底中的变形。在衬底上的多个位置处测量衬底的垂直变形的至少一个特性。之后，基于垂直变形的测量属性，用基板的变形行为的模型来确定水平变形的自动计算。

8. 发明授权

US07718475B2 Method for manufacturing an integrated circuit including a transistor 有权
标题翻译：一种用于制造包括晶体管的集成电路的方法
公开(公告)号：US07718475B2
公开(公告)日：2010-05-18
申请号：US11786822
申请日：2007-04-13
申请人： Matthias Goldbach , Erhard Landgraf , Michael Stadtmueller , Moritz Haupt , Sven Schmidbauer , Tobias Mono , Jorg Radecker
发明人： Matthias Goldbach , Erhard Landgraf , Michael Stadtmueller , Moritz Haupt , Sven Schmidbauer , Tobias Mono , Jorg Radecker
IPC分类号： H01L21/335 , H01L29/76
CPC分类号： H01L21/28061 , H01L29/4941 , H01L29/78 , H01L29/7845
摘要： The present invention relates to a transistor comprising a gate channel area and a gate stack having mechanical stress arranged on the gate channel area.
摘要翻译：本发明涉及一种晶体管，其包括栅极沟道区和具有布置在栅极沟道区上的机械应力的栅极叠层。

9. 发明授权

US08685828B2 Method of forming a capacitor 有权
标题翻译：形成电容器的方法
公开(公告)号：US08685828B2
公开(公告)日：2014-04-01
申请号：US13007392
申请日：2011-01-14
申请人： Wolfgang Lehnert , Michael Stadtmueller , Stefan Pompl , Markus Meyer
发明人： Wolfgang Lehnert , Michael Stadtmueller , Stefan Pompl , Markus Meyer
IPC分类号： H01L21/20
CPC分类号： H01L28/60 , H01L27/10829 , H01L27/10861 , H01L29/66181 , H01L29/945
摘要： A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.
摘要翻译：公开了半导体器件和半导体器件的制造方法。该方法包括在衬底中形成沟槽，用第一半导体材料部分地填充沟槽，沿着第一半导体材料的表面形成界面，并用第二半导体材料填充沟槽。半导体器件包括沿着沟槽的侧壁布置的第一电极和布置在第一电极上的电介质。所述半导体器件还包括至少部分地填充所述沟槽的第二电极，其中所述第二电极包括所述第二电极内的界面。

10. 发明申请

US20080251815A1 Method for manufacturing a transistor 有权
标题翻译：制造晶体管的方法
公开(公告)号：US20080251815A1
公开(公告)日：2008-10-16
申请号：US11786822
申请日：2007-04-13
申请人： Matthias Goldbach , Erhard Landgraf , Michael Stadtmueller , Moritz Haupt , Sven Schmidbauer , Tobias Mono , Jorg Radecker
发明人： Matthias Goldbach , Erhard Landgraf , Michael Stadtmueller , Moritz Haupt , Sven Schmidbauer , Tobias Mono , Jorg Radecker
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L21/28061 , H01L29/4941 , H01L29/78 , H01L29/7845
摘要： The present invention relates to a transistor comprising a gate channel area and a gate stack having mechanical stress arranged on the gate channel area.
摘要翻译：本发明涉及一种晶体管，其包括栅极沟道区和具有布置在栅极沟道区上的机械应力的栅极叠层。

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