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1. 发明授权

US07485891B2 Multi-bit phase change memory cell and multi-bit phase change memory including the same, method of forming a multi-bit phase change memory, and method of programming a multi-bit phase change memory 失效
标题翻译：包括相同的多位相变存储单元和多位相变存储器，形成多位相变存储器的方法，以及编程多位相变存储器的方法
公开(公告)号：US07485891B2
公开(公告)日：2009-02-03
申请号：US10718070
申请日：2003-11-20
申请人： Hendrik F. Hamann , Chung Hon Lam , Michelle Leigh Steen , Hon-Sum Philip Wong
发明人： Hendrik F. Hamann , Chung Hon Lam , Michelle Leigh Steen , Hon-Sum Philip Wong
IPC分类号： H01L21/302
CPC分类号： H01L45/06 , G11C11/56 , G11C11/5678 , G11C13/0004 , G11C2213/71 , H01L27/2463 , H01L45/1233 , H01L45/144 , H01L45/1675
摘要： A multi-bit phase change memory cell including a stack of a plurality of conductive layers and a plurality of phase change material layers, each of the phase change material layers disposed between a corresponding pair of conductive layers and having electrical resistances that are different from one another.
摘要翻译：一种多位相变存储单元，包括多个导电层和多个相变材料层的堆叠，每个相变材料层设置在相应的一对导电层之间并且具有不同于一个导电层的电阻另一个。

2. 发明授权

US07319608B2 Non-volatile content addressable memory using phase-change-material memory elements 有权
标题翻译：使用相变材料存储元件的非易失性内容可寻址存储器
公开(公告)号：US07319608B2
公开(公告)日：2008-01-15
申请号：US11172473
申请日：2005-06-30
申请人： Louis L. C. Hsu , Brian L. Ji , Chung Hon Lam , Hon-Sum Philip Wong
发明人： Louis L. C. Hsu , Brian L. Ji , Chung Hon Lam , Hon-Sum Philip Wong
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C15/046
摘要： A non-volatile content addressable memory cell comprises: a first phase change material element, the first phase change material element having one end connected to a match-line; a first transistor, the first transistor having a gate connected to a word-line, a source connected to a true bit-read-write-search-line, and a drain connected to another end of the first phase change material element; a second phase change material element, the second phase change material element having one end connected to the match-line; and a second transistor, the second transistor having a gate connected to the word-line, a source connected to a complementary bit-read-write-search-line, and a drain connected to another end of the second phase change material element.
摘要翻译：非易失性内容可寻址存储单元包括：第一相变材料元件，所述第一相变材料元件具有连接到匹配线的一端; 第一晶体管，第一晶体管具有连接到字线的栅极，连接到真位读 - 写搜索线的源极和连接到第一相变材料元件的另一端的漏极; 第二相变材料元件，所述第二相变材料元件具有连接到所述匹配线的一端; 以及第二晶体管，所述第二晶体管具有连接到所述字线的栅极，连接到互补位读写搜索线的源极和连接到所述第二相变材料元件的另一端的漏极。

3. 发明申请

US20120142158A1 Self-Aligned Nanotube Field Effect Transistor and Method of Fabricating Same 有权
标题翻译：自对准纳米管场效应晶体管及其制造方法
公开(公告)号：US20120142158A1
公开(公告)日：2012-06-07
申请号：US13368901
申请日：2012-02-08
申请人： Joerg Appenzeller , Phaedon Avouris , Kevin K. Chan , Philip G. Collins , Richard Martel , Hon-Sum Philip Wong
发明人： Joerg Appenzeller , Phaedon Avouris , Kevin K. Chan , Philip G. Collins , Richard Martel , Hon-Sum Philip Wong
IPC分类号： H01L21/336 , B82Y40/00
CPC分类号： H01L51/0516 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L51/0048 , H01L51/0052 , H01L51/0545 , Y10S977/842 , Y10S977/938 , Y10S977/94
摘要： A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
摘要翻译：自对准碳纳米管场效应晶体管半导体器件分别包括沉积在基板上的碳纳米管，分别形成在碳纳米管的第一端和第二端的源极和漏极，以及基本上形成的栅极碳纳米管的一部分，通过电介质膜与碳纳米管分离。

4. 发明授权

US06628333B1 Digital instant camera having a printer 失效
标题翻译：具有打印机的数字即时相机
公开(公告)号：US06628333B1
公开(公告)日：2003-09-30
申请号：US08967853
申请日：1997-11-12
申请人： Sudhir Muniswamy Gowda , Mary Yvonne Lanzerotti , Dale Jonathan Pearson , Hon-Sum Philip Wong
发明人： Sudhir Muniswamy Gowda , Mary Yvonne Lanzerotti , Dale Jonathan Pearson , Hon-Sum Philip Wong
IPC分类号： H04N5222
CPC分类号： H04N1/2154 , H04N1/00347 , H04N1/0044 , H04N1/00538 , H04N1/2112 , H04N2101/00 , H04N2201/0082 , H04N2201/0084 , H04N2201/0089
摘要： In an illustrative embodiment, an instant camera is provided which includes an imager for receiving an image of an object to be photographed. The imager outputs a signal corresponding to the received image, and a memory device stores the signal. A printer prints instant film photographs corresponding to received or stored images, and has the capability to print at least one image on a single piece of instant film. A preview unit has at least one display for displaying an image corresponding to a received or stored image. A controller, in communication with the imager, the memory device, the printer, and the preview unit, controls the transfer of the signal from the imager to the memory device, from the memory device to the printer, and from the memory device to the preview unit.
摘要翻译：在说明性实施例中，提供了一种即时相机，其包括用于接收待拍摄对象的图像的成像器。成像器输出与接收到的图像相对应的信号，存储器件存储信号。打印机打印对应于接收或存储的图像的即时胶片照片，并且能够在单片即时胶片上打印至少一幅图像。预览单元具有用于显示与所接收或存储的图像相对应的图像的至少一个显示器。与成像器，存储设备，打印机和预览单元通信的控制器控制从成像器到存储器设备的信号从存储设备到打印机以及从存储设备传输到存储设备预览单元。

5. 发明授权

US06344877B1 Image sensor with dummy pixel or dummy pixel array 失效
标题翻译：具有虚拟像素或伪像素阵列的图像传感器
公开(公告)号：US06344877B1
公开(公告)日：2002-02-05
申请号：US08873539
申请日：1997-06-12
申请人： Sudhir Muniswamy Gowda , Hyun Jong Shin , Hon-Sum Philip Wong , Peter Hong Xiao , Jungwook Yang
发明人： Sudhir Muniswamy Gowda , Hyun Jong Shin , Hon-Sum Philip Wong , Peter Hong Xiao , Jungwook Yang
IPC分类号： H04N964
CPC分类号： H04N5/3745 , H04N5/3575 , H04N5/361 , H04N5/3651
摘要： Disclosed is an image sensor including one or more dummy pixels that produce a reference signal which is used to compensate for errors within the devices of the main pixel cells. In one embodiment, at least one dummy pixel is used in conjunction with other circuitry to correct for nonlinearities in the transfer characteristic of a source follower transistor within each pixel. In another embodiment, an array of dummy pixels is used to correct for leakage current within the pixels during an electronic shutter mode of operation. The two techniques can be combined whereby both threshold voltage mismatch and leakage current are compensated for.
摘要翻译：公开了一种图像传感器，其包括产生用于补偿主像素单元的装置内的误差的参考信号的一个或多个虚拟像素。在一个实施例中，至少一个虚拟像素与其他电路结合使用，以校正每个像素内的源极跟随器晶体管的传输特性中的非线性。在另一个实施例中，在电子快门操作模式期间，使用虚拟像素阵列来校正像素内的漏电流。可以组合两种技术，由此补偿阈值电压失配和泄漏电流。

6. 发明授权

US5877715A Correlated double sampling with up/down counter 失效
标题翻译：相关双重采样与上/下计数器
公开(公告)号：US5877715A
公开(公告)日：1999-03-02
申请号：US873537
申请日：1997-06-12
申请人： Sudhir Muniswamy Gowda , Hyun Jong Shin , Hon-Sum Philip Wong , Peter Hong Xiao , Jungwook Yang
发明人： Sudhir Muniswamy Gowda , Hyun Jong Shin , Hon-Sum Philip Wong , Peter Hong Xiao , Jungwook Yang
IPC分类号： H03M1/12 , H03M1/56 , H04N5/363 , H04N5/374 , H04N5/378 , H04N1/40 , H03M1/46
CPC分类号： H03M1/1295 , H03M1/1023 , H03M1/123 , H04N3/155 , H03M1/56
摘要： Disclosed is a circuit for performing correlated double sampling entirely in the digital domain. In an exemplary embodiment, the circuit includes a plurality of comparators, each having a first input coupled to an associated data line for receiving first and second signals in first and second sampling intervals, respectively. A time varying reference signal is applied to the second input of each comparator. A plurality of up/down counters are coupled to respective ones of the comparators, and each is operable to count in a first direction during the first sampling interval and in an opposite direction during the second sampling interval. Each up/down counter is caused to stop counting when the amplitude of the variable reference signal substantially equals the amplitude of the respective first or second signal. As a result, each up/down counter provides an output representing a subtraction of one of said first or second signals from the other. The invention has particular utility when used in conjunction with a CMOS image sensor.
摘要翻译：公开了一种完全在数字领域进行相关双重采样的电路。在示例性实施例中，电路包括多个比较器，每个比较器具有耦合到相关联的数据线的第一输入，用于分别在第一和第二采样间隔中接收第一和第二信号。时变参考信号被施加到每个比较器的第二输入端。多个向上/向下计数器耦合到相应的比较器，并且每个可操作以在第一采样间隔期间以第一方向计数，并且在第二采样间隔期间以相反的方向计数。当可变参考信号的幅度基本上等于相应的第一或第二信号的幅度时，使每个向上/向下计数器停止计数。结果，每个向上/向下计数器提供表示从另一个减去所述第一或第二信号之一的输出。当与CMOS图像传感器结合使用时，本发明具有特别的用途。

7. 发明授权

US5773331A Method for making single and double gate field effect transistors with sidewall source-drain contacts 失效
标题翻译：制造具有侧壁源极 - 漏极触点的单栅极和双栅极场效应晶体管的方法
公开(公告)号：US5773331A
公开(公告)日：1998-06-30
申请号：US767916
申请日：1996-12-17
申请人： Paul Michael Solomon , Hon-Sum Philip Wong
发明人： Paul Michael Solomon , Hon-Sum Philip Wong
IPC分类号： H01L21/336 , H01L29/417 , H01L29/786 , H01L21/86
CPC分类号： H01L29/66772 , H01L29/41733 , H01L29/78648
摘要： The present invention concerns single-gate and double-gate field effect transistors having a sidewall source contact and a sidewall drain contact, and methods for making such field effect transistors. The channel of the present field effect transistors is raised with respect to the support structure underneath and the source and drain regions form an integral part of the channel.
摘要翻译：本发明涉及具有侧壁源极接触和侧壁漏极接触的单栅极和双栅极场效应晶体管，以及用于制造这种场效应晶体管的方法。本场效应晶体管的通道相对于下面的支撑结构升高，并且源极和漏极区域形成通道的整体部分。

8. 发明授权

US5708263A Photodetector array 失效
标题翻译：光电检测器阵列
公开(公告)号：US5708263A
公开(公告)日：1998-01-13
申请号：US600706
申请日：1996-02-13
申请人： Hon-Sum Philip Wong
发明人： Hon-Sum Philip Wong
IPC分类号： H01L27/146 , H04N5/335 , H04N5/357 , H04N5/374 , H01J40/14
CPC分类号： H04N5/335 , H01L27/14609
摘要： A photodetector array for sensing radiant energy is described incorporating photodetectors, a respective semiconductor region for holding charge and two transistors coupled in series at each pixel, and a column load transistor. An amplifier at the load transistor may provide gain while providing dynamic range compression and a reduction in signal noise due to resetting of the voltage at the semiconductor regions. The invention overcomes the problem of CMOS manufacturing of photodetector arrays and for a simplified circuit per pixel to enable denser arrays and reduced noise.
摘要翻译：描述了用于感测辐射能的光电检测器阵列，其包括光电检测器，用于保持电荷的相应半导体区域和在每个像素处串联连接的两个晶体管和列负载晶体管。负载晶体管处的放大器可以提供增益，同时提供动态范围压缩以及由于半导体区域处的电压复位而引起的信号噪声的降低。本发明克服了光电探测器阵列的CMOS制造和每像素简化电路的问题，以使得更加密集的阵列和降低的噪声。

9. 发明授权

US07897960B2 Self-aligned nanotube field effect transistor 有权
标题翻译：自对准纳米管场效应晶体管
公开(公告)号：US07897960B2
公开(公告)日：2011-03-01
申请号：US12544412
申请日：2009-08-20
申请人： Joerg Appenzeller , Phaedon Avouris , Kevin K. Chan , Philip G. Collins , Richard Martel , Hon-Sum Philip Wong
发明人： Joerg Appenzeller , Phaedon Avouris , Kevin K. Chan , Philip G. Collins , Richard Martel , Hon-Sum Philip Wong
IPC分类号： H01L29/76 , H01L29/06 , H01L29/94
CPC分类号： H01L51/0516 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L51/0048 , H01L51/0052 , H01L51/0545 , Y10S977/842 , Y10S977/938 , Y10S977/94
摘要： A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
摘要翻译：自对准碳纳米管场效应晶体管半导体器件分别包括沉积在基板上的碳纳米管，分别形成在碳纳米管的第一端和第二端的源极和漏极，以及基本上形成的栅极碳纳米管的一部分，通过电介质膜与碳纳米管分离。

10. 发明申请

US20090309092A1 SELF-ALIGNED NANOTUBE FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING SAME 有权
标题翻译：自对准纳米管场效应晶体管及其制备方法
公开(公告)号：US20090309092A1
公开(公告)日：2009-12-17
申请号：US12544412
申请日：2009-08-20
申请人： JOERG APPENZELLER , Phaedon Avouris , Kevin K. Chan , Philip G. Collins , Richard Martel , Hon-Sum Philip Wong
发明人： JOERG APPENZELLER , Phaedon Avouris , Kevin K. Chan , Philip G. Collins , Richard Martel , Hon-Sum Philip Wong
IPC分类号： H01L29/12
CPC分类号： H01L51/0516 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L51/0048 , H01L51/0052 , H01L51/0545 , Y10S977/842 , Y10S977/938 , Y10S977/94
摘要： A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube deposited on a substrate, a source and a drain formed at a first end and a second end of the carbon-nanotube, respectively, and a gate formed substantially over a portion of the carbon-nanotube, separated from the carbon-nanotube by a dielectric film.
摘要翻译：自对准碳纳米管场效应晶体管半导体器件分别包括沉积在基板上的碳纳米管，分别形成在碳纳米管的第一端和第二端的源极和漏极，以及基本上形成的栅极碳纳米管的一部分，通过电介质膜与碳纳米管分离。

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