专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09064709B2 High breakdown voltage III-N depletion mode MOS capacitors 有权
标题翻译：高耐压III-N耗尽型MOS电容
公开(公告)号：US09064709B2
公开(公告)日：2015-06-23
申请号：US13631569
申请日：2012-09-28
申请人： Han Wui Then , Sansaptak Dasgupta , Gerhard Schrom , Valluri R. Rao , Robert S. Chau
发明人： Han Wui Then , Sansaptak Dasgupta , Gerhard Schrom , Valluri R. Rao , Robert S. Chau
IPC分类号： H01L27/06 , H01L29/93 , H01L29/66 , H01L29/94 , H01L27/08 , H01L29/06 , H01L29/205 , H01L29/04 , H01L29/20
CPC分类号： H01L27/0605 , H01L27/0805 , H01L29/045 , H01L29/0657 , H01L29/2003 , H01L29/205 , H01L29/66181 , H01L29/93 , H01L29/94
摘要： III-N high voltage MOS capacitors and System on Chip (SoC) solutions integrating at least one III-N MOS capacitor capable of high breakdown voltages (BV) to implement high voltage and/or high power circuits. Breakdown voltages over 4V may be achieved avoiding any need to series couple capacitors in an RFIC and/or PMIC. In embodiments, depletion mode III-N capacitors including a GaN layer in which a two dimensional electron gas (2DEG) is formed at threshold voltages below 0V are monolithically integrated with group IV transistor architectures, such as planar and non-planar silicon CMOS transistor technologies. In embodiments, silicon substrates are etched to provide a (111) epitaxial growth surface over which a GaN layer and III-N barrier layer are formed. In embodiments, a high-K dielectric layer is deposited, and capacitor terminal contacts are made to the 2DEG and over the dielectric layer.
摘要翻译：集成了至少一个具有高击穿电压（BV）的III-N MOS电容器的III-N高压MOS电容器和片上系统（SoC）解决方案，以实现高压和/或高功率电路。可以实现超过4V的击穿电压，避免了RFIC和/或PMIC中的串联耦合电容的任何需要。在实施例中，包括其中在低于0V的阈值电压下形成二维电子气（2DEG）的GaN层的耗尽型III-N电容器与IV族晶体管架构单片集成，例如平面和非平面硅CMOS晶体管技术。在实施例中，蚀刻硅衬底以提供形成GaN层和III-N势垒层的（111）外延生长表面。在实施例中，沉积高K电介质层，并且电容器端子触点被制成2DEG并且在电介质层上。

2. 发明授权

US09154026B2 Bridge driver for a switching voltage regulator which is operable to soft-switch and hard-switch 有权
标题翻译：用于开关电压调节器的桥式驱动器，可用于软开关和硬开关
公开(公告)号：US09154026B2
公开(公告)日：2015-10-06
申请号：US13534780
申请日：2012-06-27
申请人： Gerhard Schrom , Mark S. Milshtein , Alexander Lyakhov
发明人： Gerhard Schrom , Mark S. Milshtein , Alexander Lyakhov
IPC分类号： G05F1/563 , H02M1/08 , H02M3/158 , H02M3/338
CPC分类号： H02M3/158 , H02M1/08 , H02M3/1588 , H02M3/338 , Y02B70/1466
摘要： Described is an apparatus which comprises: a low-side switch coupled to an output node for providing regulated voltage supply; and a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage. Described is also a voltage regulator which comprises: a signal generator to generate a pulse-width modulated (PWM) signal; a bridge having a low-side switch coupled to an output node for providing regulated voltage supply according to the PWM signal; a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage; and a bridge controller to provide control signals to the first driver. The voltage regulator may operate without diode clamps and its operation is self-timed. The voltage regulator also provides tolerance against process variation.
摘要翻译：描述了一种装置，其包括：耦合到输出节点的低侧开关，用于提供稳压电压; 以及第一驱动器，其可操作以在所述输出节点上升到高于第一晶体管阈值电压时使所述低侧开关断开。还描述了一种电压调节器，其包括：产生脉冲宽度调制（PWM）信号的信号发生器; 具有耦合到输出节点的低侧开关的桥，用于根据所述PWM信号提供稳压电源; 第一驱动器，其可操作以在所述输出节点上升到高于第一晶体管阈值电压时使所述低侧开关断开; 以及桥控制器，用于向第一驱动器提供控制信号。电压调节器可以在没有二极管钳位的情况下工作，并且其操作是自定时的。电压调节器还提供了过程变化的公差。

3. 发明授权

US09048851B2 Spread-spectrum apparatus for voltage regulator 有权
标题翻译：电压调节器扩频装置
公开(公告)号：US09048851B2
公开(公告)日：2015-06-02
申请号：US13907770
申请日：2013-05-31
申请人： Gerhard Schrom , Alexander Lyakhov , Michael W. Rogers , Dawson W. Kesling , Jonathan P. Douglas , J. Keith Hodgson
发明人： Gerhard Schrom , Alexander Lyakhov , Michael W. Rogers , Dawson W. Kesling , Jonathan P. Douglas , J. Keith Hodgson
IPC分类号： H04L7/00 , H04B1/00 , H03L7/189
CPC分类号： H03L7/189 , H03L7/083 , H03L7/093 , H03L7/18
摘要： Described is an apparatus for providing spread-spectrum to a clock signal. The apparatus comprises: an oscillator to generate an output clock signal, the oscillator to receive an adjustable reference signal to adjust frequency of the output clock signal; a first circuit to provide a first signal indicative of a center frequency of the output clock signal; a second circuit to generate a switching waveform to provide spread-spectrum for the output clock signal; and a third circuit, coupled to the first and second circuits, to provide the adjustable reference signal according to the first signal and the switching waveform.
摘要翻译：描述了一种用于向时钟信号提供扩展频谱的装置。所述装置包括：振荡器，用于产生输出时钟信号，所述振荡器接收可调参考信号以调节所述输出时钟信号的频率; 提供表示输出时钟信号的中心频率的第一信号的第一电路; 产生开关波形以提供输出时钟信号的扩频的第二电路; 以及耦合到第一和第二电路的第三电路，以根据第一信号和开关波形提供可调参考信号。

4. 发明授权

US08890737B2 Current balancing, current sensor, and phase balancing apparatus and method for a voltage regulator 有权
标题翻译：用于电压调节器的电流平衡，电流传感器和相位平衡装置和方法
公开(公告)号：US08890737B2
公开(公告)日：2014-11-18
申请号：US13930559
申请日：2013-06-28
申请人： Gerhard Schrom , J. Keith Hodgson , Alexander Lyakhov , Chiu Keung Tang , Narayanan Raghuraman , Narayanan Natarajan
发明人： Gerhard Schrom , J. Keith Hodgson , Alexander Lyakhov , Chiu Keung Tang , Narayanan Raghuraman , Narayanan Natarajan
IPC分类号： H03M1/66 , G01R19/00
CPC分类号： G01R19/0092 , G06T3/40 , H02M1/088 , H02M3/156 , H02M3/157 , H02M3/158 , H02M2001/0009 , H02M2003/1566 , H03L5/00 , H03M1/66 , H03M1/685
摘要： Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, an apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.
摘要翻译：描述了电流平衡，电流检测和相位平衡，偏移消除，使用二进制编码输入（不使用二进制到温度计解码器）的单调输出的数模转换器，电压调节器（VR）等的补偿器的装置和方法。一个示例，一种装置包括：耦合到电容器和负载的多个电感器; 多个桥，每个桥耦合到来自多个电感器的对应的电感器; 以及多个电流传感器，每个电流传感器耦合到桥接器以感测通过桥的晶体管的电流。

5. 发明授权

US08773233B2 Integrated inductors 有权
标题翻译：集成电感器
公开(公告)号：US08773233B2
公开(公告)日：2014-07-08
申请号：US13758881
申请日：2013-02-04
申请人： Peter Hazucha , Trang T. Nguyen , Gerhard Schrom , Fabrice Paillet , Donald S. Gardner , Sung T. Moon , Tanay Karnik
发明人： Peter Hazucha , Trang T. Nguyen , Gerhard Schrom , Fabrice Paillet , Donald S. Gardner , Sung T. Moon , Tanay Karnik
IPC分类号： H01F5/00
CPC分类号： H01F27/34 , H01F17/0033 , H01F21/12 , H01F2021/125
摘要： Multiple-inductor embodiments for use in substrates are provided herein.
摘要翻译：本文提供了用于基板的多电感器实施例。

6. 发明授权

US08108984B2 Method for manufacturing integrated circuit inductors having slotted magnetic material 有权
标题翻译：具有开槽磁性材料的集成电路电感器的制造方法
公开(公告)号：US08108984B2
公开(公告)日：2012-02-07
申请号：US12406512
申请日：2009-03-18
申请人： Donald S. Gardner , Gerhard Schrom , Peter Hazucha , Fabrice Paillet , Tanay Karnik
发明人： Donald S. Gardner , Gerhard Schrom , Peter Hazucha , Fabrice Paillet , Tanay Karnik
IPC分类号： H01F7/06
CPC分类号： H01F17/0006 , H01F10/132 , H01F10/16 , H01F41/34 , H01F2017/0053 , H01F2017/0066 , H01L23/5227 , H01L2924/0002 , Y10T29/4902 , Y10T29/49071 , Y10T29/49073 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： Methods of manufacture of integrated circuit inductors having slotted magnetic material will be described. The methods may employ electro- or electroless plating techniques to form a layer or layers of magnetic material within the slotted magnetic material structure, and in particular those magnetic material layers adjacent to insulator layers.
摘要翻译：将描述具有开槽磁性材料的集成电路电感器的制造方法。该方法可以采用电镀或无电镀技术在开槽磁性材料结构内形成一层或多层磁性材料，特别是与绝缘体层相邻的那些磁性材料层。

7. 发明申请

US20110068887A1 ON-DIE MICRO-TRANSFORMER STRUCTURES WITH MAGNETIC MATERIALS 有权
标题翻译：带磁性材料的电容式微型变压器结构
公开(公告)号：US20110068887A1
公开(公告)日：2011-03-24
申请号：US12955415
申请日：2010-11-29
申请人： Donald S. Gardner , Peter Hazucha , Gerhard Schrom
发明人： Donald S. Gardner , Peter Hazucha , Gerhard Schrom
IPC分类号： H01F5/00
CPC分类号： H01P1/2056 , H01F10/132 , H01F19/08 , H01F27/2804 , H01F27/29
摘要： Some embodiments include a die having a transformer. The transformer includes windings formed from a set of lines, such that no two lines belonging to any one winding are nearest neighbors. The lines are formed within one layer on the die. Other embodiments are described.
摘要翻译：一些实施例包括具有变压器的管芯。变压器包括由一组线组成的绕组，使得属于任何一个绕组的两条线不是最邻近的。线在模具的一层内形成。描述其他实施例。

8. 发明申请

US20100219516A1 Power management integrated circuit 有权
标题翻译：电源管理集成电路
公开(公告)号：US20100219516A1
公开(公告)日：2010-09-02
申请号：US12660305
申请日：2010-02-24
申请人： Siva G. Narendra , James W. Tschanz , Howard A. Wilson , Donald S. Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek K. De , Shekhar Y. Borkar
发明人： Siva G. Narendra , James W. Tschanz , Howard A. Wilson , Donald S. Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek K. De , Shekhar Y. Borkar
IPC分类号： H01L23/495
CPC分类号： H01L25/0657 , H01L25/18 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16145 , H01L2224/16227 , H01L2225/06513 , H01L2225/06527 , H01L2924/00014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.
摘要翻译：公开了一种集成电路（IC）封装。 IC封装包括第一裸片; 以及以三维封装布局结合到CPU管芯的第二管芯。

9. 发明申请

US20100001826A1 Inductors for integrated circuit packages 有权
标题翻译：集成电路封装的电感器
公开(公告)号：US20100001826A1
公开(公告)日：2010-01-07
申请号：US12217293
申请日：2008-07-02
申请人： Donald Gardner , Gerhard Schrom , Fabrice Paillet , Shamala Chickamenahalli
发明人： Donald Gardner , Gerhard Schrom , Fabrice Paillet , Shamala Chickamenahalli
IPC分类号： H01F27/28 , H01F41/04
CPC分类号： H01F17/0033 , H01F17/0006 , H01F17/02 , H01F27/2804 , H01F41/041 , H01F41/046 , H01F2017/002 , H01F2017/0053 , H01F2017/0066 , Y10T29/4902 , Y10T29/49073 , Y10T29/49126 , Y10T29/49147
摘要： An inductor may be formed from a magnetic film on a package substrate. Conductors coupled either to a die or a voltage converter extend perpendicularly through the film to conductive plates, defining current paths through and across the film.
摘要翻译：电感器可以由封装衬底上的磁性膜形成。耦合到管芯或电压转换器的导体垂直延伸穿过膜到导电板，限定穿过膜并穿过膜的电流路径。

10. 发明申请

US20080290980A1 CONTROL OF EDDY CURRENTS IN MAGNETIC VIAS FOR INDUCTORS AND TRANSFORMERS IN INTEGRATED CIRCUITS 失效
标题翻译：控制集成电路中电感器和变压器的磁力线的电流
公开(公告)号：US20080290980A1
公开(公告)日：2008-11-27
申请号：US12187130
申请日：2008-08-06
申请人： Donald S. Gardner , Gerhard Schrom , Peter Hazucha , Fabrice Paillet , Tanay Karnik
发明人： Donald S. Gardner , Gerhard Schrom , Peter Hazucha , Fabrice Paillet , Tanay Karnik
IPC分类号： H01F5/00 , H01F41/34
CPC分类号： H01F17/0006 , H01F3/12 , H01F10/132 , H01F10/16 , H01F27/324 , H01F41/34 , H01F2027/2819 , H01F2027/348 , H01L23/5226 , H01L23/5227 , H01L2924/0002 , Y10T29/4902 , Y10T29/49071 , H01L2924/00
摘要： An embodiment is a magnetic via. More specifically, an embodiment is a magnetic via that increases the inductance of, for example, an integrated inductor or transformer while mitigating eddy currents therein that may limit the operation of the inductor or transformer at high frequency.
摘要翻译：一个实施例是磁通孔。更具体地，实施例是磁通孔，其增加例如集成电感器或变压器的电感，同时减轻其中的涡流，这可能限制电感器或变压器在高频下的操作。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式