会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Method and apparatus for determining the layer thickness of
semiconductor layer structures
    • 用于确定半导体层结构层厚度的方法和装置
    • US4995939A
    • 1991-02-26
    • US301889
    • 1989-02-08
    • Gyorgy FerencziKatalin ErdelyiMaria SomogyiJanos BodaGyorgy FuleGabor Aszodi
    • Gyorgy FerencziKatalin ErdelyiMaria SomogyiJanos BodaGyorgy FuleGabor Aszodi
    • H01L21/306G01B7/06G01N27/42
    • G01B7/06G01N27/42
    • In a process for determining the layer thickness of semiconductor layer structures, a sample of a multilayer semi-conductor (4) is placed in contact with an electrolyte (2) then subjected to anodic etching during which the depth of etching is determined by integration of the current. During etching, the sample (4) is also excited by an electric signal and the real component of the admittance and hence the conductance of the probe at the frequency of excitation is determined, the extreme values of this component are analyzed, and the values of the depth of etching corresponding to these extremes, which characterize the junctions between the layers of the sample (4) tested, are determined. The installation for implementing the procedure contains a cell (1) filled with electrolyte (2) in which is immersed a graphite electrode (5), a saturated calomel electrode (6), and a platinum electrode (7) surrounding the surface of the sample (4) subjected to etching, electrodes (8,9) neither of which touch the surface of the sample (4) subjected to etching, a potentiostat (13) which is connected to the calomel electrode (6) and the direct current source (12), the current integrator (14), which receives the etching current intensity signal, a generator (15) which emits a periodic signal between the sample (14) and the metal electrode, and the measurement element (16) for measuring the conductance of the sample (4).
    • PCT No.PCT / HU88 / 00030 Sec。 371日期:1989年2月8日 102(e)日期1989年2月8日PCT提交1988年5月4日PCT公布。 第WO88 / 09053号公报 日期:1988年11月17日。在确定半导体层结构的层厚度的方法中,将多层半导体(4)的样品放置成与电解质(2)接触,然后进行阳极蚀刻, 的蚀刻由电流的积分确定。 在蚀刻期间,样品(4)也被电信号激发,确定激励频率下的导纳的实际分量,从而确定探针的电导,分析该分量的极值, 确定对应于这些极限的蚀刻深度,其表征测试的样品(4)的层之间的结。 用于实施该方法的装置包含一个填充有电解质(2)的电池(1),其中浸入石墨电极(5),饱和甘汞电极(6)和围绕该样品表面的铂电极(7) (4)进行蚀刻,两者都不接触经受蚀刻的样品(4)的表面的电极(8,9),与甘汞电极(6)和直流电源(6)连接的恒电位仪(13) 12),接收蚀刻电流强度信号的电流积分器(14),在样品(14)和金属电极之间发射周期性信号的发生器(15)和用于测量电导率的测量元件(16) 的样品(4)。