专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08413033B2 Device and method for calculating backward state metrics of a trellis 有权
标题翻译：用于计算网格的后向状态度量的装置和方法
公开(公告)号：US08413033B2
公开(公告)日：2013-04-02
申请号：US12509276
申请日：2009-07-24
申请人： Guy Drory , Ron Bercovich , Aviel Livay , Ilia Moskovich , Yuval Neeman
发明人： Guy Drory , Ron Bercovich , Aviel Livay , Ilia Moskovich , Yuval Neeman
IPC分类号： H03M13/00
CPC分类号： H03M13/3905 , H03M13/2957 , H03M13/395 , H03M13/6356 , H03M13/6525 , H03M13/6558
摘要： A method for calculating backward state metrics of a trellis, the method includes: performing a radix-K calculation of backward state matrices of multiple states of at least one time instance of a trellis; and performing a radix-J calculation of backward state matrices of multiple states of at least one other time instance of the trellis; wherein K differs from J.
摘要翻译：一种用于计算网格的后向状态度量的方法，所述方法包括：对网格的至少一个时间实例的多个状态的后向状态矩阵进行基数K计算; 以及对所述网格的至少另一个时间实例的多个状态的后向状态矩阵进行基数-J计算; 其中K与J.

2. 发明申请

US20110019781A1 DEVICE AND METHOD FOR CALCULATING BACKWARD STATE METRICS OF A TRELLIS 有权
标题翻译：用于计算TRELLIS的后向状态度量的装置和方法
公开(公告)号：US20110019781A1
公开(公告)日：2011-01-27
申请号：US12509276
申请日：2009-07-24
申请人： Guy Drory , Ron Bercovich , Aviel Livay , Ilia Moskovich , Yuval Neeman
发明人： Guy Drory , Ron Bercovich , Aviel Livay , Ilia Moskovich , Yuval Neeman
IPC分类号： H04L27/06 , H03M13/03
CPC分类号： H03M13/3905 , H03M13/2957 , H03M13/395 , H03M13/6356 , H03M13/6525 , H03M13/6558
摘要： A method for calculating backward state metrics of a trellis, the method includes: performing a radix-K calculation of backward state matrices of multiple states of at least one time instance of a trellis; and performing a radix-J calculation of backward state matrices of multiple states of at least one other time instance of the trellis; wherein K differs from J.
摘要翻译：一种用于计算网格的后向状态度量的方法，所述方法包括：对网格的至少一个时间实例的多个状态的后向状态矩阵进行基数K计算; 以及对所述网格的至少另一个时间实例的多个状态的后向状态矩阵进行基数-J计算; 其中K与J.

3. 发明申请

US20100287343A1 CONTENTION FREE PARALLEL ACCESS SYSTEM AND A METHOD FOR CONTENTION FREE PARALLEL ACCESS TO A GROUP OF MEMORY BANKS 有权
标题翻译：内容自由并行访问系统和一种可以自由并行访问一组存储库的方法
公开(公告)号：US20100287343A1
公开(公告)日：2010-11-11
申请号：US12812032
申请日：2008-01-21
申请人： Yuval Neeman , Ron Bercovich , Guy Drory , Dror Gilad , Aviel Livay , Yonatan Naor
发明人： Yuval Neeman , Ron Bercovich , Guy Drory , Dror Gilad , Aviel Livay , Yonatan Naor
IPC分类号： G06F12/06
CPC分类号： H03M13/2771 , H03M13/2714 , H03M13/2725 , H03M13/275 , H03M13/2957 , H03M13/6566
摘要： A parallel access system including: a group of processing entities that comprises N processing entities; wherein N is a positive integer that exceeds one; a group of memory banks that stores K information elements; wherein the group of memory banks comprises N pairs of single access memory banks; each pair of memory banks comprises an even memory bank and an odd memory bank; wherein each pair of memory banks stores sub-set of K/N information elements; wherein an even memory bank of each pair of memory banks stores even address information elements of a certain sub-set of K/N information elements and an odd memory bank of each pair of memory banks stores odd address information elements of the certain sub-set of K/N information elements; wherein K/N is an even positive integer; and a non-blocking interconnect coupled to the group of processing entities and to the group of memory banks; wherein during each fetch cycle each processing entity of the group of processing entities fetches a first information element from an odd memory unit of a pair of memory banks and fetches a second information element from an even memory unit of the pair of memory banks; wherein the first and second information elements are two consecutive interleaved address information elements.
摘要翻译：一种并行接入系统，包括：一组包含N个处理实体的处理实体; 其中N是超过1的正整数; 一组存储K个信息元素的记忆库; 其中所述存储体组包括N对单个存取存储体; 每对存储体组包括偶数存储体和奇数存储体; 其中每对存储器组存储K / N个信息元素的子集; 其中每对存储器组的偶数存储体存储K / N个信息元素的某个子集的偶数地址信息元素，并且每对存储器组的奇数存储体组存储该特定子集的奇数地址信息元素的K / N信息要素; 其中K / N是偶数正整数; 以及耦合到所述一组处理实体和所述存储体组的非阻塞互连; 其中在每个读取周期期间，所述处理实体组中的每个处理实体从一对存储器组的奇数存储器单元中提取第一信息元素，并从所述一对存储器组的偶数存储器单元中提取第二信息元素; 其中所述第一和第二信息元素是两个连续的交错地址信息元素。

4. 发明授权

US08627022B2 Contention free parallel access system and a method for contention free parallel access to a group of memory banks 有权
标题翻译：无争用的并行访问系统和一种无争用并行访问一组存储体的方法
公开(公告)号：US08627022B2
公开(公告)日：2014-01-07
申请号：US12812032
申请日：2008-01-21
申请人： Yuval Neeman , Ron Bercovich , Guy Drory , Dror Gilad , Aviel Livay , Yonatan Naor
发明人： Yuval Neeman , Ron Bercovich , Guy Drory , Dror Gilad , Aviel Livay , Yonatan Naor
IPC分类号： G06F12/00
CPC分类号： H03M13/2771 , H03M13/2714 , H03M13/2725 , H03M13/275 , H03M13/2957 , H03M13/6566
摘要： A parallel access system including: a group of processing entities that comprises N processing entities; wherein N is a positive integer that exceeds one; a group of memory banks that stores K information elements; wherein the group of memory banks comprises N pairs of single access memory banks; each pair of memory banks comprises an even memory bank and an odd memory bank; wherein each pair of memory banks stores sub-set of K/N information elements; wherein an even memory bank of each pair of memory banks stores even address information elements of a certain sub-set of K/N information elements and an odd memory bank of each pair of memory banks stores odd address information elements of the certain sub-set of K/N information elements; wherein K/N is an even positive integer; and a non-blocking interconnect, coupled to the group of processing entities and to the group of memory banks; wherein during each fetch cycle each processing entity of the group of processing entities fetches a first information element from an odd memory unit of a pair of memory banks and fetches a second information element from an even memory unit of the pair of memory banks; wherein the first and second information elements are two consecutive interleaved address information elements.
摘要翻译：一种并行接入系统，包括：一组包含N个处理实体的处理实体; 其中N是超过1的正整数; 一组存储K个信息元素的记忆库; 其中所述存储体组包括N对单个存取存储体; 每对存储体组包括偶数存储体和奇数存储体; 其中每对存储器组存储K / N个信息元素的子集; 其中每对存储器组的偶数存储体存储K / N个信息元素的某个子集的偶数地址信息元素，并且每对存储器组的奇数存储体组存储该特定子集的奇数地址信息元素的K / N信息要素; 其中K / N是偶数正整数; 以及耦合到所述一组处理实体和所述存储体组的非阻塞互连; 其中在每个读取周期期间，所述处理实体组中的每个处理实体从一对存储器组的奇数存储器单元中提取第一信息元素，并从所述一对存储器组的偶数存储器单元中提取第二信息元素; 其中所述第一和第二信息元素是两个连续的交错地址信息元素。

5. 发明授权

US08171384B2 Device having turbo decoding capabilities and a method for turbo decoding 有权
标题翻译：具有turbo解码能力的装置和用于turbo解码的方法
公开(公告)号：US08171384B2
公开(公告)日：2012-05-01
申请号：US12163638
申请日：2008-06-27
申请人： Guy Drory , Ron Bercovich , Yosef Kazaz , Aviel Livay , Yonatan Naor , Yuval Neeman
发明人： Guy Drory , Ron Bercovich , Yosef Kazaz , Aviel Livay , Yonatan Naor , Yuval Neeman
IPC分类号： H03M13/03
CPC分类号： H03M13/2957 , H03M13/3905
摘要： A device and a method for turbo decoding, the method includes performing multiple iterations of a turbo decoding process until a turbo decoding process is completed; wherein the performing comprises repeating the stages of: (i) initializing at least one state metric of multiple windows of a channel data block for a current iteration of the turbo decoding process by at least one corresponding state metric that was calculated during a previous iteration of the turbo decoding process; and (ii) calculating in parallel, at least forward state metrics and backward state metrics of the multiple windows, during the current iteration.
摘要翻译：一种用于turbo解码的设备和方法，所述方法包括执行turbo解码过程的多次迭代，直到turbo解码过程完成; 其中所述执行包括重复以下阶段：（i）通过在先前迭代中计算的至少一个对应状态度量来初始化turbo解码过程的当前迭代的信道数据块的多个窗口的至少一个状态度量 turbo解码过程; 以及（ii）在当前迭代期间并行地计算多个窗口的至少前向状态度量和向后状态度量。

6. 发明申请

US20090327834A1 DEVICE HAVING TURBO DECODING CAPABILITIES AND A METHOD FOR TURBO DECODING 有权
标题翻译：具有涡轮解码能力的装置和用于涡轮解码的方法
公开(公告)号：US20090327834A1
公开(公告)日：2009-12-31
申请号：US12163638
申请日：2008-06-27
申请人： Guy Drory , Ron Bercovich , Yosef Kazaz , Aviel Livay , Yonatan Naor , Yuval Neeman
发明人： Guy Drory , Ron Bercovich , Yosef Kazaz , Aviel Livay , Yonatan Naor , Yuval Neeman
IPC分类号： H03M13/05 , G06F11/07
CPC分类号： H03M13/2957 , H03M13/3905
摘要： A device and a method for turbo decoding, the method includes performing multiple iterations of a turbo decoding process until a turbo decoding process is completed; wherein the performing comprises repeating the stages of: (i) initializing at least one state metric of multiple windows of a channel data block for a current iteration of the turbo decoding process by at least one corresponding state metric that was calculated during a previous iteration of the turbo decoding process; and (ii) calculating in parallel, at least forward state metrics and backward state metrics of the multiple windows, during the current iteration.
摘要翻译：一种用于turbo解码的设备和方法，所述方法包括执行turbo解码过程的多次迭代，直到turbo解码过程完成; 其中所述执行包括重复以下阶段：（i）通过在先前迭代中计算的至少一个对应状态度量来初始化turbo解码过程的当前迭代的信道数据块的多个窗口的至少一个状态度量 turbo解码过程; 以及（ii）在当前迭代期间并行地计算多个窗口的至少前向状态度量和向后状态度量。

7. 发明申请

US20140220917A1 MULTIMODE RAKE RECEIVER, CELLULAR BASE STATION AND CELLULAR COMMUNICATION DEVICE 有权
标题翻译：多模式接收机，蜂窝基站和蜂窝通信设备
公开(公告)号：US20140220917A1
公开(公告)日：2014-08-07
申请号：US14241233
申请日：2011-10-19
申请人： Guy Drory , Eliya Babistky , Ron Bercovich
发明人： Guy Drory , Eliya Babistky , Ron Bercovich
IPC分类号： H04W92/02 , H04B1/16
CPC分类号： H04W92/02 , H04B1/005 , H04B1/06 , H04B1/16 , H04B1/7115 , H04B2201/70714
摘要： A multimode rake receiver comprise a common antenna interface, arranged to at least receive in a first mode a first CDMA radio channel carrying information encoded according to a first baseband modulation standard and to receive in a second mode a second CDMA radio channel carrying information encoded according to a second baseband modulation standard; and a common signal processing path, at least arranged to process in the first mode the first CDMA radio channel and in the second mode the second CDMA radio channel, wherein the common signal path comprises a common descrambling and de-spreading unit and a common hybrid code generating unit arranged to provide to the common descrambling and de-spreading unit chip codes applicable in the first mode to the first CDMA radio channel and in the second mode to the second CDMA radio channel.
摘要翻译：多模Rake接收机包括公共天线接口，其被布置为至少以第一模式接收携带根据第一基带调制标准编码的信息的第一CDMA无线电信道，并且以第二模式接收携带根据到第二基带调制标准; 以及公共信号处理路径，至少被布置为在第一模式中处理第一CDMA无线电信道，并且在第二模式中处理第二CDMA无线电信道，其中公共信号路径包括公共解扰和解扩单元和公共混合代码生成单元，被配置为向第一CDMA无线电信道和第二模式提供适用于第一模式的公共解扰和解扩单元码片码到第二CDMA无线电信道。

8. 发明授权

US09572199B2 Multimode rake receiver, cellular base station and cellular communication device 有权
标题翻译：多模瑞克接收机，蜂窝基站和蜂窝通信设备
公开(公告)号：US09572199B2
公开(公告)日：2017-02-14
申请号：US14241233
申请日：2011-10-19
申请人： Guy Drory , Eliya Babitsky , Ron Bercovich
发明人： Guy Drory , Eliya Babitsky , Ron Bercovich
IPC分类号： H03D5/00 , H04W92/02 , H04B1/06 , H04B1/7115 , H04B1/00 , H04B1/16
CPC分类号： H04W92/02 , H04B1/005 , H04B1/06 , H04B1/16 , H04B1/7115 , H04B2201/70714
摘要： A multimode rake receiver comprise a common antenna interface, arranged to at least receive in a first mode a first CDMA radio channel carrying information encoded according to a first baseband modulation standard and to receive in a second mode a second CDMA radio channel carrying information encoded according to a second baseband modulation standard; and a common signal processing path, at least arranged to process in the first mode the first CDMA radio channel and in the second mode the second CDMA radio channel, wherein the common signal path comprises a common descrambling and de-spreading unit and a common hybrid code generating unit arranged to provide to the common descrambling and de-spreading unit chip codes applicable in the first mode to the first CDMA radio channel and in the second mode to the second CDMA radio channel.
摘要翻译：多模Rake接收机包括公共天线接口，其被布置为至少以第一模式接收携带根据第一基带调制标准编码的信息的第一CDMA无线电信道，并且以第二模式接收携带根据到第二基带调制标准; 以及公共信号处理路径，至少被布置为在第一模式中处理第一CDMA无线电信道，并且在第二模式中处理第二CDMA无线电信道，其中公共信号路径包括公共解扰和解扩单元和公共混合代码生成单元，被配置为向第一CDMA无线电信道和第二模式提供适用于第一模式的公共解扰和解扩单元码片码到第二CDMA无线电信道。

9. 发明授权

US08139683B2 Receiver and a method for channel estimation 有权
标题翻译：接收机和信道估计方法
公开(公告)号：US08139683B2
公开(公告)日：2012-03-20
申请号：US12066227
申请日：2005-09-09
申请人： Lior Eldar , Ron Bercovich
发明人： Lior Eldar , Ron Bercovich
IPC分类号： H03K9/00
CPC分类号： H04L25/0248 , H04L5/0007 , H04L25/023 , H04L27/2647
摘要： A receiver and a method for channel estimation, the method includes calculating at least one initial channel estimate; characterized by calculating an estimate of the channel based upon a mathematical relationship between a first group of pilot subcarriers and a second group of pilot subcarriers;whereas a difference between locations of pilot subcarriers of the first group and locations of corresponding pilot subcarriers of the second group is substantially constant; and at least one of the following conditions are fulfilled: (i) pilot subcarriers that belong to the same group of subcarriers are non-evenly spaced in a frequency domain, (ii) a pilot subcarrier of the first group and a corresponding pilot subcarrier of the second group are proximate to each other in the frequency domain.
摘要翻译：一种用于信道估计的接收机和方法，所述方法包括：计算至少一个初始信道估计; 其特征在于基于第一组导频子载波和第二组导频子载波之间的数学关系来计算信道的估计; 而第一组的导频子载波的位置和第二组的对应的导频子载波的位置之间的差异基本上是恒定的; 并且满足以下条件中的至少一个：（i）属于相同子载波组的导频子载波在频域中不均匀地间隔，（ii）第一组的导频副载波和对应的导频副载波第二组在频域中彼此接近。

10. 发明授权

US08020067B2 Apparatus and method for detecting an end point of an information frame 有权
标题翻译：用于检测信息帧的终点的装置和方法
公开(公告)号：US08020067B2
公开(公告)日：2011-09-13
申请号：US11721651
申请日：2004-12-13
申请人： Dov Levenglick , Ron Bercovich , Eliezer Zand
发明人： Dov Levenglick , Ron Bercovich , Eliezer Zand
IPC分类号： H03M13/00
CPC分类号： H04L1/0054 , H04L1/0051 , H04L1/0061
摘要： A method for locating an end of a received frame includes providing hypothetical trellis paths that end at different possible end points, performing a CRC check for each hypothetical trellis path, calculating a false detection variable for hypothetical trellis paths that passed the CRC check, and determining the end point of the received frame in response to the calculations.
摘要翻译：用于定位接收帧的结束的方法包括提供在不同可能端点处结束的假设网格路径，对每个假设网格路径执行CRC校验，计算通过CRC校验的假设网格路径的错误检测变量，以及确定响应于计算的接收帧的终点。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式