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1. 发明申请

US20100221920A1 SPACER PROCESS FOR ON PITCH CONTACTS AND RELATED STRUCTURES 有权
标题翻译：用于触点接触和相关结构的间隔工艺
公开(公告)号：US20100221920A1
公开(公告)日：2010-09-02
申请号：US12781681
申请日：2010-05-17
申请人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
发明人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
IPC分类号： H01L21/311
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L23/528 , H01L2924/0002 , Y10S438/942 , H01L2924/00
摘要： Methods are disclosed, such as those involving increasing the density of isolated features in an integrated circuit. Also disclosed are structures associated with the methods. In one or more embodiments, contacts are formed on pitch with other structures, such as conductive interconnects. The interconnects may be formed by pitch multiplication. To form the contacts, in some embodiments, a pattern corresponding to some of the contacts is formed in a selectively definable material such as photoresist. The features in the selectively definable material are trimmed to desired dimensions. Spacer material is blanket deposited over the features in the selectively definable material and the deposited material is then etched to leave spacers on sides of the features. The selectively definable material is removed to leave a mask defined by the spacer material. The pattern defined by the spacer material may be transferred to a substrate, to form on pitch contacts. In some embodiments, the on pitch contacts may be used to electrically contact conductive interconnects in the substrate.
摘要翻译：公开了诸如涉及增加集成电路中的隔离特征的密度的方法。还公开了与该方法相关联的结构。在一个或多个实施例中，触头在其它结构（例如导电互连）的间距上形成。互连可以由间距倍增形成。为了形成触点，在一些实施例中，对应于一些触点的图案形成在诸如光致抗蚀剂的可选择定义的材料中。可选择定义的材料中的特征被修剪到期望的尺寸。间隔材料被毯子沉积在可选择定义的材料中的特征上，然后蚀刻沉积的材料以在特征的侧面留下间隔物。去除可选择定义的材料以留下由间隔物材料限定的掩模。由间隔物材料限定的图案可以转移到基底上，以形成间距接触。在一些实施例中，上电触点可用于电接触衬底中的导电互连。

2. 发明授权

US08772166B2 Spacer process for on pitch contacts and related structures 有权
标题翻译：间距接触和相关结构的间隔过程
公开(公告)号：US08772166B2
公开(公告)日：2014-07-08
申请号：US13526792
申请日：2012-06-19
申请人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
发明人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
IPC分类号： H01L21/311
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L23/528 , H01L2924/0002 , Y10S438/942 , H01L2924/00
摘要： Methods are disclosed, including for increasing the density of isolated features in an integrated circuit. Also disclosed are associated structures. In some embodiments, contacts are formed on pitch with other structures, such as conductive interconnects that may be formed by pitch multiplication. To form the contacts, in some embodiments, a pattern corresponding to some of the contacts is formed in a selectively definable material such as photoresist. Features in the selectively definable material are trimmed, and spacer material is blanket deposited over the features and the deposited material is then etched to leave spacers on sides of the features. The selectively definable material is removed, leaving a mask defined by the spacer material. The pattern defined by the spacer material may be transferred to a substrate, to form on pitch contacts. In some embodiments, the on pitch contacts may be used to electrically contact conductive interconnects in the substrate.
摘要翻译：公开了包括用于增加集成电路中的隔离特征的密度的方法。还公开了相关联的结构。在一些实施例中，触点是与其他结构形成的，例如可以由间距倍增形成的导电互连。为了形成触点，在一些实施例中，对应于一些触点的图案形成在诸如光致抗蚀剂的可选择定义的材料中。在可选择定义的材料中的特征被修整，并且间隔物材料被毯子沉积在特征上，然后蚀刻沉积的材料以在特征的侧面留下间隔物。去除可选择定义的材料，留下由间隔物材料限定的掩模。由间隔物材料限定的图案可以转移到基底上，以形成间距接触。在一些实施例中，上电触点可用于电接触衬底中的导电互连。

3. 发明授权

US08211803B2 Spacer process for on pitch contacts and related structures 有权
标题翻译：间距接触和相关结构的间隔过程
公开(公告)号：US08211803B2
公开(公告)日：2012-07-03
申请号：US12781681
申请日：2010-05-17
申请人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
发明人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
IPC分类号： H01L21/311
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L23/528 , H01L2924/0002 , Y10S438/942 , H01L2924/00
摘要： Methods are disclosed, such as those involving increasing the density of isolated features in an integrated circuit. Also disclosed are structures associated with the methods. In one or more embodiments, contacts are formed on pitch with other structures, such as conductive interconnects. The interconnects may be formed by pitch multiplication. To form the contacts, in some embodiments, a pattern corresponding to some of the contacts is formed in a selectively definable material such as photoresist. The features in the selectively definable material are trimmed to desired dimensions. Spacer material is blanket deposited over the features in the selectively definable material and the deposited material is then etched to leave spacers on sides of the features. The selectively definable material is removed to leave a mask defined by the spacer material. The pattern defined by the spacer material may be transferred to a substrate, to form on pitch contacts. In some embodiments, the on pitch contacts may be used to electrically contact conductive interconnects in the substrate.
摘要翻译：公开了诸如涉及增加集成电路中的隔离特征的密度的方法。还公开了与该方法相关联的结构。在一个或多个实施例中，触头在其它结构（例如导电互连）的间距上形成。互连可以由间距倍增形成。为了形成触点，在一些实施例中，对应于一些触点的图案形成在诸如光致抗蚀剂的可选择定义的材料中。可选择定义的材料中的特征被修剪到期望的尺寸。间隔材料被毯子沉积在可选择定义的材料中的特征上，然后蚀刻沉积的材料以在特征的侧面留下间隔物。去除可选择定义的材料以留下由间隔物材料限定的掩模。由间隔物材料限定的图案可以转移到基底上，以形成间距接触。在一些实施例中，上电触点可用于电接触衬底中的导电互连。

4. 发明申请

US20090115064A1 SPACER PROCESS FOR ON PITCH CONTACTS AND RELATED STRUCTURES 有权
标题翻译：用于触点接触和相关结构的间隔工艺
公开(公告)号：US20090115064A1
公开(公告)日：2009-05-07
申请号：US11933664
申请日：2007-11-01
申请人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
发明人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
IPC分类号： H01L23/52 , H01L21/311
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L23/528 , H01L2924/0002 , Y10S438/942 , H01L2924/00
摘要： Methods are disclosed, such as those involving increasing the density of isolated features in an integrated circuit. Also disclosed are structures associated with the methods. In one or more embodiments, contacts are formed on pitch with other structures, such as conductive interconnects. The interconnects may be formed by pitch multiplication. To form the contacts, in some embodiments, a pattern corresponding to some of the contacts is formed in a selectively definable material such as photoresist. The features in the selectively definable material are trimmed to desired dimensions. Spacer material is blanket deposited over the features in the selectively definable material and the deposited material is then etched to leave spacers on sides of the features. The selectively definable material is removed to leave a mask defined by the spacer material. The pattern defined by the spacer material may be transferred to a substrate, to form on pitch contacts. In some embodiments, the on pitch contacts may be used to electrically contact conductive interconnects in the substrate.
摘要翻译：公开了诸如涉及增加集成电路中的隔离特征的密度的方法。还公开了与该方法相关联的结构。在一个或多个实施例中，触头在其它结构（例如导电互连）的间距上形成。互连可以由间距倍增形成。为了形成触点，在一些实施例中，对应于一些触点的图案形成在诸如光致抗蚀剂的可选择定义的材料中。可选择定义的材料中的特征被修剪到期望的尺寸。间隔材料被毯子沉积在可选择定义的材料中的特征上，然后蚀刻沉积的材料以在特征的侧面留下间隔物。去除可选择定义的材料以留下由间隔物材料限定的掩模。由间隔物材料限定的图案可以转移到基底上，以形成间距接触。在一些实施例中，上电触点可用于电接触衬底中的导电互连。

5. 发明申请

US20120258599A1 SPACER PROCESS FOR ON PITCH CONTACTS AND RELATED STRUCTURES 有权
标题翻译：用于触点接触和相关结构的间隔工艺
公开(公告)号：US20120258599A1
公开(公告)日：2012-10-11
申请号：US13526792
申请日：2012-06-19
申请人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
发明人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
IPC分类号： H01L21/311
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L23/528 , H01L2924/0002 , Y10S438/942 , H01L2924/00
摘要： Methods are disclosed, including for increasing the density of isolated features in an integrated circuit. Also disclosed are associated structures. In some embodiments, contacts are formed on pitch with other structures, such as conductive interconnects that may be formed by pitch multiplication. To form the contacts, in some embodiments, a pattern corresponding to some of the contacts is formed in a selectively definable material such as photoresist. Features in the selectively definable material are trimmed, and spacer material is blanket deposited over the features and the deposited material is then etched to leave spacers on sides of the features. The selectively definable material is removed, leaving a mask defined by the spacer material. The pattern defined by the spacer material may be transferred to a substrate, to form on pitch contacts. In some embodiments, the on pitch contacts may be used to electrically contact conductive interconnects in the substrate.
摘要翻译：公开了包括用于增加集成电路中的隔离特征的密度的方法。还公开了相关联的结构。在一些实施例中，触点是与其他结构形成的，例如可以由间距倍增形成的导电互连。为了形成触点，在一些实施例中，对应于一些触点的图案形成在诸如光致抗蚀剂的可选择定义的材料中。在可选择定义的材料中的特征被修整，并且间隔物材料被毯子沉积在特征上，然后蚀刻沉积的材料以在特征的侧面留下间隔物。去除可选择定义的材料，留下由间隔物材料限定的掩模。由间隔物材料限定的图案可以转移到基底上，以形成间距接触。在一些实施例中，上电触点可用于电接触衬底中的导电互连。

6. 发明授权

US07737039B2 Spacer process for on pitch contacts and related structures 有权
标题翻译：间距接触和相关结构的间隔过程
公开(公告)号：US07737039B2
公开(公告)日：2010-06-15
申请号：US11933664
申请日：2007-11-01
申请人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
发明人： Gurtej Sandhu , Mark Kiehlbauch , Steve Kramer , John Smythe
IPC分类号： H01L21/311
CPC分类号： H01L21/76816 , H01L21/0337 , H01L21/0338 , H01L23/528 , H01L2924/0002 , Y10S438/942 , H01L2924/00
摘要： Methods are disclosed, such as those involving increasing the density of isolated features in an integrated circuit. Also disclosed are structures associated with the methods. In one or more embodiments, contacts are formed on pitch with other structures, such as conductive interconnects. The interconnects may be formed by pitch multiplication. To form the contacts, in some embodiments, a pattern corresponding to some of the contacts is formed in a selectively definable material such as photoresist. The features in the selectively definable material are trimmed to desired dimensions. Spacer material is blanket deposited over the features in the selectively definable material and the deposited material is then etched to leave spacers on sides of the features. The selectively definable material is removed to leave a mask defined by the spacer material. The pattern defined by the spacer material may be transferred to a substrate, to form on pitch contacts. In some embodiments, the on pitch contacts may be used to electrically contact conductive interconnects in the substrate.
摘要翻译：公开了诸如涉及增加集成电路中的隔离特征的密度的方法。还公开了与该方法相关联的结构。在一个或多个实施例中，触头在其它结构（例如导电互连）的间距上形成。互连可以由间距倍增形成。为了形成触点，在一些实施例中，对应于一些触点的图案形成在诸如光致抗蚀剂的可选择定义的材料中。可选择定义的材料中的特征被修剪到期望的尺寸。间隔材料被毯子沉积在可选择定义的材料中的特征上，然后蚀刻沉积的材料以在特征的侧面留下间隔物。去除可选择定义的材料以留下由间隔物材料限定的掩模。由间隔物材料限定的图案可以转移到基底上，以形成间距接触。在一些实施例中，上电触点可用于电接触衬底中的导电互连。

7. 发明申请

US20100080048A1 STT-MRAM CELL STRUCTURE INCORPORATING PIEZOELECTRIC STRESS MATERIAL 有权
标题翻译： STT-MRAM结构与压电应力材料
公开(公告)号：US20100080048A1
公开(公告)日：2010-04-01
申请号：US12242247
申请日：2008-09-30
申请人： Jun Liu , Steve Kramer , Gurtej Sandhu
发明人： Jun Liu , Steve Kramer , Gurtej Sandhu
IPC分类号： G11C11/02
CPC分类号： G11C11/161 , G11C11/16 , G11C11/1675 , H01L27/228 , H01L43/08
摘要： A magnetic memory cell including a piezoelectric material, and methods of operating the memory cell are provided. The memory cell includes a stack, and the piezoelectric material may be formed as a layer in the stack or adjacent the layers of the cell stack. The piezoelectric material may be used to induce a transient stress during programming of the memory cell to reduce the critical switching current of the memory cell.
摘要翻译：提供了包括压电材料的磁存储单元和操作存储单元的方法。存储单元包括堆叠，并且压电材料可以形成为堆叠中的层或邻近电池堆的层。压电材料可以用于在编程存储器单元期间引起瞬态应力以减小存储器单元的关键开关电流。

8. 发明授权

US08845812B2 Method for contamination removal using magnetic particles 有权
标题翻译：使用磁性颗粒去除污染物的方法
公开(公告)号：US08845812B2
公开(公告)日：2014-09-30
申请号：US12483518
申请日：2009-06-12
申请人： Nishant Sinha , Steve Kramer , Gurtej Sandhu
发明人： Nishant Sinha , Steve Kramer , Gurtej Sandhu
IPC分类号： B08B7/00
CPC分类号： H01L21/6704 , B03C1/01 , B03C2201/16 , B03C2201/20 , B08B3/10 , C11D3/1206 , C11D3/1213 , C11D7/20 , C11D17/0013 , H01L21/67028
摘要： Methods and apparatus are provided for cleaning a substrate (e.g., wafer) in the fabrication of semiconductor devices utilizing a composition of magnetic particles dispersed within a base fluid to remove contaminants from a surface of the substrate.
摘要翻译：提供的方法和装置用于在半导体器件的制造中清洗衬底（例如，晶片），该半导体器件利用分散在基础流体内的磁性颗粒的组合物从衬底的表面去除污染物。

9. 发明授权

US08310861B2 STT-MRAM cell structure incorporating piezoelectric stress material 有权
标题翻译： STT-MRAM电池结构结合压电应力材料
公开(公告)号：US08310861B2
公开(公告)日：2012-11-13
申请号：US12242247
申请日：2008-09-30
申请人： Jun Liu , Steve Kramer , Gurtej Sandhu
发明人： Jun Liu , Steve Kramer , Gurtej Sandhu
IPC分类号： G11C11/00
CPC分类号： G11C11/161 , G11C11/16 , G11C11/1675 , H01L27/228 , H01L43/08
摘要： A magnetic memory cell including a piezoelectric material, and methods of operating the memory cell are provided. The memory cell includes a stack, and the piezoelectric material may be formed as a layer in the stack or adjacent the layers of the cell stack. The piezoelectric material may be used to induce a transient stress during programming of the memory cell to reduce the critical switching current of the memory cell.
摘要翻译：提供了包括压电材料的磁存储单元和操作存储单元的方法。存储单元包括堆叠，并且压电材料可以形成为堆叠中的层或邻近电池堆的层。压电材料可以用于在编程存储器单元期间引起瞬态应力以减小存储器单元的关键开关电流。

10. 发明申请

US20100313907A1 Method and Apparatus for Contamination Removal Using Magnetic Particles 有权
标题翻译：使用磁性颗粒去除污染的方法和设备
公开(公告)号：US20100313907A1
公开(公告)日：2010-12-16
申请号：US12483518
申请日：2009-06-12
申请人： Nishant Sinha , Steve Kramer , Gurtej Sandhu
发明人： Nishant Sinha , Steve Kramer , Gurtej Sandhu
IPC分类号： B08B3/10 , B08B7/00
CPC分类号： H01L21/6704 , B03C1/01 , B03C2201/16 , B03C2201/20 , B08B3/10 , C11D3/1206 , C11D3/1213 , C11D7/20 , C11D17/0013 , H01L21/67028
摘要： Methods and apparatus are provided for cleaning a substrate (e.g., wafer) in the fabrication of semiconductor devices utilizing a composition of magnetic particles dispersed within a base fluid to remove contaminants from the surface of the substrate.
摘要翻译：提供了用于在半导体器件的制造中清洗衬底（例如，晶片）的方法和装置，其利用分散在基础流体内的磁性颗粒的组成以从衬底的表面去除污染物。

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