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    • 2. 发明授权
    • Circuit board features with reduced parasitic capacitance and method
therefor
    • 电路板具有降低的寄生电容及其方法
    • US6103134A
    • 2000-08-15
    • US224011
    • 1998-12-31
    • Gregory J. DunnLarry LachJovica SavicAllyson BeuhlerEverett Simons
    • Gregory J. DunnLarry LachJovica SavicAllyson BeuhlerEverett Simons
    • H01F17/00H01F41/04H01L21/768H01L23/522H05K1/16H05K3/00H05K3/06H05K3/46
    • H05K3/0082H01F41/041H01F41/046H05K1/165H05K3/0023H01F17/0013H05K2201/0187H05K2201/0355H05K2201/086H05K2201/09236H05K2203/0551H05K3/4652
    • A method for fabricating circuit board conductors with desirable processing and reduced self and mutual capacitance. The method generally entails forming a metal layer on a positive-acting photodielectric layer formed on a substrate, and then etching the metal layer to form at least two conductor traces that cover two separate regions of the photodielectric layer while exposing a third region of the photodielectric layer between the two regions. The third region of the photodielectric layer is then irradiated and developed using the two traces as a photomask, so that the third region of the photodielectric layer is removed. The two remaining regions of the photodielectric layer masked by the traces remain on the substrate and are separated by an opening formed by the removal of the third dielectric region. As a result, the traces are not only separated by a void immediately therebetween formed when the metal layer was etched, but are also separated by the opening formed in the photodielectric layer by the removal of the third region of the photodielectric layer. Traces formed in accordance with the above may be formed as adjacent and parallel conductors or adjacent inductor windings of an integral inductor.
    • 一种用于制造具有所需加工和减小的自相互电容的电路板导体的方法。 该方法通常需要在形成在衬底上的正性作用的光致电介质层上形成金属层,然后蚀刻金属层以形成覆盖光致介电层的两个分离区域的至少两个导体迹线,同时暴露光致介电层的第三区域 两个地区之间。 然后使用两条迹线作为光掩模来照射和显影光致电介质层的第三区域,从而去除光致电介质层的第三区域。 由迹线掩蔽的光电介质层的两个剩余区域保留在基板上,并由通过去除第三介电区域形成的开口分开。 结果,痕迹不仅仅在金属层被蚀刻时形成的空隙之间分开,而且还通过去除光致电介质层的第三区域而被形成在光致电介质层中的开口分开。 根据上述形成的迹线可以形成为整体电感器的相邻和平行的导体或相邻的电感器绕组。
    • 3. 发明授权
    • Method for manufacturing an integral thin-film metal resistor
    • 制造整体薄膜金属电阻的方法
    • US06232042B1
    • 2001-05-15
    • US09111189
    • 1998-07-07
    • Gregory J. DunnJovica SavicAllyson Beuhler
    • Gregory J. DunnJovica SavicAllyson Beuhler
    • G03F700
    • H05K1/167G03F7/00H01C17/07H05K3/0023H05K3/025H05K3/048H05K3/386H05K2201/0317H05K2201/09881H05K2203/0152H05K2203/1461
    • A method for manufacturing a microelectronic assembly to have a resistor, and particularly a metal resistive film, with desirable processing and dimensional characteristics. The method generally entails applying a photosensitive dielectric to a substrate to form a dielectric layer. The dielectric layer is photoimaged to polymerize a first portion of the dielectric layer on a first region of the substrate, leaving the remainder of the dielectric layer unpolymerized. An electrically resistive film is then applied to the dielectric layer, and the dielectric layer is developed to remove concurrently the unpolymerized portion thereof and the portion of the resistive film overlying the unpolymerized portion, so that a portion of the resistive film remains over the second portion to form the resistor. An alternative process order is to apply the resistive film prior to exposing the dielectric layer to radiation, and then exposing the dielectric layer through the resistive film. The resistive film is preferably a multilayer film that includes an electrically resistive layer, such as NiP, NiCr or another nickel-containing alloy, and a sacrificial backing such as a layer of copper.
    • 一种用于制造具有所需加工和尺寸特性的电阻器,特别是金属电阻膜的微电子组件的方法。 该方法通常需要将光敏电介质施加到衬底以形成电介质层。 介电层被光刻以在基板的第一区域上聚合电介质层的第一部分,留下介电层的其余部分未聚合。 然后将电阻膜施加到电介质层,并且电介质层被显影以同时除去其未聚合部分和覆盖未聚合部分的电阻膜的部分,使得电阻膜的一部分保留在第二部分上 以形成电阻器。 替代的处理顺序是在将电介质层暴露于辐射之前施加电阻膜,然后将电介质层暴露于电阻膜。 电阻膜优选为包含电阻层的多层膜,例如NiP,NiCr或其它含镍合金,以及牺牲衬底,例如铜层。
    • 5. 发明授权
    • Flexural plate wave systems
    • 弯曲板波系统
    • US06777727B2
    • 2004-08-17
    • US10304429
    • 2002-11-26
    • Gregory J. DunnAllyson BeuhlerDavid Penunuri
    • Gregory J. DunnAllyson BeuhlerDavid Penunuri
    • H01L2980
    • G01N29/245G01N29/022G01N29/222G01N2291/0256G01N2291/0427H01L27/20
    • An exemplary system and method for providing an acoustic plate wave apparatus is disclosed as comprising inter alia: a monocrystalline silicon substrate (200); an amorphous oxide material (220); a monocrystalline perovskite oxide material (230); a monocrystalline piezoelectric material (240); and a flexural plate wave component (250, 270) having an input interdigitated transducer (270), an output interdigitated transducer (250) and an optional support layer (260). Deposition or removal of material on or from an absorptive thin film sensor surface (210), or changes in the mechanical properties of the thin film (210) in contact with various chemical species, or changes in the electrical characteristics of a solvent solution exposed to the thin film (210) generally operate to produce measurable perturbations in the vector quantities (e.g., velocity, etc.) and scalar quantities (e.g., attenuation, etc.) of the acoustic plate modes.
    • 公开了一种用于提供声板波装置的示例性系统和方法,其包括:单晶硅衬底(200); 无定形氧化物材料(220); 单晶钙钛矿氧化物材料(230); 单晶压电材料(240); 以及具有输入交叉换能器(270)的弯曲板波分量(250,270),输出叉指换能器(250)和可选支撑层(260)。 在吸收薄膜传感器表面(210)上或从吸收薄膜传感器表面(210)上沉积或去除材料,或与各种化学物质接触的薄膜(210)的机械性能的变化,或暴露于 薄膜(210)通常用于在声板模式的矢量(例如,速度等)和标量(例如,衰减等)中产生可测量的扰动。