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1. 发明申请

US20060104031A1 FLUIDIC COOLING SYSTEMS AND METHODS FOR ELECTRONIC COMPONENTS 有权
标题翻译：流体冷却系统和电子元件的方法
公开(公告)号：US20060104031A1
公开(公告)日：2006-05-18
申请号：US10904555
申请日：2004-11-16
申请人： Evan Colgan , Frank Pompeo , Glenn Daves , Hilton Toy , Bruce Furman , David Edwards , Michael Gaynes , Mukta Farooq , Sung Kang , Steven Ostrander , Jaimal Williamson , Da-Yuan Shih , Donald Henderson
发明人： Evan Colgan , Frank Pompeo , Glenn Daves , Hilton Toy , Bruce Furman , David Edwards , Michael Gaynes , Mukta Farooq , Sung Kang , Steven Ostrander , Jaimal Williamson , Da-Yuan Shih , Donald Henderson
IPC分类号： H05K7/20
CPC分类号： H01L23/4735 , H01L2224/16 , H01L2224/32225 , H01L2224/73204 , H01L2924/00011 , H01L2924/00014 , H01L2924/15311 , H01L2224/0401
摘要： A cooling system for an electronic component on a component carrier is provided. The system includes a frame, a spray manifold, and a sealing member. The frame has an opening and is connectable to the component carrier so that an annular area is defined between the opening and the electronic component. The spray manifold is sealed over the opening to define a spray area over a back surface of the electronic component. The spray manifold sprays a cooling fluid on the back surface. The sealing member seals the annular region so that input/output connectors on the component carrier are isolated from the cooling fluid.
摘要翻译：提供了一种用于组件载体上的电子部件的冷却系统。该系统包括框架，喷雾歧管和密封构件。框架具有开口并且可连接到部件载体，使得在开口和电子部件之间限定环形区域。喷雾歧管被密封在开口上以限定电子部件的后表面上方的喷射区域。喷雾歧管在后表面喷洒冷却液。密封构件密封环形区域，使得部件载体上的输入/输出连接器与冷却流体隔离。

2. 发明申请

US20060060636A1 SOLDER INTERCONNECTION ARRAY WITH OPTIMAL MECHANICAL INTEGRITY 失效
标题翻译：焊接互连阵列具有最佳的机械完整性
公开(公告)号：US20060060636A1
公开(公告)日：2006-03-23
申请号：US10711501
申请日：2004-09-22
申请人： Glenn Daves , David Edwards , Mukta Farooq , Frank Pompeo
发明人： Glenn Daves , David Edwards , Mukta Farooq , Frank Pompeo
IPC分类号： B23K31/02
CPC分类号： B23K3/0638 , B23K2101/40 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01322 , H01L2924/15311 , H05K3/301 , H05K3/303 , H05K3/305 , H05K2201/0209 , H05K2201/09909 , H05K2201/10234 , H05K2201/10734 , H05K2201/10977 , H05K2201/2018 , H05K2201/2036 , Y02P70/613 , Y10T29/49144 , H01L2924/00012 , H01L2924/00 , H01L2224/0401
摘要： A method for assembling, and the resultant electronic module, includes attaching a chip to a substrate using a first solder interconnection array, and attaching a board to the substrate using a second solder interconnection array, which may be a single-melt or a dual-melt solder array. The second solder interconnection array resides entirely within a space defined between the board and substrate. A creep resistant structure is provided within this space for maintaining the defined space and optimizing integrity of the second solder interconnection array. The creep resistant structure may include an underfill material, balls, brackets, frames, collars or combinations thereof. Wherein the creep resistant structure is an underfill material, it is crucial that the substrate be attached to the board before either entirely encapsulating the second interconnection array with underfill material, or partially encapsulating the second solder interconnection array at discrete locations with underfill material.
摘要翻译：一种用于组装的方法，并且所得到的电子模块包括使用第一焊料互连阵列将芯片附接到衬底，并且使用第二焊料互连阵列将衬底附接到衬底，第二焊料互连阵列可以是单熔体或双 - 熔融焊料阵列。第二焊料互连阵列完全位于限定在板和衬底之间的空间内。在该空间内设有抗蠕变结构，用于维持限定的空间并优化第二焊料互连阵列的完整性。抗蠕变结构可以包括底部填充材料，球，支架，框架，套环或其组合。其中抗蠕变结构是底部填充材料，在将基板完全用底部填充材料完全封装第二互连阵列之前，或者在具有底部填充材料的不连续位置部分地封装第二焊料互连阵列之前，衬底附着到板上是至关重要的。

3. 发明申请

US20080000988A1 METHOD AND STRUCTURE FOR IMPLEMENTING SECURE MULTICHIP MODULES FOR ENCRYPTION APPLICATIONS 失效
标题翻译：实施加密应用的安全多模块模块的方法与结构
公开(公告)号：US20080000988A1
公开(公告)日：2008-01-03
申请号：US11768312
申请日：2007-06-26
申请人： Mukta Farooq , Benjamin Fasano , Jason Frankel , Harvey Hamel , Suresh Kadakia , David Long , Frank Pompeo , Sudipta Ray
发明人： Mukta Farooq , Benjamin Fasano , Jason Frankel , Harvey Hamel , Suresh Kadakia , David Long , Frank Pompeo , Sudipta Ray
IPC分类号： G06K19/06
CPC分类号： G06K19/07381 , H01L23/04 , H01L23/055 , H01L23/10 , H01L23/576 , H01L25/0655 , H01L2224/16225 , H01L2224/16227 , H01L2924/01079 , H01L2924/09701 , H01L2924/15192 , H01L2924/3011 , H05K1/0275 , H05K1/0306 , H05K1/144 , H05K2201/09263 , H05K2201/10151
摘要： A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier, one or more integrated circuit chips attached to the chip carrier, and a cap structure attached to the chip carrier, covering the one or more integrated circuit chips. A conductive grid structure is formed in the chip carrier and cap structure, the conductive structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction. The conductive grid structure is configured so as to detect an attempt to penetrate the IC module.
摘要翻译：防干扰集成电路（IC）模块包括陶瓷芯片载体，附接到芯片载体的一个或多个集成电路芯片，以及附接到芯片载体的覆盖一个或多个集成电路芯片的盖结构。在芯片载体和盖结构中形成导电栅格结构，该导电结构具有沿x方向，y方向和z方向设置的多条曲折线。导电栅格结构被配置为检测穿透IC模块的尝试。

4. 发明申请

US20050071993A1 Ball grid array rework using a continuous belt furnace 有权
标题翻译：使用连续带式炉的球栅阵列返修
公开(公告)号：US20050071993A1
公开(公告)日：2005-04-07
申请号：US10680622
申请日：2003-10-07
申请人： Mukta Farooq , Ray Jackson , David Linnell , Frank Pompeo
发明人： Mukta Farooq , Ray Jackson , David Linnell , Frank Pompeo
IPC分类号： B23Q15/00 , H01L21/00 , H01L21/60 , H05K13/04
CPC分类号： H01L21/67092 , H01L24/81 , H01L2224/81801 , H01L2924/01322 , H01L2924/14 , H05K13/0486 , Y10T29/49144 , Y10T29/49755 , Y10T29/49757 , Y10T29/53091 , Y10T29/53261 , Y10T29/53274 , Y10T29/53404 , H01L2924/00
摘要： Disclosed is an apparatus for separating interconnects between, for example, a card and a substrate. The apparatus includes one or more rotationally biased (e.g., spring-loaded, etc.) partial-circle structures (e.g., blades, squeegee, plow, etc.) and one or more temperature-sensitive releases connected to the partial-circle structures. The partial-circle structures are positioned to rotate and separate the interconnects when released by the temperature-sensitive releases. The invention can also include solder reservoirs positioned to receive solder from the interconnects separated by the partial-circle structures.
摘要翻译：公开了一种用于分离例如卡和基板之间的互连的装置。该装置包括一个或多个旋转偏置（例如，弹簧加载等）部分圆形结构（例如，叶片，刮板，犁等）和连接到部分圆形结构的一个或多个温度敏感的释放。当由温度敏感的释放释放时，部分圆形结构被定位成旋转和分离互连。本发明还可以包括定位成从由部分圆形结构分开的互连件接收焊料的焊料储存器。

5. 发明申请

US20060231633A1 METHOD AND STRUCTURE FOR IMPLEMENTING SECURE MULTICHIP MODULES FOR ENCRYPTION APPLICATIONS 失效
标题翻译：实施加密应用的安全多模块模块的方法与结构
公开(公告)号：US20060231633A1
公开(公告)日：2006-10-19
申请号：US10907761
申请日：2005-04-14
申请人： Mukta Farooq , Benjamin Fasano , Jason Frankel , Harvey Hamel , Suresh Kadakia , David Long , Frank Pompeo , Sudipta Ray
发明人： Mukta Farooq , Benjamin Fasano , Jason Frankel , Harvey Hamel , Suresh Kadakia , David Long , Frank Pompeo , Sudipta Ray
IPC分类号： G06K19/06
CPC分类号： G06K19/07381 , H01L23/04 , H01L23/055 , H01L23/10 , H01L23/576 , H01L25/0655 , H01L2224/16225 , H01L2224/16227 , H01L2924/01079 , H01L2924/09701 , H01L2924/15192 , H01L2924/3011 , H05K1/0275 , H05K1/0306 , H05K1/144 , H05K2201/09263 , H05K2201/10151
摘要： A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier, one or more integrated circuit chips attached to the chip carrier, and a cap structure attached to the chip carrier, covering the one or more integrated circuit chips. A conductive grid structure is formed in the chip carrier and cap structure, the conductive structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction. The conductive grid structure is configured so as to detect an attempt to penetrate the IC module.
摘要翻译：防干扰集成电路（IC）模块包括陶瓷芯片载体，附接到芯片载体的一个或多个集成电路芯片，以及附接到芯片载体的覆盖一个或多个集成电路芯片的盖结构。在芯片载体和盖结构中形成导电栅格结构，该导电结构具有沿x方向，y方向和z方向设置的多条曲折线。导电栅格结构被配置为检测穿透IC模块的尝试。

6. 发明申请

US20070271775A1 BALL GRID ARRAY REWORK USING A CONTINUOUS BELT FURNACE 有权
标题翻译：使用连续皮带炉的球网阵列
公开(公告)号：US20070271775A1
公开(公告)日：2007-11-29
申请号：US11838946
申请日：2007-08-15
申请人： Mukta Farooq , Ray Jackson , David Linnell , Frank Pompeo
发明人： Mukta Farooq , Ray Jackson , David Linnell , Frank Pompeo
IPC分类号： B23P19/00
CPC分类号： H01L21/67092 , H01L24/81 , H01L2224/81801 , H01L2924/01322 , H01L2924/14 , H05K13/0486 , Y10T29/49144 , Y10T29/49755 , Y10T29/49757 , Y10T29/53091 , Y10T29/53261 , Y10T29/53274 , Y10T29/53404 , H01L2924/00
摘要： Disclosed is an apparatus for separating interconnects between, for example, a card and a substrate. The apparatus includes one or more rotationally biased (e.g., spring-loaded, etc.) partial-circle structures (e.g., blades, squeegee, plow, etc.) and one or more temperature-sensitive releases connected to the partial-circle structures. The partial-circle structures are positioned to rotate and separate the interconnects when released by the temperature-sensitive releases. The invention can also include solder reservoirs positioned to receive solder from the interconnects separated by the partial-circle structures.
摘要翻译：公开了一种用于分离例如卡和基板之间的互连的装置。该装置包括一个或多个旋转偏置（例如，弹簧加载等）部分圆形结构（例如，叶片，刮板，犁等）和连接到部分圆形结构的一个或多个温度敏感的释放。当由温度敏感的释放释放时，部分圆形结构被定位成旋转和分离互连。本发明还可以包括定位成从由部分圆形结构分开的互连件接收焊料的焊料储存器。

7. 发明申请

US20070084629A1 LOW STRESS CONDUCTIVE POLYMER BUMP 有权
标题翻译：低应力导电聚合物BUMP
公开(公告)号：US20070084629A1
公开(公告)日：2007-04-19
申请号：US11538823
申请日：2006-10-05
申请人： William Bernier , Marie Cole , Mukta Farooq , John Knickerbocker , Tasha Lopez , Roger Quon , David Welsh
发明人： William Bernier , Marie Cole , Mukta Farooq , John Knickerbocker , Tasha Lopez , Roger Quon , David Welsh
IPC分类号： H05K1/16
CPC分类号： H05K3/321 , H01L24/05 , H01L24/12 , H01L24/16 , H01L24/29 , H01L24/83 , H01L2224/0401 , H01L2224/05557 , H01L2224/13076 , H01L2224/13078 , H01L2224/1308 , H01L2224/131 , H01L2224/1319 , H01L2224/1329 , H01L2224/133 , H01L2224/13339 , H01L2224/13464 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/838 , H01L2924/00013 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/09701 , H01L2924/14 , H01L2924/15787 , H01L2924/15788 , H01L2924/1579 , H05K2201/0212 , H05K2201/0248 , H05K2201/0373 , H05K2201/1025 , H01L2924/00014 , H01L2224/13099 , H01L2924/00 , H01L2924/01026 , H01L2924/00015 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299
摘要： Disclosed is a laminated (or non-laminated) conductive interconnection for joining an integrated circuit device to a device carrier, where the conductive interconnection comprises alternating metal layers and polymer layers. In addition, the polymer can include dendrites, metal projections from the carrier or device, and/or micelle brushes on the outer portion of the polymer. The polymer layers include metal particles and the alternating metal layers and polymer layers form either a cube-shaped structure or a cylinder-shaped structure.
摘要翻译：公开了用于将集成电路器件连接到器件载体的层压（或非层叠）导电互连，其中导电互连包括交替的金属层和聚合物层。此外，聚合物可以包括枝晶，来自载体或器件的金属突起，和/或聚合物外部的胶束刷。聚合物层包括金属颗粒，并且交替的金属层和聚合物层形成立方体结构或圆柱形结构。

8. 发明申请

US20070007665A1 STRUCTURE AND METHOD FOR PRODUCING MULTIPLE SIZE INTERCONNECTIONS 有权
公开(公告)号：US20070007665A1
公开(公告)日：2007-01-11
申请号：US11160669
申请日：2005-07-05
申请人： Lawrence Clevenger , Mukta Farooq , Louis Hsu , William Landers , Donna Zupanski-Nielsen , Carl Radens , Chih-Chao Yang
发明人： Lawrence Clevenger , Mukta Farooq , Louis Hsu , William Landers , Donna Zupanski-Nielsen , Carl Radens , Chih-Chao Yang
IPC分类号： H01L23/48
CPC分类号： H05K3/3436 , H01L23/13 , H01L23/49811 , H01L23/49816 , H01L23/49838 , H01L24/11 , H01L24/12 , H01L24/17 , H01L24/49 , H01L24/73 , H01L24/81 , H01L2224/0401 , H01L2224/0603 , H01L2224/06102 , H01L2224/13099 , H01L2224/131 , H01L2224/13111 , H01L2224/1403 , H01L2224/49109 , H01L2224/81801 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H05K2201/094 , H05K2201/09736 , H05K2201/09845 , Y02P70/613 , H01L2224/29099 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An electrical structure and method comprising a first substrate electrically and mechanically connected to a second substrate. The first substrate comprises a first electrically conductive pad and a second electrically conductive pad. The second substrate comprises a third electrically conductive pad, a fourth electrically conductive pad, and a first electrically conductive member. The fourth electrically conductive pad comprises a height that is different than a height of the first electrically conductive member. The electrically conductive member is electrically and mechanically connected to the fourth electrically conductive pad. A first solder ball connects the first electrically conductive pad to the third electrically conductive pad. The first solder ball comprises a first diameter. A second solder ball connects the second electrically conductive pad to the first electrically conductive member. The second solder ball comprises a second diameter. The first diameter is greater than said second diameter.

9. 发明申请

US20060200965A1 ELECTRICAL WIRING DESIGN FOR MODULE REMOVAL AND REPLACEMENT FROM ORGANIC BOARD 有权
标题翻译：用于模块拆卸和替换有机板的电气接线设计
公开(公告)号：US20060200965A1
公开(公告)日：2006-09-14
申请号：US10906816
申请日：2005-03-08
申请人： Mukta Farooq , Harvey Hamel
发明人： Mukta Farooq , Harvey Hamel
IPC分类号： B23K31/02
CPC分类号： H05K3/3494 , B23K1/018 , B23K2101/40 , H01L24/98 , H01L2224/81222 , H01L2224/81234 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01082 , H01L2924/01322 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H05K1/0212 , H05K3/3436 , H05K2203/176 , Y10T29/49144 , Y10T29/49721 , Y10T29/49815 , Y10T29/49819 , Y10T29/49821 , H01L2924/00
摘要： A method and electrical structure for separating electronic components from one another joined by solder interconnections. An electronic module is joined to a substrate via a solder interconnection, whereby the electronic module has an electrical heating component residing within a bottom layer thereof adjacent a solder interconnection. Preferably, a chip carrier is joined to a board whereby the chip carrier has an electrical mesh plane for heating adjacent the solder interconnection. Resistive heat is generated within this electrical heating component either by applying an electrical current to the electrical heating component, or by non-contact inductively heating the layer in which such electrical heating component resides to generate resistive heat within the electrical heating component. The resistive heat is transferred to the solder interconnection to allow for localized melting of the solder interconnection and removal of the electronic components from one another.
摘要翻译：一种用于将电子部件彼此分离以通过焊料互连连接的方法和电气结构。电子模块通过焊料互连连接到基板，由此电子模块具有驻留在其邻近焊料互连的底层内的电加热部件。优选地，芯片载体连接到板，由此芯片载体具有用于在焊料互连附近加热的电网平面。通过向电加热部件施加电流，或通过非接触感应加热这种电加热部件所在的层以在电加热部件内产生电阻热，在该电加热部件内产生电阻热。电阻热转移到焊料互连以允许焊料互连的局部熔化和电子部件相互之间的移除。

10. 发明申请

US20070187828A1 ILD LAYER WITH INTERMEDIATE DIELECTRIC CONSTANT MATERIAL IMMEDIATELY BELOW SILICON DIOXIDE BASED ILD LAYER 审中-公开
标题翻译：具有中等介电常数材料的ILD层立即在二氧化硅二氧化硅基底层
公开(公告)号：US20070187828A1
公开(公告)日：2007-08-16
申请号：US11307600
申请日：2006-02-14
申请人： Mukta Farooq , Robert Hannon , Ian Melville , Donna Zupanski-Nielsen
发明人： Mukta Farooq , Robert Hannon , Ian Melville , Donna Zupanski-Nielsen
IPC分类号： H01L23/52
CPC分类号： H01L23/53295 , H01L21/76801 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit (IC) chip and related package are disclosed including a first interlevel dielectric (ILD) layer(s) including an ultra low dielectric constant (ULK) material, a second ILD layer(s) including a silicon dioxide (SiO2) based dielectric material above the first ILD layer(s), and a transitional ILD layer including an intermediate dielectric constant material. The transitional ILD layer is positioned directly below a lowermost one of the second ILD layer(s), excepting any isolation layer, which represents the layer most susceptible to failure. The intermediate dielectric constant material can have a dielectric constant and an elastic modulus greater than that of the ULK material and less than that of the SiO2 based dielectric material. Hence, the intermediate dielectric constant provides adequate electrical properties, but also absorbs more of the stress than the typical ULK material, which reduces the likelihood of failure. A method of forming the IC chip is also disclosed.
摘要翻译：公开了一种集成电路（IC）芯片和相关封装，其包括包括超低介电常数（ULK）材料的第一层间介电层（ILD）层，包括二氧化硅（SiO _{2 基介电材料，以及包含中间介电常数材料的过渡ILD层。过渡ILD层直接位于第二ILD层的最下面之一之外，除了任何隔离层，其代表最易受故障的层。中间介电常数材料可以具有比ULK材料的介电常数和弹性模量更大的弹性模量，并且小于基于SiO 2的介电材料的弹性模量。因此，中间介电常数提供足够的电气性能，但也比典型的ULK材料吸收更多的应力，这降低了失效的可能性。还公开了一种形成IC芯片的方法。}

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