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1. 发明申请

US20070007665A1 STRUCTURE AND METHOD FOR PRODUCING MULTIPLE SIZE INTERCONNECTIONS 有权
公开(公告)号：US20070007665A1
公开(公告)日：2007-01-11
申请号：US11160669
申请日：2005-07-05
申请人： Lawrence Clevenger , Mukta Farooq , Louis Hsu , William Landers , Donna Zupanski-Nielsen , Carl Radens , Chih-Chao Yang
发明人： Lawrence Clevenger , Mukta Farooq , Louis Hsu , William Landers , Donna Zupanski-Nielsen , Carl Radens , Chih-Chao Yang
IPC分类号： H01L23/48
CPC分类号： H05K3/3436 , H01L23/13 , H01L23/49811 , H01L23/49816 , H01L23/49838 , H01L24/11 , H01L24/12 , H01L24/17 , H01L24/49 , H01L24/73 , H01L24/81 , H01L2224/0401 , H01L2224/0603 , H01L2224/06102 , H01L2224/13099 , H01L2224/131 , H01L2224/13111 , H01L2224/1403 , H01L2224/49109 , H01L2224/81801 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H05K2201/094 , H05K2201/09736 , H05K2201/09845 , Y02P70/613 , H01L2224/29099 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An electrical structure and method comprising a first substrate electrically and mechanically connected to a second substrate. The first substrate comprises a first electrically conductive pad and a second electrically conductive pad. The second substrate comprises a third electrically conductive pad, a fourth electrically conductive pad, and a first electrically conductive member. The fourth electrically conductive pad comprises a height that is different than a height of the first electrically conductive member. The electrically conductive member is electrically and mechanically connected to the fourth electrically conductive pad. A first solder ball connects the first electrically conductive pad to the third electrically conductive pad. The first solder ball comprises a first diameter. A second solder ball connects the second electrically conductive pad to the first electrically conductive member. The second solder ball comprises a second diameter. The first diameter is greater than said second diameter.

2. 发明申请

US20070290345A1 STRUCTURE AND METHOD FOR PRODUCING MULTIPLE SIZE INTERCONNECTIONS 失效
标题翻译：用于生产多个尺寸互连的结构和方法
公开(公告)号：US20070290345A1
公开(公告)日：2007-12-20
申请号：US11847776
申请日：2007-08-30
申请人： Lawrence Clevenger , Mukta Farooq , Louis Hsu , William Landers , Donna Zupanski-Nielsen , Carl Radens , Chih-Chao Yang
发明人： Lawrence Clevenger , Mukta Farooq , Louis Hsu , William Landers , Donna Zupanski-Nielsen , Carl Radens , Chih-Chao Yang
IPC分类号： H01L23/488 , H01L21/34
CPC分类号： H05K3/3436 , H01L23/13 , H01L23/49811 , H01L23/49816 , H01L23/49838 , H01L24/11 , H01L24/12 , H01L24/17 , H01L24/49 , H01L24/73 , H01L24/81 , H01L2224/0401 , H01L2224/0603 , H01L2224/06102 , H01L2224/13099 , H01L2224/131 , H01L2224/13111 , H01L2224/1403 , H01L2224/49109 , H01L2224/81801 , H01L2924/00013 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H05K2201/094 , H05K2201/09736 , H05K2201/09845 , Y02P70/613 , H01L2224/29099 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An electrical structure and method comprising a first substrate electrically and mechanically connected to a second substrate. The first substrate comprises a first electrically conductive pad and a second electrically conductive pad. The second substrate comprises a third electrically conductive pad, a fourth electrically conductive pad, and a first electrically conductive member. The fourth electrically conductive pad comprises a height that is different than a height of the first electrically conductive member. The electrically conductive member is electrically and mechanically connected to the fourth electrically conductive pad. A first solder ball connects the first electrically conductive pad to the third electrically conductive pad. The first solder ball comprises a first diameter. A second solder ball connects the second electrically conductive pad to the first electrically conductive member. The second solder ball comprises a second diameter. The first diameter is greater than said second diameter.
摘要翻译：一种电结构和方法，包括电和机械地连接到第二衬底的第一衬底。第一基板包括第一导电焊盘和第二导电焊盘。第二基板包括第三导电焊盘，第四导电焊盘和第一导电部件。第四导电焊盘包括与第一导电构件的高度不同的高度。导电构件电连接和机械地连接到第四导电垫。第一焊球将第一导电焊盘连接到第三导电焊盘。第一焊球包括第一直径。第二焊球将第二导电焊盘连接到第一导电构件。第二焊球包括第二直径。第一直径大于所述第二直径。

3. 发明申请

US20070080455A1 SEMICONDUCTORS AND METHODS OF MAKING 审中-公开
标题翻译：半导体和制造方法
公开(公告)号：US20070080455A1
公开(公告)日：2007-04-12
申请号：US11163235
申请日：2005-10-11
申请人： Donna Zupanski-Nielsen , William Landers , Ian Melville , Roger Quon , Timothy Daubenspeck , Kamalesh Srivastava , Mary Cullinan-Scholl , Lawrence Clevenger , Christopher Muzzy
发明人： Donna Zupanski-Nielsen , William Landers , Ian Melville , Roger Quon , Timothy Daubenspeck , Kamalesh Srivastava , Mary Cullinan-Scholl , Lawrence Clevenger , Christopher Muzzy
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L24/13 , H01L21/76831 , H01L24/05 , H01L24/11 , H01L2224/0401 , H01L2224/05647 , H01L2224/11334 , H01L2224/1148 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/014 , H01L2924/12041 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/00
摘要： A semiconductor having an insulating layer, a contact pad, a via, and a sacrificial dielectric cap is provided. The contact pad is embedded in the insulating layer, where the contact pad has a top metal layer of copper. The via creates an opening over the top metal layer. The sacrificial dielectric cap is over at least the top metal layer.
摘要翻译：提供具有绝缘层，接触焊盘，通孔和牺牲电介质盖的半导体。接触垫嵌入在绝缘层中，其中接触垫具有铜的顶部金属层。通孔在顶部金属层上形成一个开口。牺牲绝缘帽至少在顶部金属层之上。

4. 发明申请

US20070187828A1 ILD LAYER WITH INTERMEDIATE DIELECTRIC CONSTANT MATERIAL IMMEDIATELY BELOW SILICON DIOXIDE BASED ILD LAYER 审中-公开
标题翻译：具有中等介电常数材料的ILD层立即在二氧化硅二氧化硅基底层
公开(公告)号：US20070187828A1
公开(公告)日：2007-08-16
申请号：US11307600
申请日：2006-02-14
申请人： Mukta Farooq , Robert Hannon , Ian Melville , Donna Zupanski-Nielsen
发明人： Mukta Farooq , Robert Hannon , Ian Melville , Donna Zupanski-Nielsen
IPC分类号： H01L23/52
CPC分类号： H01L23/53295 , H01L21/76801 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit (IC) chip and related package are disclosed including a first interlevel dielectric (ILD) layer(s) including an ultra low dielectric constant (ULK) material, a second ILD layer(s) including a silicon dioxide (SiO2) based dielectric material above the first ILD layer(s), and a transitional ILD layer including an intermediate dielectric constant material. The transitional ILD layer is positioned directly below a lowermost one of the second ILD layer(s), excepting any isolation layer, which represents the layer most susceptible to failure. The intermediate dielectric constant material can have a dielectric constant and an elastic modulus greater than that of the ULK material and less than that of the SiO2 based dielectric material. Hence, the intermediate dielectric constant provides adequate electrical properties, but also absorbs more of the stress than the typical ULK material, which reduces the likelihood of failure. A method of forming the IC chip is also disclosed.
摘要翻译：公开了一种集成电路（IC）芯片和相关封装，其包括包括超低介电常数（ULK）材料的第一层间介电层（ILD）层，包括二氧化硅（SiO _{2 基介电材料，以及包含中间介电常数材料的过渡ILD层。过渡ILD层直接位于第二ILD层的最下面之一之外，除了任何隔离层，其代表最易受故障的层。中间介电常数材料可以具有比ULK材料的介电常数和弹性模量更大的弹性模量，并且小于基于SiO 2的介电材料的弹性模量。因此，中间介电常数提供足够的电气性能，但也比典型的ULK材料吸收更多的应力，这降低了失效的可能性。还公开了一种形成IC芯片的方法。}

5. 发明申请

US20050026450A1 INHIBITION OF TIN OXIDE FORMATION IN LEAD FREE INTERCONNECT FORMATION 失效
标题翻译：氧化铅形成在无铅互连形成中的抑制作用
公开(公告)号：US20050026450A1
公开(公告)日：2005-02-03
申请号：US10604560
申请日：2003-07-30
申请人： Emanuel Cooper , John Cotte , Lisa Fanti , David Eichstadt , Stephen Kilpatrick , Henry Nye , Donna Zupanski-Nielsen
发明人： Emanuel Cooper , John Cotte , Lisa Fanti , David Eichstadt , Stephen Kilpatrick , Henry Nye , Donna Zupanski-Nielsen
IPC分类号： H01L21/302 , H01L21/44 , H01L21/461 , H01L21/60
CPC分类号： H01L24/11 , H01L2224/05001 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05147 , H01L2224/05171 , H01L2224/05572 , H01L2224/05647 , H01L2224/13099 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/00014
摘要： A method is provided for removing exposed seed layers in the fabrication of solder interconnects on electronic components such as semiconductor wafers without damaging the interconnects or underlying wafer substrate and with a high wafer yield. The solder interconnects are lead free or substantially lead free and typically contain Sn. An oxalic acid solution is used to contact the wafer after an etching step to remove part of the seed layer. The seed layer is typically a Cu containing layer with a lower barrier layer containing barrier metals such as Ti, Ta and W. The lower barrier layer remains after the etch and the oxalic acid solution inhibits the formation of Sn compounds on the barrier layer surface which compounds may mask the barrier layer and the barrier layer etchant resulting in incomplete barrier layer removal on the wafer surface. Any residual conductive barrier layer can cause shorts and other wafer problems and result in a lower wafer yield. An electroetch is preferred to remove the portion of the seed layer overlying the lower barrier layer.
摘要翻译：提供了一种在电子部件如半导体晶片制造焊料互连件中去除暴露的种子层的方法，而不会损坏互连或下面的晶片衬底并以高的晶片产量。焊料互连是无铅的或基本上无铅的，并且通常含有Sn。在蚀刻步骤之后，使用草酸溶液接触晶片以除去部分种子层。种子层通常是含Cu层，其具有包含阻挡金属如Ti，Ta和W的下阻挡层。在蚀刻后保留下阻挡层，并且草酸溶液抑制在阻挡层表面上形成Sn化合物化合物可以掩蔽阻挡层和阻挡层蚀刻剂，导致晶片表面上不完全的阻挡层去除。任何残留的导电阻挡层可能导致短路和其他晶片问题，并导致较低的晶圆产量。优选去除电子蚀刻以去除覆盖在下阻挡层上的种子层的部分。

6. 发明申请

US20050224966A1 Interconnections for flip-chip using lead-free solders and having reaction barrier layers 有权
标题翻译：使用无铅焊料并具有反应阻挡层的倒装芯片的互连
公开(公告)号：US20050224966A1
公开(公告)日：2005-10-13
申请号：US10815103
申请日：2004-03-31
申请人： Keith Fogel , Balaram Ghosal , Sung Kang , Stephen Kilpatrick , Paul Lauro , Henry Nye , Da-Yuan Shih , Donna Zupanski-Nielsen
发明人： Keith Fogel , Balaram Ghosal , Sung Kang , Stephen Kilpatrick , Paul Lauro , Henry Nye , Da-Yuan Shih , Donna Zupanski-Nielsen
IPC分类号： H01L21/60 , H01L23/48 , H01L23/485 , H05K3/34
CPC分类号： H01L24/05 , H01L24/03 , H01L24/11 , H01L24/12 , H01L2224/03912 , H01L2224/0401 , H01L2224/05 , H01L2224/1147 , H01L2224/11849 , H01L2224/119 , H01L2224/13023 , H01L2224/13099 , H01L2224/131 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01055 , H01L2924/01073 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/30107 , H01L2924/00014
摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.
摘要翻译：一种适于将微电子器件芯片倒装连接到封装的互连结构，包括二层，三层或四层限球组合物，包括粘附/反应阻挡层，并且具有与含锡的组分反应的焊料可湿性层无铅焊料，使得可焊接层在焊接期间可以完全消耗，但在焊接期间与无铅焊料接触后，阻挡层保持不变。一个或多个无铅焊料球选择性地位于焊料润湿层上，该无铅焊球包含锡作为主要成分和一种或多种合金成分。

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