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1. 发明授权

US06888771B2 Skewed sense AMP for variable resistance memory sensing 有权
公开(公告)号：US06888771B2
公开(公告)日：2005-05-03
申请号：US10434087
申请日：2003-05-09
申请人： Glen Hush , R. Jacob Baker , John Moore
发明人： Glen Hush , R. Jacob Baker , John Moore
IPC分类号： G11C7/06 , G11C11/4091 , G11C7/02
CPC分类号： G11C13/00 , G11C7/065 , G11C11/4091 , G11C13/004 , G11C2013/0042 , G11C2013/0054 , G11C2207/2227
摘要： A variable resistance memory sense amplifier has a built-in offset to assist in switching the sense amplifier when a resistive memory cell is in a low resistance state. The built-in offset can be achieved by varying size, threshold voltage, associated capacity or associated resistance of the transistors within the sense amplifier.

2. 发明授权

US07251177B2 Skewed sense AMP for variable resistance memory sensing 有权
标题翻译：用于可变电阻存储器感测的倾斜感测AMP
公开(公告)号：US07251177B2
公开(公告)日：2007-07-31
申请号：US11089132
申请日：2005-03-24
申请人： Glen Hush , R. Jacob Baker , John Moore
发明人： Glen Hush , R. Jacob Baker , John Moore
IPC分类号： G11C7/02
CPC分类号： G11C13/00 , G11C7/065 , G11C11/4091 , G11C13/004 , G11C2013/0042 , G11C2013/0054 , G11C2207/2227
摘要： A variable resistance memory sense amplifier has a built-in offset to assist in switching the sense amplifier when a resistive memory cell is in a low resistance state. The built-in offset can be achieved by varying size, threshold voltage, associated capacity or associated resistance of the transistors within the sense amplifier.
摘要翻译：可变电阻存储器读出放大器具有内置偏移量，以在电阻性存储器单元处于低电阻状态时有助于切换读出放大器。可以通过改变读出放大器内的晶体管的尺寸，阈值电压，相关容量或相关电阻来实现内置偏移。

3. 发明授权

US07224632B2 Rewrite prevention in a variable resistance memory 有权
标题翻译：在可变电阻存储器中重写防止
公开(公告)号：US07224632B2
公开(公告)日：2007-05-29
申请号：US11070213
申请日：2005-03-03
申请人： John Moore , R. Jacob Baker
发明人： John Moore , R. Jacob Baker
IPC分类号： G11C7/00 , G11C8/00
CPC分类号： G11C13/0004 , G11C11/406 , G11C11/4091 , G11C13/0011 , G11C13/003 , G11C13/0033 , G11C13/004 , G11C13/0061 , G11C2013/0054 , G11C2207/2281 , G11C2213/72 , G11C2213/76 , G11C2213/79
摘要： A variable resistance memory cell is read by a sense amplifier but without rewriting the contents of the memory cell. If the memory cell has an access transistor, the access transistor is switched off to decouple the cell from the bit line after a predetermined amount of time. The predetermined amount of time is sufficiently long enough to permit the logical state of the cell to be transferred to the bit line and also sufficiently short to isolate the cell from the bit line before the sense amplifier operates. For memory cells which do not utilize an access transistor, an isolation transistor may be placed in the bit line located between and serially connection the portion of the bit line from the sense amplifier to the isolation transistor and the portion of the bit line from the isolation transistor to the memory cell. The isolation transistor, normally conducting, is switched off after the predetermined time past the time the bit line begins to discharge through the memory cell, thereby isolating the memory cell from the sense amplifier before a sensing operation begins.
摘要翻译：可变电阻存储单元由读出放大器读取，但不重写存储单元的内容。如果存储单元具有存取晶体管，则在预定时间量之后，存取晶体管被切断以将单元与位线去耦。预定的时间量足够长以允许将单元的逻辑状态传送到位线，并且还足够短以在读出放大器操作之前将单元与位线隔离。对于不使用存取晶体管的存储单元，可以将隔离晶体管放置在位线之间，位线之间并且将位线的从读出放大器的部分串联连接到隔离晶体管，并且位线的部分与隔离晶体管到存储单元。在通过存储单元的位线开始放电的时间之后的预定时间之后，正常导通的隔离晶体管被关断，从而在感测操作开始之前将存储单元与读出放大器隔离。

4. 发明授权

US06882578B2 PCRAM rewrite prevention 有权
标题翻译： PCRAM重写预防
公开(公告)号：US06882578B2
公开(公告)日：2005-04-19
申请号：US10680161
申请日：2003-10-08
申请人： John Moore , R. Jacob Baker
发明人： John Moore , R. Jacob Baker
IPC分类号： G11C13/00 , G11C8/02 , G11C11/34 , G11C11/406 , G11C11/4091 , G11C13/02 , G11C16/02 , G11C16/28 , G11C7/00
CPC分类号： G11C13/0004 , G11C11/406 , G11C11/4091 , G11C13/0011 , G11C13/003 , G11C13/0033 , G11C13/004 , G11C13/0061 , G11C2013/0054 , G11C2207/2281 , G11C2213/72 , G11C2213/76 , G11C2213/79
摘要： A programmable conductor memory cell is read by a sense amplifier but without rewriting the contents of the memory cell. If the programmable contact memory cell has an access transistor, the access transistor is switched off to decouple the cell from the bit line after a predetermined amount of time. The predetermined amount of time is sufficiently long enough to permit the logical state of the cell to be transferred to the bit line and also sufficiently short to isolate the cell from the bit line before the sense amplifier operates. For programmable contact memory cells which do not utilize an access transistor, an isolation transistor may be placed in the bit line located between and serially connection the portion of the bit line from the sense amplifier to the isolation transistor and the portion of the bit line from the isolation transistor to the memory cell. The isolation transistor, normally conducting, is switched off after the predetermined time past the time the bit line begins to discharge through the programmable contact memory cell, thereby isolating the programmable contact memory cell from the sense amplifier before a sensing operation begins.
摘要翻译：可编程导体存储单元由读出放大器读取，但不重写存储单元的内容。如果可编程触点存储单元具有存取晶体管，则在预定的时间量之后，存取晶体管被切断以将该单元与位线去耦。预定的时间量足够长以允许将单元的逻辑状态传送到位线，并且还足够短以在读出放大器操作之前将单元与位线隔离。对于不使用存取晶体管的可编程触点存储单元，可以将隔离晶体管放置在位线之间，位线之间并且串行连接从读出放大器到隔离晶体管的位线的部分，隔离晶体管到存储单元。在通过可编程触点存储单元的位线开始放电的时间之后的预定时间之后，正常导通的隔离晶体管被关断，从而在感测操作开始之前将可编程触点存储单元与读出放大器隔离。

5. 发明授权

US08717220B2 Methods of quantizing signals using variable reference signals 有权
标题翻译：使用可变参考信号量化信号的方法
公开(公告)号：US08717220B2
公开(公告)日：2014-05-06
申请号：US13306868
申请日：2011-11-29
申请人： R. Jacob Baker
发明人： R. Jacob Baker
IPC分类号： H03M1/56
CPC分类号： G11C16/26 , G11C7/06 , H03M3/39 , H03M3/43 , H03M3/456
摘要： Methods for reading a data location coupled to an electrical conductor. A counter receives a signal from an analog-to-digital converter coupled to the electrical conductor. The counter produces two or more counts, and in some embodiments, the counts are based in part on a variable reference voltage. An interfuser may be coupled to an output of the counter. The interfuser receives the two or more counts from the counter and reads data conveyed by the data location based on the two or more counts.
摘要翻译：读取耦合到电导体的数据位置的方法。计数器从耦合到电导体的模数转换器接收信号。计数器产生两个或多个计数，并且在一些实施例中，计数部分地基于可变参考电压。接口用户可以耦合到计数器的输出。接口用户从计数器接收两个或多个计数，并且基于两个或更多个计数读取由数据位置传送的数据。

6. 发明授权

US08675413B2 Reference current sources 有权
标题翻译：参考电流源
公开(公告)号：US08675413B2
公开(公告)日：2014-03-18
申请号：US13306848
申请日：2011-11-29
申请人： R. Jacob Baker
发明人： R. Jacob Baker
IPC分类号： G11C11/34 , G11C7/02 , G11C7/04
CPC分类号： G11C16/06 , G11C5/147 , G11C7/02 , G11C7/067 , G11C7/1006 , G11C7/1051 , G11C7/106 , G11C7/1069 , G11C13/0004 , G11C13/004 , H03M3/39 , H03M3/456 , H04N5/357 , H04N5/376
摘要： Systems, methods, and devices are disclosed, including an electronic device that includes a first data location, a quantizing circuit, and a reference current source, all coupled to an electrical conductor. The reference current source may include a current mirror with a side coupled to the electrical conductor and a second data location coupled to another side of the current mirror.
摘要翻译：公开了系统，方法和设备，包括包括第一数据位置，量化电路和参考电流源的电子设备，全部耦合到电导体。参考电流源可以包括具有耦合到电导体的一侧的电流镜和耦合到电流镜的另一侧的第二数据位置。

7. 发明授权

US08582375B2 Methods for sensing memory elements in semiconductor devices 有权
标题翻译：用于感测半导体器件中的存储元件的方法
公开(公告)号：US08582375B2
公开(公告)日：2013-11-12
申请号：US13486535
申请日：2012-06-01
申请人： R. Jacob Baker
发明人： R. Jacob Baker
IPC分类号： G11C7/22
CPC分类号： G11C7/22 , G11C5/147 , G11C7/065 , G11C7/16 , G11C8/08 , G11C11/5642 , G11C11/5678 , G11C13/0004 , G11C2211/5634 , G11C2211/5644 , H03M3/43 , H03M3/456
摘要： A memory device that, in certain embodiments, includes a plurality of memory elements connected to a bit-line and a delta-sigma modulator with a digital output and an analog input, which may be connected to the bit-line. In some embodiments, the delta-sigma modulator includes a circuit with first and second inputs and an output. The circuit is configured to combine (add or subtract) input signals. The first input may be connected to the analog input. The delta-sigma modulator may also include an integrator connected to the output of the circuit, an analog-to-digital converter with an input connected to an output of the integrator and an output connected to the digital output, and a digital-to-analog converter with an input connected to the output of the analog-to-digital converter and an output connected to the second input of the circuit.
摘要翻译：在某些实施例中，存储器件包括连接到位线的多个存储器元件和可以连接到位线的具有数字输出和模拟输入的Δ-Σ调制器。在一些实施例中，Δ-Σ调制器包括具有第一和第二输入和输出的电路。该电路被配置为组合（加或减）输入信号。第一个输入可以连接到模拟输入。 Δ-Σ调制器还可以包括连接到电路的输出的积分器，具有连接到积分器的输出的输入和连接到数字输出的输出的模数转换器，以及数模转换器，模拟转换器，其输入连接到模数转换器的输出端，输出端连接到电路的第二输入端。

8. 发明授权

US08581168B2 Dual well read-out integrated circuit (ROIC) 有权
标题翻译：双阱读出集成电路（ROIC）
公开(公告)号：US08581168B2
公开(公告)日：2013-11-12
申请号：US13074290
申请日：2011-03-29
申请人： Lloyd F. Linder , Daniel Renner , Michael MacDougal , Jonathan Geske , R. Jacob Baker
发明人： Lloyd F. Linder , Daniel Renner , Michael MacDougal , Jonathan Geske , R. Jacob Baker
IPC分类号： H01L27/00 , G01J1/44
CPC分类号： H04N5/33 , F41G7/008 , F41G7/2253 , F41G7/226 , F41G7/2293 , H04N5/2256
摘要： A single camera capable of capturing high speed laser return pulses for a target, as well as provide imaging information on the background of the target. This capability is enabled by having a read-out integrated circuit (ROIC) capable of extracting both types of information from a pixel of a focal plane array (FPA). Further, an ROIC topology that allows for the ability to distinguish between high frequency and low frequency signal paths, and provide supporting circuitry to process the two paths separately. One path may integrate the low frequency background scene to provide a high fidelity image of the scene. The second path may process high frequency noise and multiple laser pulse returns within a frame. These two paths may be combined to provide a background image with a superimposed laser return.
摘要翻译：一个能够捕获目标的高速激光返回脉冲的单个相机，以及在目标的背景上提供成像信息。通过具有能够从焦平面阵列（FPA）的像素中提取两种类型的信息的读出集成电路（ROIC）来实现该能力。此外，ROIC拓扑允许区分高频和低频信号路径的能力，并提供支持电路来分别处理两个路径。一个路径可以集成低频背景场景以提供场景的高保真图像。第二路径可以处理高频噪声并且在一帧内处理多个激光脉冲返回。这两个路径可以组合以提供具有叠加的激光返回的背景图像。

9. 发明申请

US20120098691A1 QUANTIZING CIRCUITS WITH VARIABLE PARAMETERS 有权
标题翻译：具有可变参数的量化电路
公开(公告)号：US20120098691A1
公开(公告)日：2012-04-26
申请号：US13342844
申请日：2012-01-03
申请人： R. Jacob Baker
发明人： R. Jacob Baker
IPC分类号： H03M1/34
CPC分类号： H03M1/60 , G11C11/5642 , G11C16/26 , H03K3/0231
摘要： Systems, methods, and devices for obtaining data from a data location. The method may include generating a first value by sensing a data location under a first condition and generating a second value by sensing the data location under a second condition. The method may further include combining the first value with the second value to identify data conveyed by the data location.
摘要翻译：用于从数据位置获取数据的系统，方法和设备。该方法可以包括通过在第一条件下感测数据位置来产生第一值，并且通过在第二条件下感测数据位置来产生第二值。该方法还可以包括将第一值与第二值组合以识别由数据位置传送的数据。

10. 发明授权

US08098180B2 Devices including analog-to-digital converters for internal data storage locations 有权
标题翻译：器件包括用于内部数据存储位置的模数转换器
公开(公告)号：US08098180B2
公开(公告)日：2012-01-17
申请号：US12694991
申请日：2010-01-27
申请人： R. Jacob Baker
发明人： R. Jacob Baker
IPC分类号： H03M1/12
CPC分类号： H03M1/504 , G11C7/02 , G11C7/04 , G11C7/1006 , G11C7/16 , G11C11/5642 , G11C11/5678 , G11C13/0004 , G11C2211/5634 , G11C2211/5644 , H03M3/39 , H03M3/43 , H03M3/456
摘要： A device that includes an internal data storage location coupled to an electrical conductor and an analog-to-digital converter coupled to the internal data storage location via the electrical conductor. In some embodiments, the analog-to-digital converter includes a comparator having an input coupled to the electrical conductor and a switch coupled to the electrical conductor.
摘要翻译：一种包括耦合到电导体的内部数据存储位置和经由电导体耦合到内部数据存储位置的模拟 - 数字转换器的装置。在一些实施例中，模数转换器包括具有耦合到电导体的输入和耦合到电导体的开关的比较器。

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