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1. 发明授权

US06818532B2 Method of etching substrates 有权
标题翻译：蚀刻基板的方法
公开(公告)号：US06818532B2
公开(公告)日：2004-11-16
申请号：US10118318
申请日：2002-04-09
申请人： Geun-young Yeom , Myung cheol Yoo , Wolfram Urbanek , Youn-joon Sung , Chang-hyun Jeong , Kyong-nam Kim , Dong-woo Kim
发明人： Geun-young Yeom , Myung cheol Yoo , Wolfram Urbanek , Youn-joon Sung , Chang-hyun Jeong , Kyong-nam Kim , Dong-woo Kim
IPC分类号： H01L2146
CPC分类号： C30B33/00 , C30B29/20 , H01L21/78 , H01L33/0095
摘要： Thinning and dicing substrates using inductively coupled plasma reactive ion etching (ICP RIE). When dicing, a hard photo-resist pattern or metal mask pattern that defines scribe lines is formed on a sapphire substrate or on a semiconductor epitaxial layer, beneficially by lithographic techniques. Then, the substrate is etched along the scribe lines to form etched channels. An etching gas comprised of BCl3 and/or BCl3/Cl2 gas is used (optionally, Ar can be added). Stress lines are then produced through the substrate along the etched channels. The substrate is then diced along the stress lines. When thinning, a surface of a substrate is subjected to inductively coupled plasma reactive ion etching (ICP RIE) using BCl3 and/or BCl3/Cl2 gas, possibly with some Ar. ICP RIE is particularly useful when working sapphire and other hard substrates.
摘要翻译：使用电感耦合等离子体反应离子蚀刻（ICP RIE）的薄化和切割基板。当切割时，通过光刻技术有利地在蓝宝石衬底或半导体外延层上形成限定划线的硬光电抗蚀剂图案或金属掩模图案。然后，沿着划线蚀刻衬底以形成蚀刻通道。使用由BCl 3和/或BCl 3 / Cl 2气体构成的蚀刻气体（可选地，可以加入Ar）。然后通过沿着蚀刻通道的衬底产生应力线。然后沿着应力线切割衬底。当薄化时，使用BCl 3和/或BCl 3 / Cl 2气体，可能具有一些Ar，对衬底的表面进行电感耦合等离子体反应离子蚀刻（ICP RIE）。 ICP RIE在使用蓝宝石和其他硬质基材时特别有用。

2. 发明授权

US07012012B2 Method of etching substrates 有权
标题翻译：蚀刻基板的方法
公开(公告)号：US07012012B2
公开(公告)日：2006-03-14
申请号：US10928202
申请日：2004-08-30
申请人： Geun-young Yeom , Myung cheol Yoo , Wolfram Urbanek , Youn-joon Sung , Chang-hyun Jeong , Kyong-nam Kim , Dong-woo Kim
发明人： Geun-young Yeom , Myung cheol Yoo , Wolfram Urbanek , Youn-joon Sung , Chang-hyun Jeong , Kyong-nam Kim , Dong-woo Kim
IPC分类号： H01L21/46 , H01L21/302
CPC分类号： C30B33/00 , C30B29/20 , H01L21/78 , H01L33/0095
摘要： Thinning and dicing substrates using inductively coupled plasma reactive ion etching (ICP RIE). When dicing, a hard photo-resist pattern or metal mask pattern that defines scribe lines is formed on a sapphire substrate or on a semiconductor epitaxial layer, beneficially by lithographic techniques. Then, the substrate is etched along the scribe lines to form etched channels. An etching gas comprised of BCl3 and/or BCl3/Cl2 gas is used (optionally, Ar can be added). Stress lines are then produced through the substrate along the etched channels. The substrate is then diced along the stress lines. When thinning, a surface of a substrate is subjected to inductively coupled plasma reactive ion etching (ICP RIE) using BCl3 and/or BCl3/Cl2 gas, possibly with some Ar. ICP RIE is particularly useful when working sapphire and other hard substrates.
摘要翻译：使用电感耦合等离子体反应离子蚀刻（ICP RIE）的薄化和切割基板。当切割时，通过光刻技术有利地在蓝宝石衬底或半导体外延层上形成限定划线的硬光电抗蚀剂图案或金属掩模图案。然后，沿着划线蚀刻衬底以形成蚀刻通道。使用由BCl 3和/或BCl 3 / Cl 2气体组成的蚀刻气体（可选地，可以加入Ar）。然后通过沿着蚀刻通道的衬底产生应力线。然后沿着应力线切割衬底。当变薄时，使用BCl 3 3和/或BCl 3 / Cl 2将衬底的表面进行电感耦合等离子体反应离子蚀刻（ICP RIE） / SUB气体，可能有一些Ar。 ICP RIE在使用蓝宝石和其他硬质基材时特别有用。

3. 发明申请

US20050026396A1 Method of etching substrates 有权
标题翻译：蚀刻基板的方法
公开(公告)号：US20050026396A1
公开(公告)日：2005-02-03
申请号：US10928202
申请日：2004-08-30
申请人： Geun-young Yeom , Myung Yoo , Wolfram Urbanek , Youn-joon Sung , Chang-hyun Jeong , Kyoung-nam Kim , Dong-woo Kim
发明人： Geun-young Yeom , Myung Yoo , Wolfram Urbanek , Youn-joon Sung , Chang-hyun Jeong , Kyoung-nam Kim , Dong-woo Kim
IPC分类号： H01L21/3065 , G03F9/00 , H01B13/00 , H01L21/00 , H01L21/301 , H01L21/302 , H01L21/44 , H01L21/46 , H01L21/78 , H01L33/00
CPC分类号： C30B33/00 , C30B29/20 , H01L21/78 , H01L33/0095
摘要： Thinning and dicing substrates using inductively coupled plasma reactive ion etching (ICP RIE). When dicing, a hard photo-resist pattern or metal mask pattern that defines scribe lines is formed on a sapphire substrate or on a semiconductor epitaxial layer, beneficially by lithographic techniques. Then, the substrate is etched along the scribe lines to form etched channels. An etching gas comprised of BCl3 and/or BCl3/Cl2 gas is used (optionally, Ar can be added). Stress lines are then produced through the substrate along the etched channels. The substrate is then diced along the stress lines. When thinning, a surface of a substrate is subjected to inductively coupled plasma reactive ion etching (ICP RIE) using BCl3 and/or BCl3/Cl2 gas, possibly with some Ar. ICP RIE is particularly useful when working sapphire and other hard substrates.
摘要翻译：使用电感耦合等离子体反应离子蚀刻（ICP RIE）的薄化和切割基板。当切割时，通过光刻技术有利地在蓝宝石衬底或半导体外延层上形成限定划线的硬光电抗蚀剂图案或金属掩模图案。然后，沿着划线蚀刻衬底以形成蚀刻通道。使用由BCl 3和/或BCl 3 / Cl 2气体构成的蚀刻气体（可选地，可以加入Ar）。然后通过沿着蚀刻通道的衬底产生应力线。然后沿着应力线切割衬底。当薄化时，使用BCl 3和/或BCl 3 / Cl 2气体，可能具有一些Ar，对衬底的表面进行电感耦合等离子体反应离子蚀刻（ICP RIE）。 ICP RIE在使用蓝宝石和其他硬质基材时特别有用。

4. 发明授权

US08129260B2 Semiconductor substrates having low defects and methods of manufacturing the same 有权
标题翻译：具有低缺陷的半导体衬底及其制造方法
公开(公告)号：US08129260B2
公开(公告)日：2012-03-06
申请号：US11802667
申请日：2007-05-24
申请人： Ho-sun Paek , Youn-joon Sung , Kyoung-ho Ha , Joong-kon Son , Sung-nam Lee
发明人： Ho-sun Paek , Youn-joon Sung , Kyoung-ho Ha , Joong-kon Son , Sung-nam Lee
IPC分类号： H01L23/58
CPC分类号： H01L21/02647 , H01L21/02378 , H01L21/02381 , H01L21/02403 , H01L21/0242 , H01L21/02433 , H01L21/02458 , H01L21/02461 , H01L21/02463 , H01L21/02469 , H01L21/02516 , H01L21/0254 , H01L21/02543 , H01L21/02546 , H01L21/02551 , H01L21/02609 , H01L21/02642 , H01L21/02645
摘要： A semiconductor substrate includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is formed of II-VI-group semiconductor material, III-V-group semiconductor material, or II-VI-group semiconductor material and III-V-group semiconductor material. At least one amorphous region and at least one crystalloid region are formed in the first semiconductor layer. The second semiconductor layer is formed on the first semiconductor layer and is crystal-grown from the at least one crystalloid region. A method of manufacturing a semiconductor substrate includes preparing a growth substrate; crystal-growing the first semiconductor layer on the growth substrate; forming the at least one amorphous region and the at least one crystalloid region in the first semiconductor layer; and forming a second semiconductor layer on the first semiconductor layer using the at least one amorphous region as a mask and the at least one crystalloid region as a seed.
摘要翻译：半导体衬底包括第一半导体层和第二半导体层。第一半导体层由II-VI族半导体材料，III-V族半导体材料或II-VI族半导体材料和III-V族半导体材料形成。在第一半导体层中形成至少一个非晶区域和至少一个晶体区域。第二半导体层形成在第一半导体层上并且从至少一个晶体区域晶体生长。制造半导体衬底的方法包括制备生长衬底; 在生长衬底上晶体生长第一半导体层; 在所述第一半导体层中形成所述至少一个非晶区和所述至少一个晶体区; 以及使用所述至少一个非晶区域作为掩模和所述至少一个晶体区域作为种子在所述第一半导体层上形成第二半导体层。

5. 发明申请

US20070015313A1 Submount of semiconductor laser diode, method of manufacturing the same, and semiconductor laser diode assembly using the submount 审中-公开
标题翻译：半导体激光二极管的基座，其制造方法以及使用该基座的半导体激光二极管组件
公开(公告)号：US20070015313A1
公开(公告)日：2007-01-18
申请号：US11477911
申请日：2006-06-30
申请人： Joon-seop Kwak , Su-hee Chae , Youn-joon Sung
发明人： Joon-seop Kwak , Su-hee Chae , Youn-joon Sung
IPC分类号： H01L21/00 , H01L21/302 , H01L21/461
CPC分类号： H01S5/0206 , H01L33/62 , H01L2924/0002 , H01S5/0207 , H01S5/02236 , H01S5/0224 , H01S5/02272 , H01S5/2205 , H01L2924/00
摘要： Provided is a submount flip-chip bonded to a semiconductor laser diode chip with stepped first and second electrodes. The submount includes a substrate having first and second surfaces which are separated by a step height corresponding to a height difference between the first and second electrodes; first and second metal layers being formed to the same thickness on the first and second surfaces, respectively; and first and second solder layers being formed to the same thickness on the first and second metal layers, respectively, and being bonded to the first and second electrodes, respectively.
摘要翻译：提供了一种与具有阶梯状的第一和第二电极的半导体激光二极管芯片接合的底座倒装芯片。所述基座包括具有第一和第二表面的基板，所述第一和第二表面被分隔开与所述第一和第二电极之间的高度差相对应的台阶高度; 分别在第一和第二表面上形成相同厚度的第一和第二金属层; 并且第一和第二焊料层分别在第一和第二金属层上形成为相同的厚度，并分别结合到第一和第二电极。

6. 发明授权

US08895331B2 Semiconductor light emitting diode having high efficiency and method of manufacturing the same 有权
标题翻译：具有高效率的半导体发光二极管及其制造方法
公开(公告)号：US08895331B2
公开(公告)日：2014-11-25
申请号：US12627714
申请日：2009-11-30
申请人： Jeong-wook Lee , Youn-joon Sung
发明人： Jeong-wook Lee , Youn-joon Sung
IPC分类号： H01L21/00 , H01L33/00 , H01L33/22 , H01L33/12
CPC分类号： H01L33/22 , H01L33/007 , H01L33/12
摘要： Provided is a semiconductor light emitting diode having a textured structure formed on a substrate. In a method of manufacturing the semiconductor light emitting diode, a metal layer is formed on the substrate, and a metal oxide layer having holes is formed by anodizing the metal layer. The metal oxide layer itself can be used as a textured structure pattern, or the textured structure pattern can be formed by forming holes in the substrate or a material layer under the metal oxide layer corresponding to the holes of the metal oxide layer. The manufacture of the semiconductor light emitting diode is completed by sequentially forming a first semiconductor layer, an active layer, and a second semiconductor layer on the textured structure pattern.
摘要翻译：提供了一种在基板上形成纹理结构的半导体发光二极管。在制造半导体发光二极管的方法中，在基板上形成金属层，通过阳极氧化金属层形成具有孔的金属氧化物层。金属氧化物层本身可以用作纹理结构图案，或者纹理结构图案可以通过在基板中形成孔或在对应于金属氧化物层的孔的金属氧化物层下面的材料层来形成。通过在纹理结构图案上依次形成第一半导体层，有源层和第二半导体层来完成半导体发光二极管的制造。

7. 发明授权

US08114691B2 Semiconductor light emitting device having textured structure and method of manufacturing the same 有权
标题翻译：具有纹理结构的半导体发光器件及其制造方法
公开(公告)号：US08114691B2
公开(公告)日：2012-02-14
申请号：US12630880
申请日：2009-12-04
申请人： Jeong-wook Lee , Youn-joon Sung , Ho-sun Paek
发明人： Jeong-wook Lee , Youn-joon Sung , Ho-sun Paek
IPC分类号： H01L21/00
CPC分类号： H01L33/12 , H01L33/007 , H01L33/025 , H01L33/20 , H01L33/22
摘要： A semiconductor light emitting diode having a textured structure and a method of manufacturing the same are provided. The semiconductor light emitting diode includes a first semiconductor layer formed into a textured structure, an intermediate layer formed between the textured structures of the patterned first semiconductor layer, and a second semiconductor layer, an active layer, and a third semiconductor layer sequentially formed on the first semiconductor layer and the intermediate layer.
摘要翻译：提供具有纹理结构的半导体发光二极管及其制造方法。半导体发光二极管包括形成为纹理结构的第一半导体层，形成在图案化的第一半导体层的纹理结构之间的中间层，以及顺序地形成在第一半导体层上的第二半导体层，有源层和第三半导体层第一半导体层和中间层。

8. 发明授权

US07632742B2 Substrate for growing Pendeo epitaxy and method of forming the same 有权
标题翻译：用于生长Pendeo外延的底物及其形成方法
公开(公告)号：US07632742B2
公开(公告)日：2009-12-15
申请号：US11650981
申请日：2007-01-09
申请人： Ho-sun Paek , Tae-hoon Jang , Youn-joon Sung , Tan Sakong , Min-ho Yang
发明人： Ho-sun Paek , Tae-hoon Jang , Youn-joon Sung , Tan Sakong , Min-ho Yang
IPC分类号： H01L21/20
CPC分类号： C30B7/005 , C30B29/403 , H01L21/0237 , H01L21/0254 , H01L21/02639 , H01L21/0265
摘要： A Pendeo-epitaxy growth substrate and a method of manufacturing the same are provided. The Pendeo-epitaxy growth substrate includes a substrate, a plurality of pattern areas formed on the substrate in a first direction for Pendeo-epitaxy growth, and at least one solution blocking layer contacting the plurality of pattern areas and formed on the substrate in a second direction, thereby preventing contamination of a semiconductor device due to air gaps and reducing the percentage defects of the semiconductor device during a Pendeo-epitaxy growth process.
摘要翻译：提供了一种外延生长衬底及其制造方法。骨架外延生长衬底包括衬底，在第一方向上形成在衬底上的用于Pendeo-外延生长的多个图案区域，以及至少一个溶液阻挡层，其与多个图案区域接触并在第二个衬底上形成从而防止由于空气间隙而导致的半导体器件的污染，并且在Pendeo-外延生长工艺期间减少半导体器件的缺陷百分比。

9. 发明申请

US20080020552A1 Semiconductor substrates having low defects and methods of manufacturing the same 有权
标题翻译：具有低缺陷的半导体衬底及其制造方法
公开(公告)号：US20080020552A1
公开(公告)日：2008-01-24
申请号：US11802667
申请日：2007-05-24
申请人： Ho-sun Paek , Youn-joon Sung , Kyoung-ho Ha , Joong-kon Son , Sung-nam Lee
发明人： Ho-sun Paek , Youn-joon Sung , Kyoung-ho Ha , Joong-kon Son , Sung-nam Lee
IPC分类号： H01L21/20 , H01L21/00 , H01L31/0256 , H01L33/00
CPC分类号： H01L21/02647 , H01L21/02378 , H01L21/02381 , H01L21/02403 , H01L21/0242 , H01L21/02433 , H01L21/02458 , H01L21/02461 , H01L21/02463 , H01L21/02469 , H01L21/02516 , H01L21/0254 , H01L21/02543 , H01L21/02546 , H01L21/02551 , H01L21/02609 , H01L21/02642 , H01L21/02645
摘要： A semiconductor substrate includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is formed of II-VI-group semiconductor material, III-V-group semiconductor material, or II-VI-group semiconductor material and III-V-group semiconductor material. At least one amorphous region and at least one crystalloid region are formed in the first semiconductor layer. The second semiconductor layer is formed on the first semiconductor layer and is crystal-grown from the at least one crystalloid region. A method of manufacturing a semiconductor substrate includes preparing a growth substrate; crystal-growing the first semiconductor layer on the growth substrate; forming the at least one amorphous region and the at least one crystalloid region in the first semiconductor layer; and forming a second semiconductor layer on the first semiconductor layer using the at least one amorphous region as a mask and the at least one crystalloid region as a seed.
摘要翻译：半导体衬底包括第一半导体层和第二半导体层。第一半导体层由II-VI族半导体材料，III-V族半导体材料或II-VI族半导体材料和III-V族半导体材料形成。在第一半导体层中形成至少一个非晶区域和至少一个晶体区域。第二半导体层形成在第一半导体层上并且从至少一个晶体区域晶体生长。制造半导体衬底的方法包括制备生长衬底; 在生长衬底上晶体生长第一半导体层; 在所述第一半导体层中形成所述至少一个非晶区和所述至少一个晶体区; 以及使用所述至少一个非晶区域作为掩模和所述至少一个晶体区域作为种子在所述第一半导体层上形成第二半导体层。

10. 发明申请

US20060251137A1 Semiconductor laser diode and method for manufacturing the same 失效
标题翻译：半导体激光二极管及其制造方法
公开(公告)号：US20060251137A1
公开(公告)日：2006-11-09
申请号：US11340590
申请日：2006-01-27
申请人： Youn-joon Sung , Tae-hoon Jang
发明人： Youn-joon Sung , Tae-hoon Jang
IPC分类号： H01S5/00
CPC分类号： H01S5/22
摘要： In the semiconductor laser diode, a first material layer, an active layer, and a second material layer are sequentially formed on a substrate, a ridge portion and a first protrusion portion are formed on the second material layer in a direction perpendicular to the active layer, the first protrusion portion being formed at one side of the ridge portion, a second electrode layer is formed in contact with a top surface of the ridge portion, a current restricting layer is formed on an entire surface of the second material layer and exposes the second electrode layer, a protective layer is formed on a surface of the current restricting layer above the first protrusion portion and has an etch selectivity different from that of the current restricting layer, and a bonding metal layer is formed on the current restricting layer and the protective layer in electrical connection with the second electrode layer.
摘要翻译：在半导体激光二极管中，第一材料层，有源层和第二材料层依次形成在基板上，脊部和第一突出部分在垂直于有源层的方向上形成在第二材料层上所述第一突起部分形成在所述脊部的一侧，形成与所述脊部的顶面接触的第二电极层，在所述第二材料层的整个表面上形成限流层，第二电极层，在第一突起部分上方的电流限制层的表面上形成保护层，并且具有不同于电流限制层的蚀刻选择性，并且在电流限制层上形成接合金属层，与第二电极层电连接的保护层。

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