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1. 发明授权

US6134650A Apparatus and method for predicting a first scanned instruction as microcode instruction prior to scanning predecode data 失效
标题翻译：用于在扫描预解码数据之前将第一扫描指令预测为微代码指令的装置和方法
公开(公告)号：US6134650A
公开(公告)日：2000-10-17
申请号：US989262
申请日：1997-12-12
申请人： Gerald D. Zuraski, Jr. , Shane Southard , Mauricio Calle
发明人： Gerald D. Zuraski, Jr. , Shane Southard , Mauricio Calle
IPC分类号： G06F9/38
CPC分类号： G06F9/382 , G06F9/3802
摘要： A superscalar microprocessor predecodes instruction data to identify the boundaries of instructions and the type of instruction. When the cache line is scanned for dispatch, the first scanned instruction is predicted to be a microcode instruction and is dispatched to the MROM unit. A microcode scan circuit uses the location of the first scanned instruction and the functional bits of the predecode data to multiplex instruction specific bytes of the first scanned instruction to the MROM unit. If the first scanned instruction is not the first microcode instruction, then in a subsequent clock cycle, the first microcode instruction is dispatched the MROM unit and the mispredicted instruction is canceled.
摘要翻译：超标量微处理器预处理指令数据以识别指令的边界和指令的类型。当缓存行被扫描发送时，第一个扫描的指令被预测为微码指令，并被发送到MROM单元。微代码扫描电路使用第一扫描指令的位置和预解码数据的功能位将第一扫描指令的指令特定字节复用到MROM单元。如果第一扫描指令不是第一微代码指令，则在随后的时钟周期中，第一微代码指令被分配到MROM单元，并且取消了误预测指令。

2. 发明授权

US5890006A Apparatus for extracting instruction specific bytes from an instruction 失效
标题翻译：用于从指令中提取指令特定字节的装置
公开(公告)号：US5890006A
公开(公告)日：1999-03-30
申请号：US989794
申请日：1997-12-12
申请人： Thang M. Tran , Mauricio Calle , Shane Southard
发明人： Thang M. Tran , Mauricio Calle , Shane Southard
IPC分类号： G06F9/30 , G06F9/318 , G06F9/38 , G06F13/00
CPC分类号： G06F9/3017 , G06F9/30145 , G06F9/3842
摘要： A superscalar microprocessor predecodes instruction data to identify the boundaries of instructions and the type of instruction. In one embodiment, to expedite the dispatch of instructions, the first microcode instruction of the cache line is identified during predecode and stored as a microcode pointer. When the cache line is scanned for dispatch, the microcode pointer is used to identify the first microcode instruction which is conveyed to the MROM unit. In another embodiment, the first scanned instruction is predicted to be a microcode instruction and is dispatched to the MROM unit. A microcode scan circuit uses the microcode pointer and the functional bits of the predecode data to multiplex instruction specific bytes of the first microcode instruction to the MROM unit. If the predicted first microcode instruction is not the actual first microcode instruction, then in a subsequent clock cycle, the actual microcode instruction is dispatched the MROM unit and the incorrectly predicted microcode instruction is canceled.
摘要翻译：超标量微处理器预处理指令数据以识别指令的边界和指令的类型。在一个实施例中，为了加快指令的分派，在预解码期间识别高速缓存行的第一微代码指令，并将其存储为微代码指针。当缓存行被扫描以进行调度时，微代码指针用于识别被传送到MROM单元的第一微代码指令。在另一个实施例中，预测第一扫描指令是微代码指令，并且被调度到MROM单元。微代码扫描电路使用微代码指针和预解码数据的功能位将第一微代码指令的指令特定字节复用到MROM单元。如果预测的第一微代码指令不是实际的第一微代码指令，则在随后的时钟周期中，实际的微代码指令被分派到MROM单元，并且错误地预测的微代码指令被取消。

3. 发明授权

US6061775A Apparatus and method for predicting a first microcode instruction of a cache line and using predecode instruction data to identify instruction boundaries and types 失效
标题翻译：用于预测高速缓存行的第一微代码指令并使用预解码指令数据来识别指令边界和类型的装置和方法
公开(公告)号：US6061775A
公开(公告)日：2000-05-09
申请号：US989793
申请日：1997-12-12
申请人： Thang M. Tran , Mauricio Calle , Shane Southard
发明人： Thang M. Tran , Mauricio Calle , Shane Southard
IPC分类号： G06F9/30 , G06F9/38 , G06F13/00
CPC分类号： G06F9/382 , G06F9/30145 , G06F9/30152 , G06F9/3816 , G06F9/3836 , G06F9/384 , G06F9/3855 , G06F9/3857
摘要： A superscalar microprocessor predecodes instruction data to identify the boundaries of instructions and the type of instruction. To expedite the dispatch of instructions, when a cache line is scanned, the first scanned instruction is predicted to be a microcode instruction and is dispatched to the MROM unit. A microcode scan circuit uses the microcode pointer and the functional bits of the predecode data to multiplex instruction specific bytes of the first microcode instruction to the MROM unit. If the predicted first microcode instruction is not the actual first microcode instruction, then in a subsequent clock cycle, the actual microcode instruction is dispatched the MROM unit and the incorrectly predicted microcode instruction is canceled.
摘要翻译：超标量微处理器预处理指令数据以识别指令的边界和指令的类型。为了加快指令的发送，当扫描高速缓存行时，第一扫描指令被预测为微代码指令并且被调度到MROM单元。微代码扫描电路使用微代码指针和预解码数据的功能位将第一微代码指令的指令特定字节复用到MROM单元。如果预测的第一微代码指令不是实际的第一微代码指令，则在随后的时钟周期中，实际的微代码指令被分派到MROM单元，并且错误地预测的微代码指令被取消。

4. 发明授权

US6148393A Apparatus for generating a valid mask 失效
标题翻译：用于产生有效掩模的装置
公开(公告)号：US6148393A
公开(公告)日：2000-11-14
申请号：US041316
申请日：1998-03-12
申请人： Thang M. Tran , Rammohan Narayan , Shane Southard
发明人： Thang M. Tran , Rammohan Narayan , Shane Southard
IPC分类号： G06F7/76 , G06F9/30 , G06F9/308 , G06F9/38 , G06F9/28
CPC分类号： G06F9/382 , G06F7/764 , G06F9/30018 , G06F9/30149 , G06F9/30152 , G06F9/3802 , G06F9/3853 , G06F2207/3872
摘要： A valid mask generator comprising a series of mask generation blocks. Each block generates a predetermined number of valid mask bits given a predetermined number of start pointer bits and end bits, wherein said predetermined number of valid mask bits generated by each block is less than the total number of bits in the valid mask. The series of mask generation blocks may be connected in series, wherein each block outputs a carry-out signal, and wherein each block receives the carry-out signal from the node before it as a carry-in signal. A method for generating a valid mask from a start pointer and a plurality of end bits is also contemplated.
摘要翻译：包括一系列掩码生成块的有效掩码生成器。每个块产生给定预定数量的开始指针位和结束位的预定数量的有效屏蔽位，其中由每个块产生的所述预定数量的有效屏蔽位小于有效掩码中的总位数。一系列掩模生成块可以串联连接，其中每个块输出进位输出信号，并且其中每个块在作为进位输入信号之前从该节点接收进位输出信号。也可以考虑从开始指针和多个结束比特生成有效掩码的方法。

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