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1. 发明授权

US06396745B1 Vertical two-transistor flash memory 有权
标题翻译：垂直双晶体管闪存
公开(公告)号：US06396745B1
公开(公告)日：2002-05-28
申请号：US09783868
申请日：2001-02-15
申请人： Gary Hong , Hwi-Huang Chen , Wen-Chi Ting
发明人： Gary Hong , Hwi-Huang Chen , Wen-Chi Ting
IPC分类号： G11C700
CPC分类号： G11C16/3427 , G11C16/0433 , H01L29/42324 , H01L29/7883
摘要： In present invention we provide a vertical two-transistor memory cell consisted of a MOS transistor and an ETOX cell. One of the drain or source of the MOS transistor is connected to the control gate of the ETOX cell, the other is acted as the control gate of the vertical two-transistor memory cell and is connected to a control line. And the gate of the MOS transistor is acted as the select gate of the vertical two-transistor memory cell and is connected to a word line. The drain of ETOX cell is connected to a bit line, and the source of ETOX cell is grounded. The vertical two-transistor memory cell can be programmed by channel Fowler-Nordheim tunneling of electrons which is injected from the substrate through the channel and tunnel oxide into the floating gate. Such memory cell can avoid the word line disturb by controlling the word line. The memory cell can be also erased by channel Fowler-Nordheim tunneling, in which the electrons is withdrawn from the floating gate through the tunnel oxide and channel to the substrate. In addition, the vertical two-transistor memory cell can be also programmed by conventional methods such as hot electron injection and drain Fowler-Nordheim tunneling, and can be also erased by negative gate source erase or drain Fowler-Nordheim tunneling erase.
摘要翻译：在本发明中，我们提供了由MOS晶体管和ETOX单元组成的垂直双晶体管存储单元。 MOS晶体管的漏极或源极之一连接到ETOX单元的控制栅极，另一个作为垂直双晶体管存储单元的控制栅极并连接到控制线。并且MOS晶体管的栅极用作垂直双晶体管存储单元的选择栅极并连接到字线。 ETOX电池的漏极连接到位线，ETOX电池的源极接地。垂直双晶体管存储单元可以通过通道Fowler-Nordheim隧道进行编程，电子从基板通过沟道注入并将隧道氧化物注入浮栅。这样的存储单元可以通过控制字线来避免字线干扰。还可以通过通道Fowler-Nordheim隧道擦除存储单元，其中电子通过隧道氧化物和通道从浮栅取出到衬底。此外，垂直双晶体管存储单元也可以通过诸如热电子注入和漏极Fowler-Nordheim隧道的常规方法进行编程，并且还可以通过负栅极源擦除或漏极Fowler-Nordheim隧道擦除来擦除。

2. 发明申请

US20050132549A1 Method for making metal capacitors with low leakage currents for mixed-signal devices 审中-公开
标题翻译：混合信号器件制造漏电流低的金属电容器的方法
公开(公告)号：US20050132549A1
公开(公告)日：2005-06-23
申请号：US10853459
申请日：2004-05-25
申请人： Wong-Cheng Shih , Wen-Chi Ting , Tzyh-Cheang Lee , Chih-Hsien Lin , Shyh-Chyi Wong
发明人： Wong-Cheng Shih , Wen-Chi Ting , Tzyh-Cheang Lee , Chih-Hsien Lin , Shyh-Chyi Wong
IPC分类号： H01L21/02 , H01L21/316 , H01G9/00
CPC分类号： H01L28/40 , H01L21/31604 , H01L28/56 , Y10T29/43 , Y10T29/435
摘要： A method for making metal-insulator-metal (MIM) capacitors having insulators with high-dielectric-constant and sandwiched between wide-band-gap insulators resulting in low leakage currents and high capacitance per unit area is achieved. The high-k layer increases the capacitance per unit area for next generation mixed-signal devices while the wide-band-gap insulators reduce leakage currents. In a second embodiment, a multilayer of different high-k materials is formed between the wide-band-gap insulators to substantially increase the capacitance per unit area. The layer materials and thicknesses are optimized to reduce the nonlinear capacitance dependence on voltage.
摘要翻译：实现了制造具有高介电常数绝缘体并夹在宽带隙绝缘体之间的金属绝缘体金属（MIM）电容器的方法，导致低漏电流和每单位面积的高电容。高k层增加下一代混合信号器件的单位面积电容，而宽带绝缘子减少泄漏电流。在第二实施例中，在宽带绝缘体之间形成不同的高k材料的多层以大大增加每单位面积的电容。优化了层材料和厚度，以减少非线性电容对电压的依赖性。

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