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1. 发明申请

US20080092137A1 METHOD AND SYSTEM FOR MANAGING PERIPHERAL CONNECTION WAKEUP IN A PROCESSING SYSTEM SUPPORTING MULTIPLE VIRTUAL MACHINES 有权
标题翻译：用于管理支持多台虚拟机的处理系统中的外围连接唤醒的方法和系统
公开(公告)号：US20080092137A1
公开(公告)日：2008-04-17
申请号：US11962068
申请日：2007-12-20
申请人： Gary Anderson , Hoa Nguyen , Thoi Nguyen
发明人： Gary Anderson , Hoa Nguyen , Thoi Nguyen
IPC分类号： G06F9/455
CPC分类号： G06F1/3209
摘要： A method and system for managing peripheral connection wakeup signaling in a processing system supporting multiple virtual machines provides a mechanism by which ownership of a peripheral having system wakeup capability is transferred between virtual machines. The power management event signal is connected to a service processor input that in turn signals a hypervisor to direct the wakeup activity to a particular logical partition in which the virtual machine was last executing. The hypervisor can then determine whether or not to wake up the entire system, or portions thereof and can direct the power management event to the appropriate virtual machine. In particular the peripheral may be an Ethernet adapter supporting Wake-On-LAN capability. State initialization, which is typically ensured by system power cycling is provided instead by controlling power to the standby power source or in some instances by forcing an indication of a disconnect/reconnect of the wakeup signaling connection.
摘要翻译：用于在支持多个虚拟机的处理系统中管理外围连接唤醒信令的方法和系统提供了一种机制，通过该机制，具有系统唤醒能力的外围设备的所有权在虚拟机之间传送。电源管理事件信号连接到服务处理器输入，该服务处理器输入又传送信号管理程序以将唤醒活动引导到虚拟机最后执行的特定逻辑分区。管理程序然后可以确定是否唤醒整个系统或其部分，并且可以将电源管理事件引导到适当的虚拟机。特别地，外设可以是支持Wake-On-LAN功能的以太网适配器。通过系统功率循环确保的状态初始化是通过控制待机电源的电源，或者在某些情况下通过强制唤醒信令连接的断开/重新连接的指示来提供的。

2. 发明申请

US20060036877A1 Method and system for managing peripheral connection wakeup in a processing system supporting multiple virtual machines 有权
标题翻译：在支持多个虚拟机的处理系统中管理外围连接唤醒的方法和系统
公开(公告)号：US20060036877A1
公开(公告)日：2006-02-16
申请号：US10916974
申请日：2004-08-12
申请人： Gary Anderson , Hoa Nguyen , Thoi Nguyen
发明人： Gary Anderson , Hoa Nguyen , Thoi Nguyen
IPC分类号： G06F1/26
CPC分类号： G06F1/3209
摘要： A method and system for managing peripheral connection wakeup signaling in a processing system supporting multiple virtual machines provides a mechanism by which ownership of a peripheral having system wakeup capability is transferred between virtual machines. The power management event signal is connected to a service processor input that in turn signals a hypervisor to direct the wakeup activity to a particular logical partition in which the virtual machine was last executing. The hypervisor can then determine whether or not to wake up the entire system, or portions thereof and can direct the power management event to the appropriate virtual machine. In particular the peripheral may be an Ethernet adapter supporting Wake-On-LAN capability. State initialization, which is typically ensured by system power cycling is provided instead by controlling power to the standby power source or in some instances by forcing an indication of a disconnect/reconnect of the wakeup signaling connection.
摘要翻译：用于在支持多个虚拟机的处理系统中管理外围连接唤醒信令的方法和系统提供了一种机制，通过该机制，具有系统唤醒能力的外围设备的所有权在虚拟机之间传送。电源管理事件信号连接到服务处理器输入，该服务处理器输入又传送信号管理程序以将唤醒活动引导到虚拟机最后执行的特定逻辑分区。管理程序然后可以确定是否唤醒整个系统或其部分，并且可以将电源管理事件引导到适当的虚拟机。特别地，外设可以是支持Wake-On-LAN功能的以太网适配器。通过系统功率循环确保的状态初始化是通过控制待机电源的电源，或者在某些情况下通过强制唤醒信令连接的断开/重新连接的指示来提供的。

3. 发明授权

US07734444B2 Systems and arrangements to assess thermal performance 有权
标题翻译：评估热性能的系统和安排
公开(公告)号：US07734444B2
公开(公告)日：2010-06-08
申请号：US11937710
申请日：2007-11-09
申请人： Ronald Xavier Arroyo , Kenneth A. Bird , William A. Ciarfella , Bret Peter Elison , Gary Franklin Goth , Terrance Wayne Kueper , Thoi Nguyen , Roger Donell Weekly
发明人： Ronald Xavier Arroyo , Kenneth A. Bird , William A. Ciarfella , Bret Peter Elison , Gary Franklin Goth , Terrance Wayne Kueper , Thoi Nguyen , Roger Donell Weekly
IPC分类号： G01K17/00
CPC分类号： G01K7/425 , H01L23/34 , H01L2224/16225 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/1305 , H01L2924/13091 , H01L2924/15311 , H01L2924/16251 , H01L2924/3011 , H01L2924/00 , H01L2224/0401
摘要： Systems and arrangements to assess the thermal performance of a thermal solution based upon the ability of a device under test (DUT) to operate in accordance with electrical performance criteria are contemplated. Embodiments may include a tester to couple with the DUT to determine an operating junction temperature. In some embodiments, the measured junction temperature may be the operating junction temperature anticipated for the DUT in a customer installation. In other embodiments, the tester may comprise logic to calculate a projected, operating junction temperature based upon the measured junction temperature and known differences between the tester and a customer installation. Upon determining the operating junction temperature for the DUT at the customer installation, the operating junction temperature is compared against a maximum junction temperature for proper operation of the DUT. Advantageously, the maximum junction temperature may be varied based upon the project objective for a line of DUTs.
摘要翻译：考虑到基于被测设备（DUT）根据电气性能标准进行操作的能力来评估热解决方案的热性能的系统和布置。实施例可以包括与DUT耦合以确定操作结温度的测试器。在一些实施例中，测量的结温度可以是客户安装中DUT的预期的工作结温。在其他实施例中，测试器可以包括基于测量的结温度和测试仪与客户安装之间的已知差异来计算投影的工作结温度的逻辑。在客户安装中确定DUT的工作结温后，将工作结温与最大结温进行比较，以便DUT的正常工作。有利的是，最大结温度可以基于DUT线的项目目标而变化。

4. 发明申请

US20060263912A1 Systems and arrangements to assess thermal performance 有权
标题翻译：评估热性能的系统和安排
公开(公告)号：US20060263912A1
公开(公告)日：2006-11-23
申请号：US11133427
申请日：2005-05-19
申请人： Ronald Arroyo , Kenneth Bird , William Ciarfella , Bret Elison , Gary Goth , Terrance Kueper , Thoi Nguyen , Roger Weekly
发明人： Ronald Arroyo , Kenneth Bird , William Ciarfella , Bret Elison , Gary Goth , Terrance Kueper , Thoi Nguyen , Roger Weekly
IPC分类号： H01L21/66 , G01N25/68 , G01N25/00 , G01K15/00
CPC分类号： G01K7/425 , H01L23/34 , H01L2224/16225 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/1305 , H01L2924/13091 , H01L2924/15311 , H01L2924/16251 , H01L2924/3011 , H01L2924/00 , H01L2224/0401
摘要： Systems and arrangements to assess the thermal performance of a thermal solution based upon the ability of a device under test (DUT) to operate in accordance with electrical performance criteria are contemplated. Embodiments may include a tester to couple with the DUT to determine an operating junction temperature. In some embodiments, the measured junction temperature may be the operating junction temperature anticipated for the DUT in a customer installation. In other embodiments, the tester may comprise logic to calculate a projected, operating junction temperature based upon the measured junction temperature and known differences between the tester and a customer installation. Upon determining the operating junction temperature for the DUT at the customer installation, the operating junction temperature is compared against a maximum junction temperature for proper operation of the DUT. Advantageously, the maximum junction temperature may be varied based upon the project objective for a line of DUTs.
摘要翻译：考虑到基于被测设备（DUT）根据电气性能标准进行操作的能力来评估热解决方案的热性能的系统和布置。实施例可以包括与DUT耦合以确定操作结温度的测试器。在一些实施例中，测量的结温度可以是客户安装中DUT的预期的工作结温。在其他实施例中，测试器可以包括基于测量的结温度和测试仪与客户安装之间的已知差异来计算投影的工作结温度的逻辑。在客户安装中确定DUT的工作结温后，将工作结温与最大结温进行比较，以便DUT的正常工作。有利的是，最大结温度可以基于DUT线的项目目标而变化。

5. 发明授权

US5768550A Bus interface logic system 失效
标题翻译：总线接口逻辑系统
公开(公告)号：US5768550A
公开(公告)日：1998-06-16
申请号：US560758
申请日：1995-11-21
申请人： Mark Edward Dean , Thoi Nguyen
发明人： Mark Edward Dean , Thoi Nguyen
IPC分类号： G06F15/16 , G06F13/36 , G06F13/38 , G06F13/40 , G06F15/177 , G06F13/00
CPC分类号： G06F13/36 , G06F13/4027
摘要： A system and method of synchronizing data transfers between two processors having different bus transactions by providing a buffer for storing the data and a control logic for dividing a concurrent address and data bus transactions into an address bus transaction followed by a data bus transaction. During a read operation, the requesting device is forced to wait for data availability before entering the data bus transaction. During a write operation, the data bus transaction is delayed by using a storage mechanism that effectively separates the address transaction from the data transaction. The present invention also provides direct memory access fly-by operations between an input/output device and a memory device. These operations are accomplished by isolating a secondary bus from the system bus and allowing the destination device to capture the requested data as soon as it is available on the system bus.
摘要翻译：一种通过提供用于存储数据的缓冲器和用于将并发地址和数据总线事务划分为地址总线事务以及数据总线事务的控制逻辑来同步具有不同总线事务的两个处理器之间的数据传输的系统和方法。在读取操作期间，请求设备在进入数据总线事务之前被迫等待数据可用性。在写入操作期间，通过使用有效地将地址事务与数据事务分离的存储机制来延迟数据总线事务。本发明还提供了在输入/输出设备和存储设备之间的直接存储器访问飞越操作。这些操作通过将二次总线与系统总线隔离并允许目标设备在系统总线上可用时捕获所请求的数据来实现。

6. 发明授权

US4641148A Thermal printhead with ribbon exit guide 失效
标题翻译：带打印头的热敏打印头
公开(公告)号：US4641148A
公开(公告)日：1987-02-03
申请号：US793597
申请日：1985-10-31
申请人： Stanley Dyer , James J. Molloy , Thoi Nguyen , David M. Riherd , William F. Voit, Jr. , Donald L. West
发明人： Stanley Dyer , James J. Molloy , Thoi Nguyen , David M. Riherd , William F. Voit, Jr. , Donald L. West
IPC分类号： B41J2/325 , B41J35/06 , G01D15/10
CPC分类号： B41J35/06 , B41J2/325
摘要： A wear-resistant ribbon guide surface (11 or 25a, 25b) is added to a thermal printhead (1) to lower the ribbon exit angle after printing or to shift the ribbon exit position away from the printing. The angle past that surface remains large enough for visibility of prior printing. The modification of exit conditions makes the printing darker and significantly improves printhead life.
摘要翻译：将耐磨色带引导表面（11或25a，25b）添加到热打印头（1），以降低打印后的色带出口角度或使色带出口位置远离打印。超过该表面的角度保持足够大，以便可以预先印刷。退出条件的修改使打印更深，显着提高了打印头的使用寿命。

7. 发明申请

US20080112456A1 Systems and Arrangements to Assess Thermal Performance 有权
标题翻译：评估热性能的系统和安排
公开(公告)号：US20080112456A1
公开(公告)日：2008-05-15
申请号：US11937710
申请日：2007-11-09
申请人： Ronald Xavier Arroyo , Kenneth A. Bird , William A. Ciarfella , Bret Peter Elison , Gary Franklin Goth , Terrance Wayne Kueper , Thoi Nguyen , Roger Donell Weekly
发明人： Ronald Xavier Arroyo , Kenneth A. Bird , William A. Ciarfella , Bret Peter Elison , Gary Franklin Goth , Terrance Wayne Kueper , Thoi Nguyen , Roger Donell Weekly
IPC分类号： G01N25/00
CPC分类号： G01K7/425 , H01L23/34 , H01L2224/16225 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/1305 , H01L2924/13091 , H01L2924/15311 , H01L2924/16251 , H01L2924/3011 , H01L2924/00 , H01L2224/0401
摘要： Systems and arrangements to assess the thermal performance of a thermal solution based upon the ability of a device under test (DUT) to operate in accordance with electrical performance criteria are contemplated. Embodiments may include a tester to couple with the DUT to determine an operating junction temperature. In some embodiments, the measured junction temperature may be the operating junction temperature anticipated for the DUT in a customer installation. In other embodiments, the tester may comprise logic to calculate a projected, operating junction temperature based upon the measured junction temperature and known differences between the tester and a customer installation. Upon determining the operating junction temperature for the DUT at the customer installation, the operating junction temperature is compared against a maximum junction temperature for proper operation of the DUT. Advantageously, the maximum junction temperature may be varied based upon the project objective for a line of DUTs.
摘要翻译：考虑到基于被测设备（DUT）根据电气性能标准进行操作的能力来评估热解决方案的热性能的系统和布置。实施例可以包括与DUT耦合以确定操作结温度的测试器。在一些实施例中，测量的结温度可以是客户安装中DUT的预期的工作结温。在其他实施例中，测试器可以包括基于测量的结温度和测试仪与客户安装之间的已知差异来计算投影的工作结温度的逻辑。在客户安装中确定DUT的工作结温后，将工作结温与最大结温进行比较，以便DUT的正常工作。有利的是，最大结温度可以基于DUT线的项目目标而变化。

8. 发明授权

US07338818B2 Systems and arrangements to assess thermal performance 有权
标题翻译：评估热性能的系统和安排
公开(公告)号：US07338818B2
公开(公告)日：2008-03-04
申请号：US11133427
申请日：2005-05-19
申请人： Ronald Xavier Arroyo , Kenneth A. Bird , William A. Ciarfella , Bret Peter Elison , Gary Franklin Goth , Terrance Wayne Kueper , Thoi Nguyen , Roger Donell Weekly
发明人： Ronald Xavier Arroyo , Kenneth A. Bird , William A. Ciarfella , Bret Peter Elison , Gary Franklin Goth , Terrance Wayne Kueper , Thoi Nguyen , Roger Donell Weekly
IPC分类号： H01L21/66
CPC分类号： G01K7/425 , H01L23/34 , H01L2224/16225 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/1305 , H01L2924/13091 , H01L2924/15311 , H01L2924/16251 , H01L2924/3011 , H01L2924/00 , H01L2224/0401
摘要： Systems and arrangements to assess the thermal performance of a thermal solution based upon the ability of a device under test (DUT) to operate in accordance with electrical performance criteria are contemplated. Embodiments may include a tester to couple with the DUT to determine an operating junction temperature. In some embodiments, the measured junction temperature may be the operating junction temperature anticipated for the DUT in a customer installation. In other embodiments, the tester may comprise logic to calculate a projected, operating junction temperature based upon the measured junction temperature and known differences between the tester and a customer installation. Upon determining the operating junction temperature for the DUT at the customer installation, the operating junction temperature is compared against a maximum junction temperature for proper operation of the DUT. Advantageously, the maximum junction temperature may be varied based upon the project objective for a line of DUTs.
摘要翻译：考虑到基于被测设备（DUT）根据电气性能标准进行操作的能力来评估热解决方案的热性能的系统和布置。实施例可以包括与DUT耦合以确定操作结温度的测试器。在一些实施例中，测量的结温度可以是客户安装中DUT的预期的工作结温。在其他实施例中，测试器可以包括基于测量的结温度和测试仪与客户安装之间的已知差异来计算投影的工作结温度的逻辑。在客户安装中确定DUT的工作结温后，将工作结温与最大结温进行比较，以便DUT的正常工作。有利的是，最大结温度可以基于DUT线的项目目标而变化。

9. 发明授权

US06496911B1 Apparatus for memory bus tuning and methods therefor 有权
标题翻译：用于存储器总线调谐的装置及其方法
公开(公告)号：US06496911B1
公开(公告)日：2002-12-17
申请号：US09165954
申请日：1998-10-02
申请人： Robert Christopher Dixon , Thoi Nguyen , Tuan Hoang Nguyen
发明人： Robert Christopher Dixon , Thoi Nguyen , Tuan Hoang Nguyen
IPC分类号： G06F1200
CPC分类号： G06F13/4239 , G06F13/4072
摘要： An apparatus and method for memory bus tuning are implemented. A plurality of drivers having a plurality of selectable drive levels are coupled to a memory bus. The memory bus is connected to a memory device which may have a variable amount of memory, which may be in the form of dual-in-line memory modules (DIMM). A drive level is selected in response to a determination of the amount of memory included in the memory device. A register operable for receiving a data value corresponding to the amount of memory is coupled to the drivers, the drive level being selected thereby.
摘要翻译：实现用于存储器总线调谐的装置和方法。具有多个可选驱动电平的多个驱动器耦合到存储器总线。存储器总线连接到可能具有可变量的存储器的存储器件，存储器可以是双列直插存储器模块（DIMM）的形式。响应于确定包括在存储器件中的存储器的量来选择驱动器电平。可操作用于接收与存储器量相对应的数据值的寄存器耦合到驱动器，从而选择驱动级。

10. 发明授权

US6055600A Method and apparatus for detecting the presence and identification of level two cache modules 失效
标题翻译：用于检测二级缓存模块的存在和识别的方法和装置
公开(公告)号：US6055600A
公开(公告)日：2000-04-25
申请号：US772046
申请日：1996-12-19
申请人： Thoi Nguyen , Richard Nicholas Iachetta, Jr. , Yashwant Sakarchand Kothari , Allan Rowe Steel , Keith Alan Cox
发明人： Thoi Nguyen , Richard Nicholas Iachetta, Jr. , Yashwant Sakarchand Kothari , Allan Rowe Steel , Keith Alan Cox
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0897
摘要： A method and apparatus for detecting and identifying the attributes of level-2 (L2) memory cache modules in a computer system. An ID Module is attached to each L2 cache memory module containing memory attribute information such as size, presence or absence of parity, synchronous or asynchronous access ability, electrical timing, etc. The information is accessible using a parallel or serial interface.
摘要翻译：一种用于在计算机系统中检测和识别级别2（L2）存储器高速缓存模块的属性的方法和装置。 ID模块连接到每个L2高速缓冲存储器模块，其中包含存储器属性信息，如大小，存在或不存在奇偶校验，同步或异步访问能力，电时间等。该信息可使用并行或串行接口访问。

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