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1. 发明授权

US08370577B2 Metaphysically addressed cache metadata 有权
标题翻译：形而上学的缓存元数据
公开(公告)号：US08370577B2
公开(公告)日：2013-02-05
申请号：US12493165
申请日：2009-06-26
申请人： Gad Sheaffer , David Callahan , Jan Gray , Ali-Reza Adl-Tabatabai , Shlomo Raikin
发明人： Gad Sheaffer , David Callahan , Jan Gray , Ali-Reza Adl-Tabatabai , Shlomo Raikin
IPC分类号： G06F12/00
CPC分类号： G06F17/30997 , G06F12/0802 , G06F12/109
摘要： Storing metadata that is disjoint from corresponding data by storing the metadata to the same address as the corresponding data but in a different address space. A metadata store instruction includes a storage address for the metadata. The storage address is the same address as that for data corresponding to the metadata, but the storage address when used for the metadata is implemented in a metadata address space while the storage address, when used for the corresponding data is implemented in a different data address space. As a result of executing the metadata store instruction, the metadata is stored at the storage address. A metadata load instruction includes the storage address for the metadata. As a result of executing the metadata load instruction, the metadata stored at the address is received. Some embodiments may further implement a metadata clear instruction which clears any entries in the metadata address space.
摘要翻译：通过将元数据存储到与相应数据相同的地址但在不同的地址空间中，存储与相应数据不相关的元数据。元数据存储指令包括元数据的存储地址。存储地址与对应于元数据的数据的地址相同，但是当用于元数据的存储地址被实现在元数据地址空间中，而当用于相应数据的存储地址被实现在不同的数据地址空间。作为执行元数据存储指令的结果，元数据被存储在存储地址处。元数据加载指令包括元数据的存储地址。作为执行元数据加载指令的结果，接收存储在地址处的元数据。一些实施例可以进一步实现清除元数据地址空间中的任何条目的元数据清除指令。

2. 发明申请

US20100332716A1 METAPHYSICALLY ADDRESSED CACHE METADATA 有权
标题翻译：特别地址缓存元数据
公开(公告)号：US20100332716A1
公开(公告)日：2010-12-30
申请号：US12493165
申请日：2009-06-26
申请人： Gad Sheaffer , David Callahan , Jan Gray , Ali-Reza Adl-Tabatabai , Shlomo Raikin
发明人： Gad Sheaffer , David Callahan , Jan Gray , Ali-Reza Adl-Tabatabai , Shlomo Raikin
IPC分类号： G06F12/08 , G06F17/30 , G06F12/00 , G06F12/02
CPC分类号： G06F17/30997 , G06F12/0802 , G06F12/109
摘要： Storing metadata that is disjoint from corresponding data by storing the metadata to the same address as the corresponding data but in a different address space. A metadata store instruction includes a storage address for the metadata. The storage address is the same address as that for data corresponding to the metadata, but the storage address when used for the metadata is implemented in a metadata address space while the storage address, when used for the corresponding data is implemented in a different data address space. As a result of executing the metadata store instruction, the metadata is stored at the storage address. A metadata load instruction includes the storage address for the metadata. As a result of executing the metadata load instruction, the metadata stored at the address is received. Some embodiments may further implement a metadata clear instruction which clears any entries in the metadata address space.
摘要翻译：通过将元数据存储到与相应数据相同的地址但在不同的地址空间中，存储与相应数据不相关的元数据。元数据存储指令包括元数据的存储地址。存储地址与对应于元数据的数据的地址相同，但是当用于元数据的存储地址被实现在元数据地址空间中，而当用于相应数据的存储地址被实现在不同的数据地址空间。作为执行元数据存储指令的结果，元数据被存储在存储地址处。元数据加载指令包括元数据的存储地址。作为执行元数据加载指令的结果，接收存储在地址处的元数据。一些实施例可以进一步实现清除元数据地址空间中的任何条目的元数据清除指令。

3. 发明授权

US08812796B2 Private memory regions and coherence optimizations 有权
标题翻译：私人记忆区域和一致性优化
公开(公告)号：US08812796B2
公开(公告)日：2014-08-19
申请号：US12493164
申请日：2009-06-26
申请人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai
发明人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F9/46
CPC分类号： G06F12/0835 , G06F9/467 , G06F12/0811 , G06F12/0831 , G06F2209/521
摘要： Private or shared read-only memory regions. One embodiment may be practiced in a computing environment including a plurality of agents. A method includes acts for declaring one or more memory regions private to a particular agent or shared read only amongst agents by having software utilize processor level instructions to specify to hardware the private or shared read only memory address regions. The method includes an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents. As a result of an agent executing a processor level instruction to specify one or more memory regions as private to the agent or shared read-only amongst a plurality of agents, a hardware component monitoring the one or more memory regions for conflicting accesses or prevents conflicting accesses on the one or more memory regions.
摘要翻译：专用或共享只读存储器区域。一个实施例可以在包括多个代理的计算环境中实践。一种方法包括通过使软件利用处理器级指令向硬件指定私有或共享的只读存储器地址区域来将用于声明特定代理私有的一个或多个存储器区域或仅在代理之间共享的操作。该方法包括执行处理器级别指令的代理，以指定对代理私有的一个或多个存储器区域或者在多个代理之间共享只读。作为代理执行处理器级别指令的结果，所述处理器级指令指定一个或多个存储器区域对于所述代理是专用的，或者在多个代理之间共享为只读存储器区域，硬件组件监视所述一个或多个存储器区域以进行冲突访问或防止冲突访问一个或多个存储器区域。

4. 发明申请

US20100332721A1 OPERATING SYSTEM VIRTUAL MEMORY MANAGEMENT FOR HARDWARE TRANSACTIONAL MEMORY 有权
标题翻译：操作系统硬件事务存储器虚拟内存管理
公开(公告)号：US20100332721A1
公开(公告)日：2010-12-30
申请号：US12493161
申请日：2009-06-26
申请人： Koichi Yamada , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Landy Wang , Martin Taillefer , Arun Kishan , David Callahan , Jan Gray , Vadim Bassin
发明人： Koichi Yamada , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Landy Wang , Martin Taillefer , Arun Kishan , David Callahan , Jan Gray , Vadim Bassin
IPC分类号： G06F12/08
CPC分类号： G06F12/1045 , G06F12/0815
摘要： Operating system virtual memory management for hardware transactional memory. A method may be performed in a computing environment where an application running on a first hardware thread has been in a hardware transaction, with transactional memory hardware state in cache entries correlated by memory hardware when data is read from or written to data cache entries. The data cache entries are correlated to physical addresses in a first physical page mapped from a first virtual page in a virtual memory page table. The method includes an operating system deciding to unmap the first virtual page. As a result, the operating system removes the mapping of the first virtual page to the first physical page from the virtual memory page table. As a result, the operating system performs an action to discard transactional memory hardware state for at least the first physical page. Embodiments may further suspend hardware transactions in kernel mode. Embodiments may further perform soft page fault handling without aborting a hardware transaction, resuming the hardware transaction upon return to user mode, and even successfully committing the hardware transaction.
摘要翻译：硬件事务内存的操作系统虚拟内存管理。可以在运行在第一硬件线程上的应用程序已经处于硬件事务中的计算环境中执行一种方法，当数据从数据高速缓存条目读取或写入数据高速缓存条目时，高速缓存条目中的事务性存储器硬件状态由存储器硬件相关联。数据高速缓存条目与从虚拟存储器页表中的第一虚拟页面映射的第一物理页面中的物理地址相关联。该方法包括决定取消映射第一虚拟页面的操作系统。结果，操作系统从虚拟存储器页表移除第一虚拟页面到第一物理页面的映射。结果，操作系统执行至少第一物理页丢弃事务存储器硬件状态的动作。实施例可以进一步挂起内核模式下的硬件事务。实施例可以进一步执行软页错误处理，而不中止硬件事务，在返回到用户模式时恢复硬件事务，甚至成功地提交硬件事务。

5. 发明申请

US20110145516A1 USING BUFFERED STORES OR MONITORING TO FILTER REDUNDANT TRANSACTIONAL ACCESSES AND MECHANISMS FOR MAPPING DATA TO BUFFERED METADATA 有权
标题翻译：使用缓冲存储器或监视过滤冗余交易访问和将数据映射到缓冲元数据的机制
公开(公告)号：US20110145516A1
公开(公告)日：2011-06-16
申请号：US12638098
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
发明人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
IPC分类号： G06F12/00
CPC分类号： G06F9/522 , G06F8/458 , G06F9/52 , G06F11/3471 , G06F2201/865 , G06F2201/87
摘要： A method and apparatus for accelerating a Software Transactional Memory (STM) system is herein described. A data object and metadata for the data object may each be associated with a filter, such as a hardware monitor or ephemerally held filter information. The filter is in a first, default state when no access, such as a read, from the data object has occurred during a pendancy of a transaction. Upon encountering a first access to the metadata, such as a first read, access barrier operations, such as logging of the metadata; setting a read monitor; or updating ephemeral filter information with an ephemeral/buffered store operation, are performed. Upon a subsequent/redundant access to the metadata, such as a second read, access barrier operations are elided to accelerate the subsequent access based on the filter being set to the second state to indicate a previous access occurred. Additionally, mapping of data objects to ephemeral information may be provided by software, such as through a pointer to the ephemeral information associated with the data object; an offset from a base address of the data object to the ephemeral information included associated with the data object; an index into a segment containing the ephemeral information associated with the data object; mapping the data object to the ephemeral information utilizing address arithmetic; and a hash that maps the data object to ephemeral information.
摘要翻译：这里描述了用于加速软件事务存储器（STM）系统的方法和装置。数据对象和数据对象的元数据可以分别与诸如硬件监视器或者瞬时保持的过滤器信息的过滤器相关联。过滤器处于第一个默认状态，当事务的挂起期间没有发生来自数据对象的访问，例如读取。在遇到元数据的首次访问时，例如第一读取，访问屏障操作，诸如记录元数据; 设置一个读取监视器; 或者用临时/缓冲存储操作来更新临时过滤器信息。在对诸如第二读取的元数据的后续/冗余访问（例如第二读取）时，消除访问屏障操作以基于被设置为第二状态的过滤器来加速后续访问，以指示先前的访问发生。另外，数据对象到短暂信息的映射可以由软件提供，例如通过指向与数据对象相关联的短暂信息的指针; 从数据对象的基地址到包括与数据对象相关联的临时信息的偏移; 指向包含与数据对象相关联的短暂信息的段的索引; 使用地址算术将数据对象映射到临时信息; 以及将数据对象映射到临时信息的散列。

6. 发明申请

US20100332753A1 WAIT LOSS SYNCHRONIZATION 有权
标题翻译：等待丢失同步
公开(公告)号：US20100332753A1
公开(公告)日：2010-12-30
申请号：US12493163
申请日：2009-06-26
申请人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
发明人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
IPC分类号： G06F12/02 , G06F1/32 , G06F12/08
CPC分类号： G06F12/0831 , G06F1/3225
摘要： Synchronizing threads on loss of memory access monitoring. Using a processor level instruction included as part of an instruction set architecture for a processor, a read, or write monitor to detect writes, or reads or writes respectively from other agents on a first set of one or more memory locations and a read, or write monitor on a second set of one or more different memory locations are set. A processor level instruction is executed, which causes the processor to suspend executing instructions and optionally to enter a low power mode pending loss of a read or write monitor for the first or second set of one or more memory locations. A conflicting access is detected on the first or second set of one or more memory locations or a timeout is detected. As a result, the method includes resuming execution of instructions.
摘要翻译：在内存访问监控丢失时同步线程。使用处理器级指令作为处理器，读取或写入监视器的指令集体系结构的一部分而被包括，以分别从第一组一个或多个存储器位置和读取的或其他存储器位置的其他代理检测写入或读取或写入设置在第二组一个或多个不同存储单元上的写监视器。执行处理器级指令，这使得处理器暂停执行指令，并且可选地进入低功率模式，等待丢失第一或第二组一个或多个存储器位置的读或写监视器。在一个或多个存储器位置的第一或第二组上检测到冲突的访问，或者检测到超时。结果，该方法包括恢复指令的执行。

7. 发明申请

US20100218195A1 Software filtering in a transactional memory system 有权
标题翻译：事务存储系统中的软件过滤
公开(公告)号：US20100218195A1
公开(公告)日：2010-08-26
申请号：US12653471
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
发明人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
IPC分类号： G06F9/46
CPC分类号： G06F9/522 , G06F8/458 , G06F9/467
摘要： A method and apparatus for utilizing hardware mechanisms of a transactional memory system is herein described. Various embodiments relate to software-based filtering of operations from read and write barriers and read isolation barriers during transactional execution. Other embodiments relate to software-implemented read barrier processing to accelerate strong atomicity. Other embodiments are also described and claimed.
摘要翻译：这里描述了一种利用事务存储器系统的硬件机制的方法和装置。各种实施例涉及在事务执行期间从读写障碍和读隔离屏障的基于软件的操作过滤。其他实施例涉及软件实现的读屏障处理以加速强原子性。还描述和要求保护其他实施例。

8. 发明授权

US08719514B2 Software filtering in a transactional memory system 有权
标题翻译：事务存储系统中的软件过滤
公开(公告)号：US08719514B2
公开(公告)日：2014-05-06
申请号：US12653471
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
发明人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
IPC分类号： G06F13/00
CPC分类号： G06F9/522 , G06F8/458 , G06F9/467
摘要： A method and apparatus for utilizing hardware mechanisms of a transactional memory system is herein described. Various embodiments relate to software-based filtering of operations from read and write barriers and read isolation barriers during transactional execution. Other embodiments relate to software-implemented read barrier processing to accelerate strong atomicity. Other embodiments are also described and claimed.
摘要翻译：这里描述了一种利用事务存储器系统的硬件机制的方法和装置。各种实施例涉及在事务执行期间从读写障碍和读隔离屏障的基于软件的操作过滤。其他实施例涉及软件实现的读屏障处理以加速强原子性。还描述和要求保护其他实施例。

9. 发明授权

US08688951B2 Operating system virtual memory management for hardware transactional memory 有权
标题翻译：硬件事务内存的操作系统虚拟内存管理
公开(公告)号：US08688951B2
公开(公告)日：2014-04-01
申请号：US13554558
申请日：2012-07-20
申请人： Koichi Yamada , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Landy Wang , Martin Taillefer , Arun Kishan , David Callahan , Jan Gray , Vadim Bassin
发明人： Koichi Yamada , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Landy Wang , Martin Taillefer , Arun Kishan , David Callahan , Jan Gray , Vadim Bassin
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F9/26 , G06F9/34 , G06F9/455 , G06F9/46
CPC分类号： G06F12/1045 , G06F12/0815
摘要： Operating system virtual memory management for hardware transactional memory. A system includes an operating system deciding to unmap a first virtual page. As a result, the operating system removes the mapping of the first virtual page to the first physical page from the virtual memory page table. As a result, the operating system performs an action to discard transactional memory hardware state for at least the first physical page. Embodiments may further suspend hardware transactions in kernel mode. Embodiments may further perform soft page fault handling without aborting a hardware transaction, resuming the hardware transaction upon return to user mode, and even successfully committing the hardware transaction.
摘要翻译：硬件事务内存的操作系统虚拟内存管理。系统包括决定取消映射第一虚拟页面的操作系统。结果，操作系统从虚拟存储器页表移除第一虚拟页面到第一物理页面的映射。结果，操作系统执行至少第一物理页丢弃事务存储器硬件状态的动作。实施例可以进一步挂起内核模式下的硬件事务。实施例可以进一步执行软页错误处理，而不中止硬件事务，在返回到用户模式时恢复硬件事务，甚至成功地提交硬件事务。

10. 发明授权

US08521995B2 Handling operating system (OS) transitions in an unbounded transactional memory (UTM) mode 有权
标题翻译：以无界事务内存（UTM）模式处理操作系统（OS）转换
公开(公告)号：US08521995B2
公开(公告)日：2013-08-27
申请号：US12638064
申请日：2009-12-15
申请人： Koichi Yamada , Gad Sheaffer , Jan Gray , Landy Wang , Martin Taillefer , Arun Kishan , Ali-Reza Adl-Tabatabai , David Callahan
发明人： Koichi Yamada , Gad Sheaffer , Jan Gray , Landy Wang , Martin Taillefer , Arun Kishan , Ali-Reza Adl-Tabatabai , David Callahan
IPC分类号： G06F13/14
CPC分类号： G06F9/3834 , G06F9/30076 , G06F9/3836 , G06F9/3851 , G06F9/3857 , G06F9/3861 , G06F9/461 , G06F9/467 , G06F9/4812 , G06F2209/481
摘要： A method includes receiving control in a kernel mode via a ring transition from a user thread during execution of an unbounded transactional memory (UTM) transaction, updating a state of a transaction status register (TSR) associated with the user thread and storing the TSR with a context of the user thread, and later restoring the context during a transition from the kernel mode to the user thread. In this way, the UTM transaction may continue on resumption of the user thread.
摘要翻译：一种方法包括：在执行无界事务存储器（UTM）事务期间，通过来自用户线程的环转移接收控制，更新与用户线程相关联的事务状态寄存器（TSR）的状态并将TSR与用户线程的上下文，然后在从内核模式到用户线程的转换期间恢复上下文。以这种方式，UTM事务可以继续恢复用户线程。

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