专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20110145516A1 USING BUFFERED STORES OR MONITORING TO FILTER REDUNDANT TRANSACTIONAL ACCESSES AND MECHANISMS FOR MAPPING DATA TO BUFFERED METADATA 有权
标题翻译：使用缓冲存储器或监视过滤冗余交易访问和将数据映射到缓冲元数据的机制
公开(公告)号：US20110145516A1
公开(公告)日：2011-06-16
申请号：US12638098
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
发明人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
IPC分类号： G06F12/00
CPC分类号： G06F9/522 , G06F8/458 , G06F9/52 , G06F11/3471 , G06F2201/865 , G06F2201/87
摘要： A method and apparatus for accelerating a Software Transactional Memory (STM) system is herein described. A data object and metadata for the data object may each be associated with a filter, such as a hardware monitor or ephemerally held filter information. The filter is in a first, default state when no access, such as a read, from the data object has occurred during a pendancy of a transaction. Upon encountering a first access to the metadata, such as a first read, access barrier operations, such as logging of the metadata; setting a read monitor; or updating ephemeral filter information with an ephemeral/buffered store operation, are performed. Upon a subsequent/redundant access to the metadata, such as a second read, access barrier operations are elided to accelerate the subsequent access based on the filter being set to the second state to indicate a previous access occurred. Additionally, mapping of data objects to ephemeral information may be provided by software, such as through a pointer to the ephemeral information associated with the data object; an offset from a base address of the data object to the ephemeral information included associated with the data object; an index into a segment containing the ephemeral information associated with the data object; mapping the data object to the ephemeral information utilizing address arithmetic; and a hash that maps the data object to ephemeral information.
摘要翻译：这里描述了用于加速软件事务存储器（STM）系统的方法和装置。数据对象和数据对象的元数据可以分别与诸如硬件监视器或者瞬时保持的过滤器信息的过滤器相关联。过滤器处于第一个默认状态，当事务的挂起期间没有发生来自数据对象的访问，例如读取。在遇到元数据的首次访问时，例如第一读取，访问屏障操作，诸如记录元数据; 设置一个读取监视器; 或者用临时/缓冲存储操作来更新临时过滤器信息。在对诸如第二读取的元数据的后续/冗余访问（例如第二读取）时，消除访问屏障操作以基于被设置为第二状态的过滤器来加速后续访问，以指示先前的访问发生。另外，数据对象到短暂信息的映射可以由软件提供，例如通过指向与数据对象相关联的短暂信息的指针; 从数据对象的基地址到包括与数据对象相关联的临时信息的偏移; 指向包含与数据对象相关联的短暂信息的段的索引; 使用地址算术将数据对象映射到临时信息; 以及将数据对象映射到临时信息的散列。

2. 发明授权

US09280397B2 Using buffered stores or monitoring to filter redundant transactional accesses and mechanisms for mapping data to buffered metadata 有权
标题翻译：使用缓冲存储或监视来过滤冗余事务访问和机制，用于将数据映射到缓冲元数据
公开(公告)号：US09280397B2
公开(公告)日：2016-03-08
申请号：US12638098
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
发明人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
IPC分类号： G06F12/00 , G06F9/52 , G06F9/45 , G06F11/34
CPC分类号： G06F9/522 , G06F8/458 , G06F9/52 , G06F11/3471 , G06F2201/865 , G06F2201/87
摘要： A method and apparatus for accelerating a Software Transactional Memory (STM) system is herein described. A data object and metadata for the data object may each be associated with a filter, such as a hardware monitor or ephemerally held filter information. The filter is in a first, default state when no access, such as a read, from the data object has occurred during a pendancy of a transaction. Upon encountering a first access to the metadata, such as a first read, access barrier operations, such as logging of the metadata; setting a read monitor; or updating ephemeral filter information with an ephemeral/buffered store operation, are performed. Upon a subsequent/redundant access to the metadata, such as a second read, access barrier operations are elided to accelerate the subsequent access based on the filter being set to the second state to indicate a previous access occurred. Additionally, mapping of data objects to ephemeral information may be provided by software, such as through a pointer to the ephemeral information associated with the data object; an offset from a base address of the data object to the ephemeral information included associated with the data object; an index into a segment containing the ephemeral information associated with the data object; mapping the data object to the ephemeral information utilizing address arithmetic; and a hash that maps the data object to ephemeral information.
摘要翻译：这里描述了用于加速软件事务存储器（STM）系统的方法和装置。数据对象和数据对象的元数据可以分别与诸如硬件监视器或者瞬时保持的过滤器信息的过滤器相关联。过滤器处于第一个默认状态，当事务的挂起期间没有发生来自数据对象的访问，例如读取。在遇到元数据的首次访问时，例如第一读取，访问屏障操作，诸如记录元数据; 设置一个读取监视器; 或者用临时/缓冲存储操作来更新临时过滤器信息。在对诸如第二读取的元数据的后续/冗余访问（例如第二读取）时，消除访问屏障操作以基于被设置为第二状态的过滤器来加速后续访问，以指示先前的访问发生。另外，数据对象到短暂信息的映射可以由软件提供，例如通过指向与数据对象相关联的短暂信息的指针; 从数据对象的基地址到包括与数据对象相关联的临时信息的偏移; 指向包含与数据对象相关联的短暂信息的段的索引; 使用地址算术将数据对象映射到临时信息; 以及将数据对象映射到临时信息的散列。

3. 发明申请

US20100332753A1 WAIT LOSS SYNCHRONIZATION 有权
标题翻译：等待丢失同步
公开(公告)号：US20100332753A1
公开(公告)日：2010-12-30
申请号：US12493163
申请日：2009-06-26
申请人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
发明人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
IPC分类号： G06F12/02 , G06F1/32 , G06F12/08
CPC分类号： G06F12/0831 , G06F1/3225
摘要： Synchronizing threads on loss of memory access monitoring. Using a processor level instruction included as part of an instruction set architecture for a processor, a read, or write monitor to detect writes, or reads or writes respectively from other agents on a first set of one or more memory locations and a read, or write monitor on a second set of one or more different memory locations are set. A processor level instruction is executed, which causes the processor to suspend executing instructions and optionally to enter a low power mode pending loss of a read or write monitor for the first or second set of one or more memory locations. A conflicting access is detected on the first or second set of one or more memory locations or a timeout is detected. As a result, the method includes resuming execution of instructions.
摘要翻译：在内存访问监控丢失时同步线程。使用处理器级指令作为处理器，读取或写入监视器的指令集体系结构的一部分而被包括，以分别从第一组一个或多个存储器位置和读取的或其他存储器位置的其他代理检测写入或读取或写入设置在第二组一个或多个不同存储单元上的写监视器。执行处理器级指令，这使得处理器暂停执行指令，并且可选地进入低功率模式，等待丢失第一或第二组一个或多个存储器位置的读或写监视器。在一个或多个存储器位置的第一或第二组上检测到冲突的访问，或者检测到超时。结果，该方法包括恢复指令的执行。

4. 发明申请

US20100218195A1 Software filtering in a transactional memory system 有权
标题翻译：事务存储系统中的软件过滤
公开(公告)号：US20100218195A1
公开(公告)日：2010-08-26
申请号：US12653471
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
发明人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
IPC分类号： G06F9/46
CPC分类号： G06F9/522 , G06F8/458 , G06F9/467
摘要： A method and apparatus for utilizing hardware mechanisms of a transactional memory system is herein described. Various embodiments relate to software-based filtering of operations from read and write barriers and read isolation barriers during transactional execution. Other embodiments relate to software-implemented read barrier processing to accelerate strong atomicity. Other embodiments are also described and claimed.
摘要翻译：这里描述了一种利用事务存储器系统的硬件机制的方法和装置。各种实施例涉及在事务执行期间从读写障碍和读隔离屏障的基于软件的操作过滤。其他实施例涉及软件实现的读屏障处理以加速强原子性。还描述和要求保护其他实施例。

5. 发明授权

US08719514B2 Software filtering in a transactional memory system 有权
标题翻译：事务存储系统中的软件过滤
公开(公告)号：US08719514B2
公开(公告)日：2014-05-06
申请号：US12653471
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
发明人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
IPC分类号： G06F13/00
CPC分类号： G06F9/522 , G06F8/458 , G06F9/467
摘要： A method and apparatus for utilizing hardware mechanisms of a transactional memory system is herein described. Various embodiments relate to software-based filtering of operations from read and write barriers and read isolation barriers during transactional execution. Other embodiments relate to software-implemented read barrier processing to accelerate strong atomicity. Other embodiments are also described and claimed.
摘要翻译：这里描述了一种利用事务存储器系统的硬件机制的方法和装置。各种实施例涉及在事务执行期间从读写障碍和读隔离屏障的基于软件的操作过滤。其他实施例涉及软件实现的读屏障处理以加速强原子性。还描述和要求保护其他实施例。

6. 发明授权

US08489864B2 Performing escape actions in transactions 有权
标题翻译：在交易中执行逃生动作
公开(公告)号：US08489864B2
公开(公告)日：2013-07-16
申请号：US12493167
申请日：2009-06-26
申请人： Gad Sheaffer , Jan Gray , Martin Taillefer , Ali-Reza Adl-Tabatabai , Bratin Saha , Vadim Bassin , Robert Y. Geva , David Callahan
发明人： Gad Sheaffer , Jan Gray , Martin Taillefer , Ali-Reza Adl-Tabatabai , Bratin Saha , Vadim Bassin , Robert Y. Geva , David Callahan
IPC分类号： G06F15/00 , G06F7/38 , G06F9/00 , G06F9/44
CPC分类号： G06F9/467 , G06F9/30087 , G06F9/3834 , G06F9/3859
摘要： Performing non-transactional escape actions within a hardware based transactional memory system. A method includes at a hardware thread on a processor beginning a hardware based transaction for the thread. Without committing or aborting the transaction, the method further includes suspending the hardware based transaction and performing one or more operations for the thread, non-transactionally and not affected by: transaction monitoring and buffering for the transaction, an abort for the transaction, or a commit for the transaction. After performing one or more operations for the thread, non-transactionally, the method further includes resuming the transaction and performing additional operations transactionally. After performing the additional operations, the method further includes either committing or aborting the transaction.
摘要翻译：在基于硬件的事务内存系统中执行非事务性转义操作。一种方法包括处理器上的硬件线程，开始针对线程的基于硬件的事务。所述方法还包括暂停所述基于硬件的事务并对所述线程执行非事务性的一个或多个操作，并且不受以下事务的影响：所述事务的事务监视和缓冲，所述事务的中止或者所述事务的中止提交交易。在对线程执行一个或多个操作之后，非事务性地，该方法还包括恢复事务并事务地执行附加操作。执行附加操作后，该方法还包括提交或中止事务。

7. 发明授权

US08161247B2 Wait loss synchronization 有权
标题翻译：等待丢失同步
公开(公告)号：US08161247B2
公开(公告)日：2012-04-17
申请号：US12493163
申请日：2009-06-26
申请人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
发明人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F1/00 , G06F1/26 , G06F1/32 , G06F9/46
CPC分类号： G06F12/0831 , G06F1/3225
摘要： Synchronizing threads on loss of memory access monitoring. Using a processor level instruction included as part of an instruction set architecture for a processor, a read, or write monitor to detect writes, or reads or writes respectively from other agents on a first set of one or more memory locations and a read, or write monitor on a second set of one or more different memory locations are set. A processor level instruction is executed, which causes the processor to suspend executing instructions and optionally to enter a low power mode pending loss of a read or write monitor for the first or second set of one or more memory locations. A conflicting access is detected on the first or second set of one or more memory locations or a timeout is detected. As a result, the method includes resuming execution of instructions.
摘要翻译：在内存访问监控丢失时同步线程。使用处理器级指令作为处理器，读取或写入监视器的指令集体系结构的一部分而被包括，以分别从第一组一个或多个存储器位置和读取的或其他存储器位置的其他代理检测写入或读取或写入设置在第二组一个或多个不同存储单元上的写监视器。执行处理器级指令，这使得处理器暂停执行指令，并且可选地进入低功率模式，等待丢失第一或第二组一个或多个存储器位置的读或写监视器。在一个或多个存储器位置的第一或第二组上检测到冲突的访问，或者检测到超时。结果，该方法包括恢复指令的执行。

8. 发明授权

US09069670B2 Mechanisms to accelerate transactions using buffered stores 有权
公开(公告)号：US09069670B2
公开(公告)日：2015-06-30
申请号：US13658212
申请日：2012-10-23
申请人： Ali-Reza Adl-Tabatabai , Yang Ni , Bratin Saha , Vadim Bassin , Gad Sheaffer , David Callahan , Jan Gray
发明人： Ali-Reza Adl-Tabatabai , Yang Ni , Bratin Saha , Vadim Bassin , Gad Sheaffer , David Callahan , Jan Gray
IPC分类号： G06F12/08 , G06F9/46 , G06F12/10 , G06F9/52 , G06F9/30
CPC分类号： G06F12/0811 , G06F9/3004 , G06F9/30087 , G06F9/466 , G06F9/467 , G06F9/52 , G06F12/0815 , G06F12/0831 , G06F12/0833 , G06F12/1027 , G06F2212/621
摘要： In one embodiment, the present invention includes a method for executing a transactional memory (TM) transaction in a first thread, buffering a block of data in a first buffer of a cache memory of a processor, and acquiring a write monitor on the block to obtain ownership of the block at an encounter time in which data at a location of the block in the first buffer is updated. Other embodiments are described and claimed.

9. 发明申请

US20130046947A1 Mechanisms To Accelerate Transactions Using Buffered Stores 有权
公开(公告)号：US20130046947A1
公开(公告)日：2013-02-21
申请号：US13658360
申请日：2012-10-23
申请人： Ali-Reza Adl-Tabatabai , Yang Ni , Bratin Saha , Vadim Bassin , Gad Sheaffer , David Callahan , Jan Gray
发明人： Ali-Reza Adl-Tabatabai , Yang Ni , Bratin Saha , Vadim Bassin , Gad Sheaffer , David Callahan , Jan Gray
IPC分类号： G06F12/16
CPC分类号： G06F12/0811 , G06F9/3004 , G06F9/30087 , G06F9/466 , G06F9/467 , G06F9/52 , G06F12/0815 , G06F12/0831 , G06F12/0833 , G06F12/1027 , G06F2212/621
摘要： In one embodiment, the present invention includes a method for executing a transactional memory (TM) transaction in a first thread, buffering a block of data in a first buffer of a cache memory of a processor, and acquiring a write monitor on the block to obtain ownership of the block at an encounter time in which data at a location of the block in the first buffer is updated. Other embodiments are described and claimed.

10. 发明授权

US08316194B2 Mechanisms to accelerate transactions using buffered stores 有权
标题翻译：使用缓冲存储加速事务的机制
公开(公告)号：US08316194B2
公开(公告)日：2012-11-20
申请号：US12638054
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , Yang Ni , Bratin Saha , Vadim Bassin , Gad Sheaffer , David Callahan , Jan Gray
发明人： Ali-Reza Adl-Tabatabai , Yang Ni , Bratin Saha , Vadim Bassin , Gad Sheaffer , David Callahan , Jan Gray
IPC分类号： G06F12/00 , G06F12/08 , G06F12/16
CPC分类号： G06F12/0811 , G06F9/3004 , G06F9/30087 , G06F9/466 , G06F9/467 , G06F9/52 , G06F12/0815 , G06F12/0831 , G06F12/0833 , G06F12/1027 , G06F2212/621
摘要： In one embodiment, the present invention includes a method for executing a transactional memory (TM) transaction in a first thread, buffering a block of data in a first buffer of a cache memory of a processor, and acquiring a write monitor on the block to obtain ownership of the block at an encounter time in which data at a location of the block in the first buffer is updated. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括一种用于在第一线程中执行事务性存储器（TM）事务的方法，缓冲处理器的高速缓冲存储器的第一缓冲器中的数据块，并且获取所述块上的写监视器在第一缓冲器中的块的位置处的数据被更新的遇到时间获得块的所有权。描述和要求保护其他实施例。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式