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1. 发明授权

US07219252B1 Apparatus and method for dynamic overclocking 有权
标题翻译：动态超频的设备和方法
公开(公告)号：US07219252B1
公开(公告)日：2007-05-15
申请号：US10888470
申请日：2004-07-09
申请人： Gabriel Li , Chwei-Po Chew , Johnson Tsai
发明人： Gabriel Li , Chwei-Po Chew , Johnson Tsai
IPC分类号： G06F1/08
CPC分类号： G06F1/08
摘要： According to embodiments of the invention, temperature, current, or other physical quantities associated with an integrated circuit, which can also include a processor, may be converted to a digital signal, and that digital signal used to choose a corresponding frequency offset that is added to any pre-established overclocking frequency. Embodiments of the invention allow a user to specify a dynamic range between which the frequency offset is bounded during overclocking of the integrated circuit. The programmable lower limit specifies the frequency where the integrated circuit begins to overclock. The programmable upper limit specifies the maximum overclocking frequency that is allowed. Setting the lower limit to be equal to the upper limit forces overclocking to occur at only the specified value.
摘要翻译：根据本发明的实施例，与集成电路相关联的温度，电流或其他物理量（其也可以包括处理器）可以被转换为数字信号，并且该数字信号用于选择相应的频率偏移量到任何预先建立的超频频率。本发明的实施例允许用户在集成电路的超频期间指定频率偏移界定的动态范围。可编程下限指定集成电路开始超频的频率。可编程上限指定允许的最大超频频率。将下限设置为等于上限强制超频仅在指定值发生。

2. 发明授权

US06831352B1 Semiconductor package for high frequency performance 失效
标题翻译：半导体封装，用于高频性能
公开(公告)号：US06831352B1
公开(公告)日：2004-12-14
申请号：US09425503
申请日：1999-10-22
申请人： Johnson Tsai
发明人： Johnson Tsai
IPC分类号： H01L23495
CPC分类号： H01L23/49575 , H01L23/49503 , H01L23/49531 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49171 , H01L2224/49175 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H01L2924/00014 , H01L2924/00 , H01L2924/00015 , H01L2924/00012
摘要： An improved lead frame structure for use in a semiconductor package, including: a plurality of leads; a paddle structure electrically isolated from the leads, the paddle structure including at least one lower paddle section having a first top surface to which a die may be attached, at least one mesa section disposed proximate the paddle section and having a second top surface disposed at a different elevation than the first top surface, the lower paddle section and the mesa section being joined by a wall section; and a plurality of tie bars attached to the paddle structure for supporting the paddle structure; whereby contact pads of a die attached to the first top surface may be electrically connected to the second top surface and to the leads prior to encapsulation thereof. A plurality of tie bars extends from opposite edges of the paddle structure, the tie bars providing for stabilizing the paddle structure during package fabrication.
摘要翻译：一种用于半导体封装的改进的引线框架结构，包括：多个引线; 桨形结构，其包括至少一个下部桨叶部分，该下部叶片部分具有第一顶部表面，模具可附接到该第一顶部表面，至少一个台面部分设置在桨叶部分附近，并且具有设置在第二顶部表面上的第二顶部表面与第一顶面不同的高度，下叶片部分和台面部分通过壁部分连接; 以及附接到所述桨结构以用于支撑所述桨结构的多个连杆; 由此附接到第一顶表面的管芯的接触垫可以在其封装之前电连接到第二顶表面和引线。多个连杆从桨结构的相对边缘延伸，连接杆提供在包装制造期间稳定桨结构。

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