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    • 4. 发明授权
    • Integrated process for copper via filling using a magnetron and target producing highly energetic ions
    • 通过使用磁控管进行填充的铜的集成工艺和产生高能离子的靶
    • US06277249B1
    • 2001-08-21
    • US09518180
    • 2000-03-02
    • Praburam GopalrajaJianming FuFusen ChenGirish DixitZheng XuSankaram AthreyaWei D. WangAshok K. Sinha
    • Praburam GopalrajaJianming FuFusen ChenGirish DixitZheng XuSankaram AthreyaWei D. WangAshok K. Sinha
    • C23C1435
    • H01L21/76844C23C14/35H01J37/3405H01J37/342H01J37/3423H01J37/3455H01J37/3458H01L21/2855H01L21/76805H01L21/76843H01L21/76862H01L21/76865H01L21/76873H01L2221/1089
    • A target and magnetron for a plasma sputter reactor. The target has an annular trough facing the wafer to be sputter coated. Various types of magnetic means positioned around the trough create a magnetic field supporting a plasma extending over a large volume of the trough. For example, the magnetic means may include magnets disposed on one side within a radially inner wall of the trough and on another side outside of a radially outer wall of the trough to create a magnetic field extending across the trough, to thereby support a high-density plasma extending from the top to the bottom of the trough. The large plasma volume increases the probability that the sputtered metal atoms will become ionized. The magnetic means may include a magnetic coil, may include additional magnets in back of the trough top wall to increase sputtering there, and may include confinement magnets near the bottom of the trough sidewalls. The magnets in back of the top wall may have an outer magnet surrounding an inner magnet of the opposite polarity. The high aspect ratio of the trough also reduces asymmetry in coating the sidewalls of a deep hole at the edge of the wafer. An integrated copper via filling process includes a first step of highly ionized sputter deposition of copper, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and electroplating copper into the hole to complete the metallization.
    • 用于等离子体溅射反应器的靶和磁控管。 目标具有面向待溅射涂覆的晶片的环形槽。 位于槽周围的各种磁性装置形成一个支撑等离子体的磁场,该等离子体延伸在大容积的槽上。 例如,磁性装置可以包括设置在槽的径向内壁中的一侧上并且在槽的径向外壁外侧的另一侧上的磁体,以产生延伸穿过槽的磁场, 密度等离子体从槽的顶部延伸到底部。 大的等离子体体积增加了溅射的金属原子将被电离的可能性。 磁性装置可以包括磁性线圈,可以在槽顶壁的后面包括另外的磁体,以在那里增加溅射,并且可以包括靠近槽侧壁底部的约束磁体。 顶壁后面的磁体可以具有围绕相反极性的内磁体的外磁体。 槽的高纵横比也降低了在晶片边缘涂覆深孔侧壁的不对称性。 集成的铜通孔填充工艺包括铜的高度电离溅射沉积的第一步骤,更中性的,更低能量的溅射沉积铜以完成种子层的第二步骤,以及将铜电镀到孔中以完成金属化。
    • 9. 发明授权
    • Method for forming local interconnect for integrated circuits
    • 用于形成集成电路局部互连的方法
    • US5391520A
    • 1995-02-21
    • US139268
    • 1993-10-18
    • Fusen ChenFu-Tai LiouGirish Dixit
    • Fusen ChenFu-Tai LiouGirish Dixit
    • H01L21/28H01L21/3205H01L21/768H01L23/52H01L23/532H01L21/283H01L21/302
    • H01L23/53257H01L21/76889H01L2924/0002Y10S148/019Y10S257/915
    • A method for fabrication of local interconnects in an integrated circuit, and an integrated circuit formed according to the same, is disclosed. According to the disclosed embodiment, a first and a second conductive structure are formed over the integrated circuit. An insulating layer is formed over the integrated. A first photoresist layer is formed over the insulating layer, patterned and developed. The insulating layer is etched to expose selected regions of the first and second conductive structures. A refractory metal layer is formed over the integrated circuit. A barrier layer is formed over the refractory metal layer, and optionally a refractory metal silicide layer is formed over the barrier layer. A second photoresist layer is formed over the barrier layer, patterned and developed. The refractory metal layer and barrier layer, and the refractory metal silicide layer if formed, are etched to define a conductive interconnect between the exposed selected regions of the first and second conductive structures.
    • 公开了一种用于制造集成电路中的局部互连的方法,以及根据该集成电路形成的集成电路。 根据所公开的实施例,在集成电路上形成第一和第二导电结构。 在整合上形成绝缘层。 第一光致抗蚀剂层形成在绝缘层上,被图案化和显影。 蚀刻绝缘层以暴露第一和第二导电结构的选定区域。 在集成电路上形成难熔金属层。 在耐火金属层之上形成阻挡层,并且可选地在阻挡层上形成难熔金属硅化物层。 第二光致抗蚀剂层形成在阻挡层上,被图案化和显影。 难熔金属层和阻挡层以及如果形成的难熔金属硅化物层被蚀刻以在第一和第二导电结构的暴露的选定区域之间限定导电互连。