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    • 1. 发明申请
    • Debugging system and method for use with software breakpoint
    • 用于软件断点的调试系统和方法
    • US20070220334A1
    • 2007-09-20
    • US11354340
    • 2006-02-14
    • Frode PedersenAndreas Engh-HalstvedtErik RennoAre Arseth
    • Frode PedersenAndreas Engh-HalstvedtErik RennoAre Arseth
    • G06F11/00
    • G06F11/2236G06F11/3648
    • Methods and systems are provided for debugging a program executing on a processor. In a first implementation, a processing system includes a processor configured for switching to a debug mode from a non-debug mode upon executing a software breakpoint. The system may include a program memory configured to hold instructions for a program, where the software breakpoint replaces at least one of the instructions. The system may also include an instruction replacement register separate from the program memory that is configured to receive the replaced instruction from any of the processor and an external debugger. The system may further include a control component that controls whether the processor fetches a next instruction for execution from the program memory or from the instruction replacement register.
    • 提供了用于调试在处理器上执行的程序的方法和系统。 在第一实现中,处理系统包括处理器,其被配置为在执行软件断点时从非调试模式切换到调试模式。 该系统可以包括被配置为保存用于程序的指令的程序存储器,其中软件断点替换指令中的至少一个。 系统还可以包括与程序存储器分离的指令替换寄存器,其被配置为从任何处理器和外部调试器接收替换的指令。 该系统还可以包括控制组件,该控制组件控制处理器是否从程序存储器或从指令替换寄存器获取用于执行的下一个指令。
    • 2. 发明授权
    • Debugging system and method for use with software breakpoint
    • 用于软件断点的调试系统和方法
    • US07506205B2
    • 2009-03-17
    • US11354340
    • 2006-02-14
    • Frode Milch PedersenAndreas Engh-HalstvedtErik Knutsen RennoAre Arseth
    • Frode Milch PedersenAndreas Engh-HalstvedtErik Knutsen RennoAre Arseth
    • G06F11/00
    • G06F11/2236G06F11/3648
    • Methods and systems are provided for debugging a program executing on a processor. In a first implementation, a processing system includes a processor configured for switching to a debug mode from a non-debug mode upon executing a software breakpoint. The system may include a program memory configured to hold instructions for a program, where the software breakpoint replaces at least one of the instructions. The system may also include an instruction replacement register separate from the program memory that is configured to receive the replaced instruction from any of the processor and an external debugger. The system may further include a control component that controls whether the processor fetches a next instruction for execution from the program memory or from the instruction replacement register.
    • 提供了用于调试在处理器上执行的程序的方法和系统。 在第一实现中,处理系统包括处理器,其被配置为在执行软件断点时从非调试模式切换到调试模式。 该系统可以包括被配置为保存用于程序的指令的程序存储器,其中软件断点替换指令中的至少一个。 系统还可以包括与程序存储器分离的指令替换寄存器,其被配置为从任何处理器和外部调试器接收替换的指令。 该系统还可以包括控制组件,该控制组件控制处理器是否从程序存储器或从指令替换寄存器获取用于执行的下一个指令。
    • 3. 发明授权
    • Mechanism for storing and extracting trace information using internal memory in micro controllers
    • 在微控制器中使用内部存储器存储和提取跟踪信息的机制
    • US08219855B2
    • 2012-07-10
    • US12616655
    • 2009-11-11
    • Frode PedersenAre Arseth
    • Frode PedersenAre Arseth
    • G06F11/00
    • G06F11/3636
    • This document relates to apparatus and methods to store and retrieve trace information in on-chip system memory of microcontrollers. A microcontroller comprises a microprocessor and a memory device accessible through a data bus and an address bus coupled to the microprocessor. The microcontroller includes on-chip debug logic coupled to the microprocessor. Trace data can be retrieved from system memory using a debug port of the debug logic. A system in accordance with the present invention will lower the cost of implementation of trace features in microcontrollers, and strongly reduce the cost of supporting such features in debug tools.
    • 本文件涉及在微控制器的片上系统存储器中存储和检索跟踪信息的装置和方法。 微控制器包括微处理器和通过数据总线和耦合到微处理器的地址总线可访问的存储器件。 微控制器包括耦合到微处理器的片上调试逻辑。 可以使用调试逻辑的调试端口从系统内存中检索跟踪数据。 根据本发明的系统将降低在微控制器中实现跟踪特征的成本,并且大大降低了在调试工具中支持这些特征的成本。
    • 4. 发明申请
    • Mechanism for storing and extracting trace information using internal memory in microcontrollers
    • 在微控制器中使用内部存储器存储和提取跟踪信息的机制
    • US20060277435A1
    • 2006-12-07
    • US11148049
    • 2005-06-07
    • Frode PedersenAre Arseth
    • Frode PedersenAre Arseth
    • G06F11/00
    • G06F11/3636
    • It is the object of the present invention to provide a mechanism to store and retrieve trace information in on-chip system memory of microcontrollers. A microcontroller comprises a microprocessor and a memory device accessible through a data bus and an address bus coupled to the microprocessor. The microcontroller includes on-chip debug logic coupled to the microprocessor. The on-chip debug logic includes a low speed debug port and a mechanism for temporarily storing trace data on the memory, wherein the trace data can be retrieved via the low speed debug port by a debug tool. A method and system in accordance with the present invention will lower the cost of implementation of trace features in microcontrollers, and strongly reduce the cost of supporting such features in debug tools.
    • 本发明的目的是提供一种在微控制器的片上系统存储器中存储和检索跟踪信息的机制。 微控制器包括微处理器和通过数据总线和耦合到微处理器的地址总线可访问的存储器件。 微控制器包括耦合到微处理器的片上调试逻辑。 片上调试逻辑包括一个低速调试端口和一个临时存储跟踪数据在存储器上的机制,其中跟踪数据可以通过调试工具通过低速调试端口检索。 根据本发明的方法和系统将降低在微控制器中实现跟踪特征的成本,并且大大降低了在调试工具中支持这些特征的成本。