专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20050138348A1 Method and apparatus for remote modifcation of system configuration 有权
标题翻译：用于远程修改系统配置的方法和装置
公开(公告)号：US20050138348A1
公开(公告)日：2005-06-23
申请号：US10747319
申请日：2003-12-23
申请人： Frederick Bolay , Rajeev Nalawadi
发明人： Frederick Bolay , Rajeev Nalawadi
IPC分类号： G06F9/445 , G06F1/24
CPC分类号： G06F9/44505 , G06F8/60
摘要： A method and apparatus for updating the system configuration settings of a computer system Embodiments include a remote system configuration system that enables a user to update the system configuration of a target machine from a server machine over a network or similar communications system. Another embodiment includes a system configuration method using a bus master device to write system configuration data into a target computer system.
摘要翻译：一种用于更新计算机系统的系统配置设置的方法和装置实施例包括使得用户能够通过网络或类似通信系统从服务器机器更新目标机器的系统配置的远程系统配置系统。另一实施例包括使用总线主设备将系统配置数据写入目标计算机系统的系统配置方法。

2. 发明申请

US20050138256A1 Method and apparatus for processing hot key input using operating system visible interrupt handling 审中-公开
标题翻译：使用操作系统可视中断处理来处理热键输入的方法和装置
公开(公告)号：US20050138256A1
公开(公告)日：2005-06-23
申请号：US10746491
申请日：2003-12-23
申请人： Frederick Bolay , Rajeev Nalawadi
发明人： Frederick Bolay , Rajeev Nalawadi
IPC分类号： G06F9/48 , G06F13/24
CPC分类号： G06F9/4812 , G06F13/24
摘要： Embodiments include an interrupt handling system to generate an operating system visible interrupt such as a message signaled interrupt or interprocessor interrupt by an advanced configuration and power management interface (ACPI) and ACPI source language infrastructure. The interrupt handling system may be used to service hot keys. This interrupt handling system allows for easy upgrading of system functionality by updating a driver.
摘要翻译：实施例包括用于通过高级配置和电源管理接口（ACPI）和ACPI源语言基础设施来产生操作系统可视中断（例如消息信号中断或处理器间中断）的中断处理系统。中断处理系统可用于服务热键。该中断处理系统允许通过更新驱动程序轻松升级系统功能。

3. 发明申请

US20070005996A1 Collecting thermal, acoustic or power data about a computing platform and deriving characterization data for use by a driver 审中-公开
标题翻译：收集关于计算平台的热，声或功率数据，并得出驾驶员使用的特征数据
公开(公告)号：US20070005996A1
公开(公告)日：2007-01-04
申请号：US11173500
申请日：2005-06-30
申请人： Rajeev Nalawadi , Anil Kulkarni , Vijay Purushothaman
发明人： Rajeev Nalawadi , Anil Kulkarni , Vijay Purushothaman
IPC分类号： G06F1/26
CPC分类号： G06F1/206 , Y02D10/16
摘要： Thermal, acoustic, and/or power data is collected about a platform, in its runtime environment. A component of the platform is selected, and predetermined data traffic is forced through the component while collecting the data. Characterization data for the platform is derived, from the collected data, and stored for access by a driver for the platform. Other embodiments are also described and claimed.
摘要翻译：在其运行时环境中收集关于平台的热，声和/或功率数据。选择平台的组件，并且在收集数据的同时强制预定的数据业务通过该组件。从收集的数据中导出平台的表征数据，并存储供平台的驱动程序访问。还描述和要求保护其他实施例。

4. 发明申请

US20050094665A1 Isochronous device communication management 有权
标题翻译：同步设备通讯管理
公开(公告)号：US20050094665A1
公开(公告)日：2005-05-05
申请号：US10699242
申请日：2003-10-30
申请人： Rajeev Nalawadi , Mark VanDeusen
发明人： Rajeev Nalawadi , Mark VanDeusen
IPC分类号： H04L12/24 , H04L12/28
CPC分类号： H04L41/0896 , H04L12/12 , H04L29/06027
摘要： Various embodiments of the invention relate to apportioning a total memory bandwidth available for a time period amongst a plurality of bandwidth requests according to a power managed profile. In addition, isochronous data transmission may be appended together and transmitted according to a data transmission policy, wherein the policy may include transmitting the appended isochronous data during an opportunistic data transmission, or during a time identified for transmitting a combined isochronous data transmission, but prior to a time delay compliance limit for isochronous requirements.
摘要翻译：本发明的各种实施例涉及根据功率管理简档来分配在多个带宽请求中的一段时间段内可用的总存储器带宽。此外，可以根据数据传输策略将同步数据传输附加在一起并发送，其中策略可以包括在机会数据传输期间或在用于发送组合同步数据传输而被识别的时间内发送附加的同步数据，但是先前达到等时要求的延时符合限制。

5. 发明申请

US20050055588A1 Dynamically loading power management code in a secure environment 有权
标题翻译：在安全的环境中动态加载电源管理代码
公开(公告)号：US20050055588A1
公开(公告)日：2005-03-10
申请号：US10660229
申请日：2003-09-10
申请人： Rajeev Nalawadi , Faraz Siddiqi
发明人： Rajeev Nalawadi , Faraz Siddiqi
IPC分类号： G06F1/26 , G06F9/445 , G06F9/455 , G06F21/00
CPC分类号： G06F9/44594 , G06F9/45558 , G06F21/51 , G06F21/57 , G06F21/74 , G06F21/81 , G06F2009/45587
摘要： Methods and apparatuses for dynamically loading and unloading power management code at runtime in a secure environment are described herein. In one embodiment, exemplary method includes loading authenticated/trusted power management code into a memory of a secure environment of an operating system (OS) and executing the power management code within the secure environment of the OS to handle power management tasks. Other methods and apparatuses are also described.
摘要翻译：这里描述了在安全环境中在运行时动态加载和卸载电力管理代码的方法和装置。在一个实施例中，示例性方法包括将经认证/受信任的电力管理代码加载到操作系统（OS）的安全环境的存储器中，并在OS的安全环境内执行电源管理代码以处理电源管理任务。还描述了其它方法和装置。

6. 发明申请

US20050198421A1 Method to execute ACPI ASL code after trapping on an I/O or memory access 审中-公开
标题翻译：在捕获I / O或内存访问后执行ACPI ASL代码的方法
公开(公告)号：US20050198421A1
公开(公告)日：2005-09-08
申请号：US10796350
申请日：2004-03-08
申请人： Rajeev Nalawadi , Victor Munoz
发明人： Rajeev Nalawadi , Victor Munoz
IPC分类号： G06F9/445 , G06F9/48 , G06F13/00
CPC分类号： G06F9/4812 , G06F9/4411
摘要： Embodiments may include an interrupt handling system to generate software level interrupts in place of hardware level interrupts. The interrupt handling system may invoke an advanced configuration and power management interface (ACPI) and ACPI source language infrastructure, which provides for an SCI independent mechanism for invoking ACPI ASL code. The ACPI ASL code may in turn be used to alter and configure the power management of a computer system. This interrupt handling system allows for greater flexibility and efficiency by utilizing software based interrupts in place of hardware interrupt to decrease pin counts for chips and allow isolation of system function based on address ranges tied to interrupt sources.
摘要翻译：实施例可以包括中断处理系统，以代替硬件电平中断来产生软件级中断。中断处理系统可以调用高级配置和电源管理接口（ACPI）和ACPI源语言基础设施，它提供了用于调用ACPI ASL代码的SCI独立机制。 ACPI ASL代码可以依次用于改变和配置计算机系统的电源管理。该中断处理系统通过利用基于软件的中断代替硬件中断来减少芯片的引脚数，并允许基于与中断源相连的地址范围来隔离系统功能，从而实现更大的灵活性和效率。

7. 发明申请

US20070005869A1 Index/data register pair for indirect register access 有权
标题翻译：用于间接寄存器访问的索引/数据寄存器对
公开(公告)号：US20070005869A1
公开(公告)日：2007-01-04
申请号：US11172254
申请日：2005-06-29
申请人： Jasper Balraj , Geetani Edirisooriya , John Lee , Robert Strong , Jeffrey Rabe , Amber Huffman , Daniel Nemiroff , Rajeev Nalawadi
发明人： Jasper Balraj , Geetani Edirisooriya , John Lee , Robert Strong , Jeffrey Rabe , Amber Huffman , Daniel Nemiroff , Rajeev Nalawadi
IPC分类号： G06F12/06 , G06F12/00
CPC分类号： G06F9/4401
摘要： A computer system provides a program access to a first register during real mode operation by using an index register and a data register, wherein the index register and the data register are located in real mode memory space and the first register is located outside of real mode memory space.
摘要翻译：计算机系统通过使用索引寄存器和数据寄存器在实模式操作期间提供对第一寄存器的访问，其中索引寄存器和数据寄存器位于实模式存储器空间中，并且第一寄存器位于实模式之外内存空间。

8. 发明申请

US20060069525A1 GUID, PnPID, isochronous bandwidth based mechanism for achieving memory controller thermal throttling 有权
标题翻译： GUID，PnPID，基于等时带宽的机制，用于实现内存控制器热调节
公开(公告)号：US20060069525A1
公开(公告)日：2006-03-30
申请号：US10957372
申请日：2004-09-30
申请人： Rajeev Nalawadi , Murali Ramadoss
发明人： Rajeev Nalawadi , Murali Ramadoss
IPC分类号： G06F15/00
CPC分类号： G06F1/3203 , G06F1/206 , G06F1/324 , Y02D10/126
摘要： A device to control memory bandwidth including a processing unit and a memory connected to the processing unit, the memory having a memory controller driver to issue at least one command based on a memory bandwidth requirement of another driver process. A memory controller to direct data to and from the memory. An active cooling device is connected to the processing unit and a thermal sensor.
摘要翻译：一种用于控制存储器带宽的装置，包括处理单元和连接到处理单元的存储器，所述存储器具有存储器控制器驱动器，以基于另一个驱动程序进程的存储器带宽要求发布至少一个命令。一个存储器控制器，用于将数据指向和传出内存。主动冷却装置连接到处理单元和热传感器。

9. 发明申请

US20060005057A1 Dynamic power requirement budget manager 有权
标题翻译：动态电力需求预算经理
公开(公告)号：US20060005057A1
公开(公告)日：2006-01-05
申请号：US10882549
申请日：2004-06-30
申请人： Rajeev Nalawadi , Mark Van Deusen
发明人： Rajeev Nalawadi , Mark Van Deusen
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/3287 , Y02D10/171
摘要： A system and method to determine a presence of devices coupled to one a more peripheral buses in a system, and dynamically reducing power consumption of a subset of the devices that are present, based on correlating application/device association and a predetermined power source budget. In one embodiment, the reducing of the power consumption is performed dynamically by having an agent reduce the power limit in a device register(s) corresponding to the subset of devices. Furthermore, in one embodiment, the power resource budget is based at least in part on a user-selected power/performance level.
摘要翻译：一种系统和方法，用于确定耦合到系统中的一个更多外围总线的设备的存在，并且基于相关的应用/设备关联和预定的电源预算来动态地减少存在的设备的子集的功耗。在一个实施例中，通过使代理减少对应于设备子集的设备寄存器中的功率限制来动态地执行功耗的降低。此外，在一个实施例中，功率资源预算至少部分地基于用户选择的功率/性能水平。

10. 发明申请

US20140189391A1 SYSTEM AND METHOD FOR CONVEYING SERVICE LATENCY REQUIREMENTS FOR DEVICES CONNECTED TO LOW POWER INPUT/OUTPUT SUB-SYSTEMS 有权
标题翻译：用于输送连接到低功率输入/输出子系统的设备的服务延迟要求的系统和方法
公开(公告)号：US20140189391A1
公开(公告)日：2014-07-03
申请号：US13730625
申请日：2012-12-28
申请人： Jaya L. Jeyaseelan , Linda Weyhing , Rajeev Nalawadi , Barnes Cooper , Suraj Varma , Nevo Idan , David Poisner
发明人： Jaya L. Jeyaseelan , Linda Weyhing , Rajeev Nalawadi , Barnes Cooper , Suraj Varma , Nevo Idan , David Poisner
IPC分类号： G06F1/32
CPC分类号： G06F1/3206 , G06F1/3234 , G06F1/3287 , Y02D10/171
摘要： In at least one embodiment described herein, an apparatus is provided that can include means for communicating a latency tolerance value for a device connected to a platform from a software latency register if a software latency tolerance register mode is active. The apparatus may also include means for communicating the latency tolerance value from a hardware latency register if a host controller is active. The latency tolerance value can be sent to a power management controller. More specific examples can include means for communicating a latency tolerance value from the software latency register if the software latency tolerance register mode is not active and the host controller is not active. The apparatus can also include means for mapping a resource space in the software latency register for the device using a BIOS/platform driver. The mapping can be achieved using an advanced configuration and power interface device description.
摘要翻译：在本文描述的至少一个实施例中，提供了一种装置，其可以包括用于如果软件等待时间容差寄存器模式是活动的，则用于在软件等待时间寄存器中传送连接到平台的设备的等待时间容限值的装置。该装置还可以包括用于在主机控制器处于活动状态时从硬件等待时间寄存器传送等待时间容差值的装置。延迟容限值可以发送到电源管理控制器。更具体的示例可以包括用于在软件延迟容限寄存器模式不活动且主机控制器不活动的情况下从软件延迟寄存器传送延迟容限值的装置。该装置还可以包括用于使用BIOS /平台驱动器在设备的软件延迟寄存器中映射资源空间的装置。可以使用高级配置和电源接口设备描述来实现映射。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式