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    • 1. 发明授权
    • Optical receiver with a calibration mode
    • 具有校准模式的光接收机
    • US08238761B2
    • 2012-08-07
    • US12633934
    • 2009-12-09
    • Frankie Y. LiuDinesh D. PatilRonald HoElad Alon
    • Frankie Y. LiuDinesh D. PatilRonald HoElad Alon
    • H04B10/06
    • H04B10/6911
    • An optical receiver is described. This optical receiver includes a digital feedback circuit that biases a front-end circuit, which receives an optical signal, so that an analog electrical signal output by the front-end circuit is calibrated relative to a reference voltage corresponding to a decision threshold of a digital slicer in the optical receiver. In particular, during a calibration mode the feedback circuit may determine and store a calibration value that calibrates the analog electrical signal relative to the reference voltage. Then, during a normal operating mode, the feedback circuit may output a current corresponding to the stored calibration value that specifies a bias point of the front-end circuit.
    • 描述了光接收机。 该光接收器包括数字反馈电路,该数字反馈电路偏置接收光信号的前端电路,使得由前端电路输出的模拟电信号相对于对应于数字的判定阈值的参考电压进行校准 切片机在光接收机。 特别地,在校准模式期间,反馈电路可以确定并存储校准相对于参考电压的模拟电信号的校准值。 然后,在正常操作模式期间,反馈电路可输出对应于存储的校准值的电流,该校准值指定前端电路的偏置点。
    • 2. 发明申请
    • OPTICAL RECEIVER WITH A CALIBRATION MODE
    • 具有校准模式的光接收器
    • US20110135315A1
    • 2011-06-09
    • US12633934
    • 2009-12-09
    • Frankie Y. LiuDinesh D. PatilRonald HoElad Alon
    • Frankie Y. LiuDinesh D. PatilRonald HoElad Alon
    • H04B10/00H04B10/06
    • H04B10/6911
    • An optical receiver is described. This optical receiver includes a digital feedback circuit that biases a front-end circuit, which receives an optical signal, so that an analog electrical signal output by the front-end circuit is calibrated relative to a reference voltage corresponding to a decision threshold of a digital slicer in the optical receiver. In particular, during a calibration mode the feedback circuit may determine and store a calibration value that calibrates the analog electrical signal relative to the reference voltage. Then, during a normal operating mode, the feedback circuit may output a current corresponding to the stored calibration value that specifies a bias point of the front-end circuit.
    • 描述了光接收机。 该光接收器包括数字反馈电路,该数字反馈电路偏置接收光信号的前端电路,使得由前端电路输出的模拟电信号相对于对应于数字的判定阈值的参考电压进行校准 切片机在光接收机。 特别地,在校准模式期间,反馈电路可以确定并存储校准相对于参考电压的模拟电信号的校准值。 然后,在正常操作模式期间,反馈电路可输出对应于存储的校准值的电流,该校准值指定前端电路的偏置点。
    • 3. 发明申请
    • PULSE-WIDTH-MODULATED THERMAL TUNING OF OPTICAL DEVICES
    • 光学器件的脉冲宽度调制热调制
    • US20130038920A1
    • 2013-02-14
    • US13205749
    • 2011-08-09
    • Frankie Y. LiuDinesh D. PatilRonald HoAshok V. Krishnamoorthy
    • Frankie Y. LiuDinesh D. PatilRonald HoAshok V. Krishnamoorthy
    • G02F1/01
    • G02F1/3132G02F1/0147G02F1/025
    • An optical device that includes a wavelength-sensitive optical component, which has an associated thermal time constant, is described. Note that an operating wavelength of the wavelength-sensitive optical component is a function of several physical parameters including temperature. Moreover, the optical device includes a heating mechanism that provides heat to the wavelength-sensitive optical component. Furthermore, the optical device includes a driver circuit that provides a pulse-width modulated signal to the heating mechanism. Note that an average pulse-width modulated heat provided by the heating mechanism, and which corresponds to the pulse-width modulated signal, thermally tunes the wavelength-sensitive optical component to a target operating wavelength. Additionally, note that the target operating wavelength corresponds to a target operating temperature of the wavelength-sensitive optical component.
    • 描述了包括具有相关联的热时间常数的波长敏感光学部件的光学装置。 注意,波长敏感光学部件的工作波长是包括温度在内的若干物理参数的函数。 此外,光学装置包括向波长敏感的光学部件提供热量的加热机构。 此外,光学装置包括向加热机构提供脉宽调制信号的驱动电路。 注意,由加热机构提供的并且对应于脉冲宽度调制信号的平均脉冲宽度调制热量将波长敏感光学部件热调谐到目标工作波长。 此外,注意,目标工作波长对应于波长敏感光学部件的目标工作温度。
    • 4. 发明授权
    • Pulse-width-modulated thermal tuning of optical devices
    • 光器件的脉冲宽度调制热调谐
    • US08599468B2
    • 2013-12-03
    • US13205749
    • 2011-08-09
    • Frankie Y. LiuDinesh D. PatilRonald HoAshok V. Krishnamoorthy
    • Frankie Y. LiuDinesh D. PatilRonald HoAshok V. Krishnamoorthy
    • G02F1/01
    • G02F1/3132G02F1/0147G02F1/025
    • An optical device that includes a wavelength-sensitive optical component, which has an associated thermal time constant, is described. Note that an operating wavelength of the wavelength-sensitive optical component is a function of several physical parameters including temperature. Moreover, the optical device includes a heating mechanism that provides heat to the wavelength-sensitive optical component. Furthermore, the optical device includes a driver circuit that provides a pulse-width modulated signal to the heating mechanism. Note that an average pulse-width modulated heat provided by the heating mechanism, and which corresponds to the pulse-width modulated signal, thermally tunes the wavelength-sensitive optical component to a target operating wavelength. Additionally, note that the target operating wavelength corresponds to a target operating temperature of the wavelength-sensitive optical component.
    • 描述了包括具有相关联的热时间常数的波长敏感光学部件的光学装置。 注意,波长敏感光学部件的工作波长是包括温度在内的若干物理参数的函数。 此外,光学装置包括向波长敏感的光学部件提供热量的加热机构。 此外,光学装置包括向加热机构提供脉宽调制信号的驱动电路。 注意,由加热机构提供的并且对应于脉冲宽度调制信号的平均脉冲宽度调制热量将波长敏感光学部件热调谐到目标工作波长。 此外,注意,目标工作波长对应于波长敏感光学部件的目标工作温度。
    • 5. 发明授权
    • On-chip samplers for asynchronously triggered events
    • 用于异步触发事件的片上采样器
    • US07694203B2
    • 2010-04-06
    • US11773020
    • 2007-07-03
    • Frankie Y. LiuRonald HoRobert J. Drost
    • Frankie Y. LiuRonald HoRobert J. Drost
    • G01R31/28
    • G01R31/31705G01R19/0053G01R31/2884
    • Embodiments of an integrated circuit that includes a debug circuit are described. This debug circuit is configured to test an asynchronous circuit by performing analog measurements on asynchronous signals associated with the asynchronous circuit, and includes a triggering module configured to gate the debug circuit based on one or more of the asynchronous signals. This triggering module has a continuous mode of operation and a single-shot mode of operation. A timing module within the debug circuit has a timing range exceeding a pre-determined value, and is configured to provide signals corresponding to a first time base or signals corresponding to a second time base. Furthermore, control logic within the debug circuit is configured to select a mode of operation and a given time base for the debug circuit, which is either the first time base or the second time base.
    • 描述包括调试电路的集成电路的实施例。 该调试电路被配置为通过对与异步电路相关联的异步信号执行模拟测量来测试异步电路,并且包括被配置为基于一个或多个异步信号门控调试电路的触发模块。 该触发模块具有连续的操作模式和单次操作模式。 调试电路内的定时模块具有超过预定值的定时范围,并且被配置为提供对应于第一时基的信号或对应于第二时基的信号。 此外,调试电路内的控制逻辑被配置为选择作为第一时基或第二时基的调试电路的操作模式和给定时基。
    • 6. 发明授权
    • Sub-sampling of weakly-driven nodes
    • 弱驱动节点的子采样
    • US07279922B1
    • 2007-10-09
    • US11477050
    • 2006-06-28
    • Ronald HoThomas G. O'NeillRobert D. HopkinsFrankie Y. Liu
    • Ronald HoThomas G. O'NeillRobert D. HopkinsFrankie Y. Liu
    • G01R31/26
    • G01R31/3004
    • A method and apparatus for performing on-chip voltage sampling of a weakly-driven node of a semiconductor device are disclosed. In some embodiments, the node is a floating node or is capacitively-driven. In some embodiments, it is involved in proximity-based communication. Sampling the node may include isolating the signal to be sampled using a source-follower amplifier before passing it to the sampling circuit. Sampling the node may include biasing the node to a desired voltage using a leaky transistor or other biasing circuit. In some embodiments, the biasing circuit may also be used to calibrate the sampler by coupling one or more calibration voltages to the node in place of a biasing voltage and measuring the sampler output. The sampler may be suitable for sub-sampling high frequency signals to produce a time-expanded, lower frequency version of the signals. The output of the sampler may be a current communicated off-chip for testing.
    • 公开了一种用于对半导体器件的弱驱动节点执行片上电压采样的方法和装置。 在一些实施例中,节点是浮动节点或者是电容驱动的。 在一些实施例中,其涉及基于邻近的通信。 对节点进行采样可以包括在将其传送到采样电路之前使用源跟随放大器来隔离要采样的信号。 采样节点可以包括使用泄漏晶体管或其它偏置电路将节点偏置到期望的电压。 在一些实施例中,偏置电路还可以用于通过将一个或多个校准电压耦合到节点来代替偏置电压并测量采样器输出来校准采样器。 采样器可能适用于对高频信号进行子采样,以产生时间扩展的低频版本的信号。 采样器的输出可以是用于测试的芯片外的当前通信。
    • 7. 发明申请
    • Sub-Sampling of Weakly-Driven Nodes
    • 弱驱动节点的子抽样
    • US20080231308A1
    • 2008-09-25
    • US11859463
    • 2007-09-21
    • Ronald HoThomas G. O'NeillRobert D. HopkinsFrankie Y. Liu
    • Ronald HoThomas G. O'NeillRobert D. HopkinsFrankie Y. Liu
    • G01R31/26
    • G01R31/3004
    • A method and apparatus for performing on-chip voltage sampling of a weakly-driven node of a semiconductor device are disclosed. In some embodiments, the node is a floating node or is capacitively-driven. In some embodiments, it is involved in proximity-based communication. Sampling the node may include isolating the signal to be sampled using a source-follower amplifier before passing it to the sampling circuit. Sampling the node may include biasing the node to a desired voltage using a leaky transistor or other biasing circuit. In some embodiments, the biasing circuit may also be used to calibrate the sampler by coupling one or more calibration voltages to the node in place of a biasing voltage and measuring the sampler output. The sampler may be suitable for sub-sampling high frequency signals to produce a time-expanded, lower frequency version of the signals. The output of the sampler may be a current communicated off-chip for testing.
    • 公开了一种用于对半导体器件的弱驱动节点执行片上电压采样的方法和装置。 在一些实施例中,节点是浮动节点或者是电容驱动的。 在一些实施例中,其涉及基于邻近的通信。 对节点进行采样可以包括在将其传送到采样电路之前使用源跟随放大器来隔离要采样的信号。 采样节点可以包括使用泄漏晶体管或其它偏置电路将节点偏置到期望的电压。 在一些实施例中,偏置电路还可以用于通过将一个或多个校准电压耦合到节点来代替偏置电压并测量采样器输出来校准采样器。 采样器可能适用于对高频信号进行子采样,以产生时间扩展的低频版本的信号。 采样器的输出可以是用于测试的芯片外的当前通信。
    • 8. 发明授权
    • Sub-sampling of weakly-driven nodes
    • 弱驱动节点的子采样
    • US07675312B2
    • 2010-03-09
    • US11859463
    • 2007-09-21
    • Ronald HoThomas G. O'NeillRobert D. HopkinsFrankie Y. Liu
    • Ronald HoThomas G. O'NeillRobert D. HopkinsFrankie Y. Liu
    • G01R31/26
    • G01R31/3004
    • A method and apparatus for performing on-chip voltage sampling of a weakly-driven node of a semiconductor device are disclosed. In some embodiments, the node is a floating node or is capacitively-driven. In some embodiments, it is involved in proximity-based communication. Sampling the node may include isolating the signal to be sampled using a source-follower amplifier before passing it to the sampling circuit. Sampling the node may include biasing the node to a desired voltage using a leaky transistor or other biasing circuit. In some embodiments, the biasing circuit may also be used to calibrate the sampler by coupling one or more calibration voltages to the node in place of a biasing voltage and measuring the sampler output. The sampler may be suitable for sub-sampling high frequency signals to produce a time-expanded, lower frequency version of the signals. The output of the sampler may be a current communicated off-chip for testing.
    • 公开了一种用于对半导体器件的弱驱动节点执行片上电压采样的方法和装置。 在一些实施例中,节点是浮动节点或者是电容驱动的。 在一些实施例中,其涉及基于邻近的通信。 对节点进行采样可以包括在将其传送到采样电路之前使用源跟随放大器来隔离要采样的信号。 采样节点可以包括使用泄漏晶体管或其它偏置电路将节点偏置到期望的电压。 在一些实施例中,偏置电路还可以用于通过将一个或多个校准电压耦合到节点来代替偏置电压并测量采样器输出来校准采样器。 采样器可能适用于对高频信号进行子采样,以产生时间扩展的低频版本的信号。 采样器的输出可以是用于测试的芯片外的当前通信。
    • 9. 发明申请
    • ON-CHIP SAMPLERS FOR ASYNCHRONOUSLY TRIGGERED EVENTS
    • 用于非正常触发事件的片上采样器
    • US20090013214A1
    • 2009-01-08
    • US11773020
    • 2007-07-03
    • Frankie Y. LiuRonald HoRobert J. Drost
    • Frankie Y. LiuRonald HoRobert J. Drost
    • G06F11/00
    • G01R31/31705G01R19/0053G01R31/2884
    • Embodiments of an integrated circuit that includes a debug circuit are described. This debug circuit is configured to test an asynchronous circuit by performing analog measurements on asynchronous signals associated with the asynchronous circuit, and includes a triggering module configured to gate the debug circuit based on one or more of the asynchronous signals. This triggering module has a continuous mode of operation and a single-shot mode of operation. A timing module within the debug circuit has a timing range exceeding a pre-determined value, and is configured to provide signals corresponding to a first time base or signals corresponding to a second time base. Furthermore, control logic within the debug circuit is configured to select a mode of operation and a given time base for the debug circuit, which is either the first time base or the second time base.
    • 描述包括调试电路的集成电路的实施例。 该调试电路被配置为通过对与异步电路相关联的异步信号执行模拟测量来测试异步电路,并且包括被配置为基于一个或多个异步信号门控调试电路的触发模块。 该触发模块具有连续的操作模式和单次操作模式。 调试电路内的定时模块具有超过预定值的定时范围,并且被配置为提供对应于第一时基的信号或对应于第二时基的信号。 此外,调试电路内的控制逻辑被配置为选择作为第一时基或第二时基的调试电路的操作模式和给定时基。