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1. 发明申请

US20210320875A1 SWITCH-BASED ADAPTIVE TRANSFORMATION FOR EDGE APPLIANCES 有权
公开(公告)号：US20210320875A1
公开(公告)日：2021-10-14
申请号：US17357358
申请日：2021-06-24
申请人： Francesc Guim Bernat , Karthik Kumar , Thomas E. Willis , Timothy Verrall , Robert G. Southworth
发明人： Francesc Guim Bernat , Karthik Kumar , Thomas E. Willis , Timothy Verrall , Robert G. Southworth
IPC分类号： H04L12/851
摘要： A network switch includes a memory device to store a stream information of a plurality of data streams being handled by the network switch, the stream information including a stream identifier, a stream service level agreement (SLA), and a stream traffic type; accelerator circuitry to apply stream transformation functions to data streams; telemetry circuitry to monitor egress ports of the network switch; and scheduler circuitry to: receive telemetry data from the telemetry circuitry to determine that a utilization of egress ports of the network switch is over a threshold utilization; determine a selected data stream of the plurality of data streams to transform; use the accelerator circuitry to transform the selected data stream to produce a transformed data stream, wherein the transformed data stream complies with a corresponding stream SLA; and transmit the transformed data stream on an egress port.

2. 发明申请

US20200073846A1 TECHNOLOGIES FOR FLEXIBLE PROTOCOL ACCELERATION 审中-公开
公开(公告)号：US20200073846A1
公开(公告)日：2020-03-05
申请号：US16366496
申请日：2019-03-27
申请人： Matthew J. Adiletta , Bradley Burres , Duane Galbi , Amit Kumar , Yadong Li , Salma Mizra , Jose Niell , Thomas E. Willis , William Duggan
发明人： Matthew J. Adiletta , Bradley Burres , Duane Galbi , Amit Kumar , Yadong Li , Salma Mizra , Jose Niell , Thomas E. Willis , William Duggan
IPC分类号： G06F13/42 , G06F8/60
摘要： Technologies for flexible I/O protocol acceleration include a computing device having a root complex, a smart endpoint coupled to the root complex, and an offload complex coupled to the smart endpoint. The smart endpoint receives an I/O transaction that originates from the root complex and parses the I/O transaction based on an I/O protocol and identifies an I/O command. The smart endpoint may parse the I/O transaction based on endpoint firmware that may be programmed by the computing device. The smart endpoint accelerates the I/O command and provides a smart context to the offload complex. The smart endpoint may copy the I/O command to memory of the smart endpoint or the offload complex. The smart endpoint may identify protocol data based on the I/O command and copy the protocol data to the memory of the smart endpoint or the offload complex. Other embodiments are described and claimed.

3. 发明授权

US07698607B2 Repairing microdisplay frame buffers 有权
标题翻译：修复微显示帧缓冲区
公开(公告)号：US07698607B2
公开(公告)日：2010-04-13
申请号：US10868057
申请日：2004-06-15
申请人： Thomas E. Willis
发明人： Thomas E. Willis
IPC分类号： G11C29/00 , G06F11/00 , H04N9/64
CPC分类号： G11C29/848 , G09G3/006 , G09G2360/18
摘要： A frame buffer for a microdisplay may be implemented with a repair algorithm that achieves desired uniformity in the frame buffer. Because the frame buffer and the display are tightly coupled, it is desirable to avoid providing unnecessary redundant elements which break up the uniformity of the overall integrated circuit. To this end, when a cell in the frame buffer is defective, a system to automatically address in its place an adjacent cell may be implemented. In one embodiment, control logic may address a column multiplexer to select an adjacent cell in an adjacent column in the same row to provide information in place of the defective cell in the frame buffer.
摘要翻译：用于微显示器的帧缓冲器可以用在帧缓冲器中实现期望的均匀性的修复算法来实现。由于帧缓冲器和显示器紧密耦合，因此希望避免提供不必要的冗余元件，这会破坏整个集成电路的均匀性。为此，当帧缓冲器中的小区出现故障时，可以实现在其相邻小区中自动寻址的系统。在一个实施例中，控制逻辑可以寻址列多路复用器以选择同一行中相邻列中的相邻单元，以提供信息代替帧缓冲器中的有缺陷单元。

4. 发明授权

US07348987B2 Sparse refresh of display 有权
标题翻译：稀疏刷新显示
公开(公告)号：US07348987B2
公开(公告)日：2008-03-25
申请号：US11273001
申请日：2005-11-14
申请人： Thomas E. Willis , Steven L. Midford
发明人： Thomas E. Willis , Steven L. Midford
IPC分类号： G09G5/36 , G09G5/39 , G06F12/02
CPC分类号： G09G5/395 , G09G2320/103 , G09G2330/022
摘要： A method, apparatus, and signal-bearing medium for sending to a display device modified regions of a frame buffer. A frame buffer is divided into the regions, and data in the frame buffer represents pixels on the display device. The frame buffer accumulates writes until the region being written to changes, at which time the region is copied to the display device.
摘要翻译：一种用于向显示装置发送帧缓冲器的修改区域的方法，装置和信号承载介质。帧缓冲器被分成区域，帧缓冲器中的数据表示显示设备上的像素。帧缓冲器累积写入直到写入的区域发生变化，此时该区域被复制到显示设备。

5. 发明授权

US07136211B2 Display device with non-linear ramp 有权
标题翻译：具有非线性斜坡的显示设备
公开(公告)号：US07136211B2
公开(公告)日：2006-11-14
申请号：US10991846
申请日：2004-11-17
申请人： Samson X. Huang , Thomas E. Willis
发明人： Samson X. Huang , Thomas E. Willis
IPC分类号： G02B26/00 , G02F1/03 , G09G5/00 , G09G5/10 , G09G3/34 , G09G3/36
CPC分类号： G09G3/34 , G09G3/346 , G09G3/3648 , G09G2310/0259 , G09G2310/027 , G09G2310/066 , G09G2320/0276
摘要： In some embodiments, a drive circuit may be coupled to a spatial light modulator, wherein the drive circuit provides a non-linear analog ramp signal to the spatial light modulator. Other embodiments are disclosed and claimed.
摘要翻译：在一些实施例中，驱动电路可以耦合到空间光调制器，其中驱动电路向空间光调制器提供非线性模拟斜坡信号。公开和要求保护其他实施例。

6. 发明授权

US07126592B2 Forming modulated signals that digitally drive display elements 有权
标题翻译：形成数字驱动显示元件的调制信号
公开(公告)号：US07126592B2
公开(公告)日：2006-10-24
申请号：US10227957
申请日：2002-08-26
申请人： Thomas E. Willis , Samson Huang
发明人： Thomas E. Willis , Samson Huang
IPC分类号： G09G5/00
CPC分类号： G09G3/2014 , G09G3/2092 , G09G3/34 , G09G3/3611 , G09G2360/18
摘要： A controller to programmably provide stored values of drive control data (e.g., a ramp value) to a display device. Using the stored values of drive control data, modulated signals, such as pulse width modulation waveforms may be formed to digitally drive display elements of a display device, as an example. In a display refresh period, a first count indicative of a modulation characteristic may be compared to a stored value that corresponds to the first count. This comparison may determine an update for a second count indicative of a display data characteristic based on the stored value. Because only unique stored values may be stored in a programmable storage device, such as a look-up-table, a relatively smaller number of table entries may be stored and programmed in one embodiment. This may substantially reduce the size of the look-up-table and significantly decrease programming time and effort.
摘要翻译：控制器，其可编程地向显示装置提供驱动控制数据的存储值（例如，斜坡值）。作为示例，使用存储的驱动控制数据的值可以形成诸如脉冲宽度调制波形的调制信号以数字驱动显示装置的显示元件。在显示刷新周期中，可以将表示调制特性的第一计数与对应于第一计数的存储值进行比较。该比较可以基于存储的值来确定表示显示数据特性的第二计数的更新。因为只有唯一的存储值可以存储在诸如查找表的可编程存储设备中，在一个实施例中可以存储和编程相对较少数量的表条目。这可能会显着减少查找表的大小，并显着减少编程时间和精力。

7. 发明授权

US07760214B2 Inserting transitions into a waveform that drives a display 有权
标题翻译：将转换插入到驱动显示器的波形中
公开(公告)号：US07760214B2
公开(公告)日：2010-07-20
申请号：US10919989
申请日：2004-08-17
申请人： Thomas E. Willis
发明人： Thomas E. Willis
IPC分类号： G09G3/36
CPC分类号： G09G3/2014 , G09G3/3614 , G09G3/3648 , G09G3/3655 , G09G2300/0809 , G09G2300/0857 , G09G2310/0235 , G09G2310/024 , G09G2310/0259
摘要： In one embodiment, the present invention includes a method of driving a first display element with a first pixel waveform that is a function of a desired color for the first display element and a second waveform; and inserting an added transition into the first pixel waveform to maintain a bias between the first pixel waveform and the second waveform.
摘要翻译：在一个实施例中，本发明包括一种驱动具有第一像素波形的第一显示元件的方法，该第一像素波形是第一显示元件的期望颜色的函数和第二波形; 以及将添加的转变插入到所述第一像素波形中以保持所述第一像素波形和所述第二波形之间的偏置。

8. 发明授权

US07165164B2 Method and apparatus including heuristic for sharing TLB entries 有权
标题翻译：包括用于共享TLB条目的启发式的方法和装置
公开(公告)号：US07165164B2
公开(公告)日：2007-01-16
申请号：US10670637
申请日：2003-09-24
申请人： Thomas E. Willis , Achmed R. Zahir
发明人： Thomas E. Willis , Achmed R. Zahir
IPC分类号： G06F12/10
CPC分类号： G06F12/1027 , G06F2212/656
摘要： A sharing mechanism is herein disclosed for multiple logical processors using a translation lookaside buffer (TLB) to translate virtual addresses into physical addresses. The mechanism supports sharing of TLB entries among logical processors, which may access address spaces in common. The mechanism further supports private TLB entries among logical processors, which may each access a different physical address through identical virtual addresses. The sharing mechanism provides for installation and updating of TLB entries as private entries or as shared entries transparently, without requiring special operating system support or modifications. Sharability of virtual address translations by logical processors may be determined by comparing page table physical base addresses of the logic processors. Using the disclosed sharing mechanism, fast and efficient virtual address translation is provided without requiring more expensive functional redundancy.
摘要翻译：这里公开了一种使用翻译后备缓冲器（TLB）将虚拟地址转换成物理地址的多个逻辑处理器的共享机制。该机制支持在逻辑处理器之间共享TLB条目，这可以共享地址空间。该机制还支持逻辑处理器中的私有TLB条目，每个逻辑处理器可以通过相同的虚拟地址访问不同的物理地址。共享机制提供TLB条目作为私有条目或作为共享条目透明地安装和更新，而不需要特殊的操作系统支持或修改。可以通过比较逻辑处理器的页表物理基地址来确定逻辑处理器的虚拟地址转换的可靠性。使用所公开的共享机制，提供快速高效的虚拟地址转换，而不需要更昂贵的功能冗余。

9. 发明授权

US07073044B2 Method and apparatus for sharing TLB entries 有权
标题翻译：用于共享TLB条目的方法和装置
公开(公告)号：US07073044B2
公开(公告)日：2006-07-04
申请号：US09823472
申请日：2001-03-30
申请人： Thomas E. Willis , Achmed R. Zahir
发明人： Thomas E. Willis , Achmed R. Zahir
IPC分类号： G06F12/10
CPC分类号： G06F12/1027
摘要： A sharing mechanism is herein disclosed for multiple logical processors using a translation lookaside buffer (TLB) to translate virtual addresses, for example into physical addresses. The mechanism supports sharing of TLB entries among logical processors, which may access address spaces in common. The mechanism further supports private TLB entries among logical processors, which for example, may each access a different physical address through identical virtual addresses. The sharing mechanism provides for installation and updating of TLB entries as private entries or as shared entries transparently, without requiring special operating system support or modifications. Through use of the disclosed sharing mechanism, fast and efficient virtual address translation is provided without requiring more expensive functional redundancy.
摘要翻译：这里公开了一种共享机制，用于使用翻译后备缓冲器（TLB）的多个逻辑处理器将虚拟地址例如转换成物理地址。该机制支持在逻辑处理器之间共享TLB条目，这可以共享地址空间。该机制还支持逻辑处理器中的私有TLB条目，其例如可以通过相同的虚拟地址访问不同的物理地址。共享机制提供TLB条目作为私有条目或作为共享条目透明地安装和更新，而不需要特殊的操作系统支持或修改。通过使用所公开的共享机制，提供快速有效的虚拟地址转换，而不需要更昂贵的功能冗余。

10. 发明授权

US06995771B2 Sparse refresh of display 有权
公开(公告)号：US06995771B2
公开(公告)日：2006-02-07
申请号：US10010524
申请日：2001-12-07
申请人： Thomas E. Willis , Steven L. Midford
发明人： Thomas E. Willis , Steven L. Midford
IPC分类号： G09G5/36
CPC分类号： G09G5/395 , G09G2320/103 , G09G2330/022
摘要： A method, apparatus, and signal-bearing medium for sending to a display device modified regions of a frame buffer. A frame buffer is divided into the regions, and data in the frame buffer represents pixels on the display device. The frame buffer accumulates writes until the region being written to changes, at which time the region is copied to the display device.

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