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1. 发明申请

US20080301624A1 SYSTEM AND METHOD FOR EMPLOYING PATTERNING PROCESS STATISTICS FOR GROUND RULES WAIVERS AND OPTIMIZATION 有权
标题翻译：用于接地规则的绘图过程统计的系统和方法和优化
公开(公告)号：US20080301624A1
公开(公告)日：2008-12-04
申请号：US12175097
申请日：2008-07-17
申请人： Fook-Luen Heng , Mark Alan Lavin , Jin-Fuw Lee , Chieh-yu Lin , Jawahar Pundalik Nayak , Rama Nand Singh
发明人： Fook-Luen Heng , Mark Alan Lavin , Jin-Fuw Lee , Chieh-yu Lin , Jawahar Pundalik Nayak , Rama Nand Singh
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images formed by the mask and applying patterning process variation distributions to influence and determine corrective actions taken to improve and optimize the rules for compliance by the layout. The process variation distributions are mapped to an intersect area distribution by creating a histogram based upon a plurality of processes for an intersect area. The intersect area is analyzed using the histogram to provide ground rule waivers and optimization.
摘要翻译：使用图案化处理统计来评估交叉区域分析的布局的系统和方法包括对布局应用光学近似校正（OPC），模拟由掩模形成的图像并应用图案化过程变化分布来影响和确定纠正措施以改进和优化布局符合规则。通过基于交叉区域的多个处理创建直方图，将过程变化分布映射到交叉区域分布。使用直方图分析交叉区域，以提供基本规则豁免和优化。

2. 发明授权

US07962865B2 System and method for employing patterning process statistics for ground rules waivers and optimization 有权
标题翻译：采用图形化处理统计的基本规则放弃和优化的系统和方法
公开(公告)号：US07962865B2
公开(公告)日：2011-06-14
申请号：US12175097
申请日：2008-07-17
申请人： Fook-Luen Heng , Mark Alan Lavin , Jin-Fuw Lee , Chieh-yu Lin , Jawahar Pundalik Nayak , Rama Nand Singh
发明人： Fook-Luen Heng , Mark Alan Lavin , Jin-Fuw Lee , Chieh-yu Lin , Jawahar Pundalik Nayak , Rama Nand Singh
IPC分类号： G06F17/20 , G06F19/00 , G03F1/00 , G21K5/00
CPC分类号： G06F17/5068
摘要： A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images formed by the mask and applying patterning process variation distributions to influence and determine corrective actions taken to improve and optimize the rules for compliance by the layout. The process variation distributions are mapped to an intersect area distribution by creating a histogram based upon a plurality of processes for an intersect area. The intersect area is analyzed using the histogram to provide ground rule waivers and optimization.
摘要翻译：使用图案化处理统计来评估交叉区域分析的布局的系统和方法包括对布局应用光学近似校正（OPC），模拟由掩模形成的图像并应用图案化过程变化分布来影响和确定纠正措施以改进和优化布局符合规则。通过基于交叉区域的多个处理创建直方图，将过程变化分布映射到交叉区域分布。使用直方图分析交叉区域，以提供基本规则豁免和优化。

3. 发明授权

US07448018B2 System and method for employing patterning process statistics for ground rules waivers and optimization 失效
公开(公告)号：US07448018B2
公开(公告)日：2008-11-04
申请号：US11519617
申请日：2006-09-12
申请人： Fook-Luen Heng , Mark Alan Lavin , Jin-Fuw Lee , Chieh-yu Lin , Jawahar Pundalik Nayak , Rama Nand Singh
发明人： Fook-Luen Heng , Mark Alan Lavin , Jin-Fuw Lee , Chieh-yu Lin , Jawahar Pundalik Nayak , Rama Nand Singh
IPC分类号： G06F17/50 , G06F19/00 , G03F1/00 , G21K5/00
CPC分类号： G06F17/5068
摘要： A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images formed by the mask and applying patterning process variation distributions to influence and determine corrective actions taken to improve and optimize the rules for compliance by the layout. The process variation distributions are mapped to an intersect area distribution by creating a histogram based upon a plurality of processes for an intersect area. The intersect area is analyzed using the histogram to provide ground rule waivers and optimization.

4. 发明申请

US20080066047A1 System and method for employing patterning process statistics for ground rules waivers and optimization 失效
标题翻译：采用图形化处理统计的基本规则放弃和优化的系统和方法
公开(公告)号：US20080066047A1
公开(公告)日：2008-03-13
申请号：US11519617
申请日：2006-09-12
申请人： Fook-Luen Heng , Mark Alan Lavin , Jin-Fuw Lee , Chieh-yu Lin , Jawahar Pundalik Nayak , Rama Nand Singh
发明人： Fook-Luen Heng , Mark Alan Lavin , Jin-Fuw Lee , Chieh-yu Lin , Jawahar Pundalik Nayak , Rama Nand Singh
IPC分类号： G06F17/50
CPC分类号： G06F17/5068
摘要： A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images formed by the mask and applying patterning process variation distributions to influence and determine corrective actions taken to improve and optimize the rules for compliance by the layout. The process variation distributions are mapped to an intersect area distribution by creating a histogram based upon a plurality of processes for an intersect area. The intersect area is analyzed using the histogram to provide ground rule waivers and optimization.
摘要翻译：使用图案化处理统计来评估交叉区域分析的布局的系统和方法包括对布局应用光学近似校正（OPC），模拟由掩模形成的图像并应用图案化过程变化分布来影响和确定纠正措施以改进和优化布局符合规则。通过基于交叉区域的多个处理创建直方图，将过程变化分布映射到交叉区域分布。使用直方图分析交叉区域，以提供基本规则豁免和优化。

5. 发明申请

US20110173577A1 Techniques for Pattern Process Tuning and Design Optimization for Maximizing Process-Sensitive Circuit Yields 审中-公开
标题翻译：用于最大化过程敏感电路产量的模式过程调优和设计优化技术
公开(公告)号：US20110173577A1
公开(公告)日：2011-07-14
申请号：US12024390
申请日：2008-02-01
申请人： Ching-Te K. Chuang , Fook-Luen Heng , Rouwaida Kanj , Keunwoo Kim , Jin-Fuw Lee , Saibal Mukhopadhyay , Sani Richard Nassif , Rama Nand Singh
发明人： Ching-Te K. Chuang , Fook-Luen Heng , Rouwaida Kanj , Keunwoo Kim , Jin-Fuw Lee , Saibal Mukhopadhyay , Sani Richard Nassif , Rama Nand Singh
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F2217/10
摘要： Techniques for improving circuit design and production are provided. In one aspect, a method for virtual fabrication of a process-sensitive circuit is provided. The method comprises the following steps. Based on a physical layout diagram of the circuit, a virtual representation of the fabricated circuit is obtained that accounts for one or more variations that can occur during a circuit production process. A quality-based metric is used to project a production yield for the virtual representation of the fabricated circuit. The physical layout diagram and/or the production process are modified. The obtaining, using and modifying steps are repeated until a desired projected production yield is attained.
摘要翻译：提供了改进电路设计和生产的技术。一方面，提供了一种用于虚拟制造过程敏感电路的方法。该方法包括以下步骤。基于电路的物理布局图，获得制造电路的虚拟表示，其考虑了在电路生产过程中可能发生的一个或多个变化。基于质量的度量用于为制造的电路的虚拟表示投影产量。物理布局图和/或生产过程被修改。重复获得，使用和修改步骤，直到达到期望的预计产量。

6. 发明申请

US20090089726A1 Layout Quality Gauge for Integrated Circuit Design 有权
标题翻译：集成电路设计布局质量计
公开(公告)号：US20090089726A1
公开(公告)日：2009-04-02
申请号：US11865252
申请日：2007-10-01
申请人： Fook-Luen Heng , Mark A. Lavin , Jin-Fuw Lee , Thomas Ludwig , Rama Nand Singh , Fanchieh Yee
发明人： Fook-Luen Heng , Mark A. Lavin , Jin-Fuw Lee , Thomas Ludwig , Rama Nand Singh , Fanchieh Yee
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： A method for layout design includes steps or acts of: receiving a layout for design of an integrated circuit chip; designing mask shapes for the layout; transmitting the mask shapes to a litho simulator for generating wafer shapes; receiving the wafer shapes; calculating electrically equivalent gate lengths for the wafer shapes; analyzing the gate lengths to check for conformity against a threshold value, wherein the threshold value represents a desired value of electrically equivalent gate lengths; placing markers on the layout at those locations where the gate length violates the threshold value; and generating a histogram of gate lengths for comparing layouts for electrically equivalent gate lengths for layout quality.
摘要翻译：一种用于布局设计的方法包括以下步骤或动作：接收用于集成电路芯片设计的布局; 设计布局的面具形状; 将掩模形状传送到用于产生晶片形状的光刻模拟器; 接收晶片形状; 计算晶片形状的等效栅极长度; 分析所述栅极长度以检查与阈值的一致性，其中所述阈值表示电等效栅极长度的期望值; 在栅极长度违反阈值的位置放置标记在布局上; 以及生成用于比较用于布局质量的电等效栅极长度的布局的栅极长度的直方图。

7. 发明授权

US5777789A Efficient optical system for a high resolution projection display employing reflection light valves 失效
标题翻译：高效光学系统，用于采用反射光阀的高分辨率投影显示
公开(公告)号：US5777789A
公开(公告)日：1998-07-07
申请号：US934300
申请日：1997-09-19
申请人： George Liang-Tai Chiu , Thomas Mario Cipolla , Fuad Elias Doany , Derek Brian Dove , Alan Edward Rosenbluth , Rama Nand Singh , Janusz Stanislaw Wilczynski
发明人： George Liang-Tai Chiu , Thomas Mario Cipolla , Fuad Elias Doany , Derek Brian Dove , Alan Edward Rosenbluth , Rama Nand Singh , Janusz Stanislaw Wilczynski
IPC分类号： G02F1/13 , G02F1/1335 , H04N5/74 , H04N9/31 , G02B5/30 , G02B27/28 , G02F1/00 , G03B21/00
CPC分类号： H04N9/3105
摘要： An optical system is described consisting of reflection birefringent light valves, polarizing beam splitter, color image combining prisms, illumination system, projection lens, filters for color and contrast control, and screen placed in a configuration offering advantages for a high resolution color display. The illumination system includes a light tunnel having a cross-sectional shape corresponding to the geometrical shape of the spacial light modulator to optimize the amount of light projected onto the screen.
摘要翻译：描述了由反射双折射光阀，偏振分束器，彩色图像组合棱镜，照明系统，投影透镜，用于颜色和对比度控制的滤光器以及放置在为高分辨率彩色显示提供优点的配置中的屏幕组成的光学系统。照明系统包括具有对应于空间光调制器的几何形状的横截面形状的光通道，以优化投影到屏幕上的光量。

8. 发明授权

US5896232A Highly efficient and compact frontlighting for polarization-based reflection light valves 失效
标题翻译：用于极化反射光阀的高效紧凑的前照灯
公开(公告)号：US5896232A
公开(公告)日：1999-04-20
申请号：US908394
申请日：1997-08-07
申请人： Russell Alan Budd , Fuad Elias Doany , Rama Nand Singh
发明人： Russell Alan Budd , Fuad Elias Doany , Rama Nand Singh
IPC分类号： G02B5/30 , G02F1/13357 , H04N5/74 , G02B27/10 , G02B27/14
CPC分类号： G02F1/13362 , G02B5/3025 , H04N5/7441 , G02F2001/133616 , H04N5/7491
摘要： An optical device and a display are disclosed that include an illumination source which provides unpolarized light. An array of polarizing plates have an entrance surface, which receives the unpolarized light at an oblique angle, and an exit surface which provides a polarized light having a first polarization and exiting the array at a substantially perpendicular direction to the exit surface. A light valve selectively rotates the polarized light to form an image forming light, and an imaging lens receives the image forming light and forms an image. Each of the polarizing plates in the array has opposing surfaces that are tilted relative to its entrance and exit surfaces. Each polarizing plate includes a polarizing layer formed on one of the opposing tilted surfaces, and a half-wave optical retardation layer formed on the polarizing layer.
摘要翻译：公开了包括提供非偏振光的照明源的光学装置和显示器。偏振板阵列具有以倾斜角度接收非偏振光的入射面和提供具有第一偏振的偏振光并且在与出射表面基本垂直的方向上离开阵列的出射表面。光阀选择性地旋转偏振光以形成图像形成光，并且成像透镜接收图像形成光并形成图像。阵列中的每个偏振片具有相对于其入射和出射表面倾斜的相对表面。每个偏振片包括形成在相对的倾斜表面之一上的偏振层和形成在偏振层上的半波光学延迟层。

9. 发明授权

US5786873A Efficient optical system for a high resolution projection display employing reflection light valves 失效
标题翻译：高效光学系统，用于采用反射光阀的高分辨率投影显示
公开(公告)号：US5786873A
公开(公告)日：1998-07-28
申请号：US910807
申请日：1997-08-13
申请人： George Liang-Tai Chiu , Thomas Mario Cipolla , Fuad Elias Doany , Derek Brian Dove , Alan Edward Rosenbluth , Rama Nand Singh , Janusz Stanislaw Wilczynski
发明人： George Liang-Tai Chiu , Thomas Mario Cipolla , Fuad Elias Doany , Derek Brian Dove , Alan Edward Rosenbluth , Rama Nand Singh , Janusz Stanislaw Wilczynski
IPC分类号： G02F1/13 , G02F1/1335 , G03B21/00 , H04N5/74 , H04N9/31
CPC分类号： G02B27/283 , G02B27/1026 , G02B27/145 , H04N9/3105
摘要： An optical system is described consisting of reflection birefringent light valves, polarizing beam splitter, color image combining prisms, illumination system, projection lens, filters for color and contrast control, and screen placed in a configuration offering advantages for a high resolution color display. The system includes a quarter wave plate positioned to suppress stray reflection from the projection lens. The system also includes a second quarter wave plate disposed on the screen and a polarizing film disposed on the second quarter wave plate to suppress ambient light from illuminating the screen and entering the system.
摘要翻译：描述了由反射双折射光阀，偏振分束器，彩色图像组合棱镜，照明系统，投影透镜，用于颜色和对比度控制的滤光器以及放置在为高分辨率彩色显示提供优点的配置中的屏幕组成的光学系统。该系统包括四分之一波片，定位成抑制投影透镜的杂散反射。该系统还包括设置在屏幕上的第二四分之一波长板和设置在第二四分之一波片上的偏振膜，以抑制环境光照射屏幕并进入系统。

10. 发明授权

US07018746B2 Method of verifying the placement of sub-resolution assist features in a photomask layout 有权
标题翻译：在光掩模布局中验证子分辨率辅助特征的位置的方法
公开(公告)号：US07018746B2
公开(公告)日：2006-03-28
申请号：US10249509
申请日：2003-04-15
申请人： Yuping Cui , Rama Nand Singh
发明人： Yuping Cui , Rama Nand Singh
IPC分类号： G03F9/00 , G06F17/50
CPC分类号： G06F17/5081 , G03F1/36 , G06F2217/12 , Y02P90/265
摘要： A method of verifying the placement of sub-resolution assist features (SRAFs) in a photomask layout is described. SRAFs are added to the photomask layout to enhance the process window for semi-isolated and isolated features. Rules are provided to automatically place the SRAFs into the layout. When deficiencies are detected in the assist feature design or in the automated SRAF placement program, the placement of SRAFs requires verification. The method verifies the correct placement by defining a unique image property linked to the accurate placement of the assist features, and combines it with in-situ image simulation of the individual layout. The placement of the SRAFs is verified by: 1) formulating a unique image property using a technology specific representative sample design with and without properly placed SRAFs; 2) simulating the resist image of each individual device layout in the photomask, considering the layout environment of each individual device, and analyzing the unique image properties associated with the device being examined; 3) sorting the geometric properties of each device into predetermined category; and 4) for each individual device layout, examining the image property value and geometric category values, and determining whether the device is adequately surrounded by SRAFs. If not, individual device on the photomask layout are marked with error marker shapes to be subsequently corrected.
摘要翻译：描述了在光掩模布局中验证子分辨率辅助特征（SRAF）的放置的方法。将SRAF添加到光掩模布局中以增强半隔离和隔离特征的过程窗口。提供了自动将SRAF放入布局的规则。在辅助功能设计或自动SRAF放置程序中检测到缺陷时，SRAF的放置需要验证。该方法通过定义与辅助特征的准确放置相关联的唯一图像属性来验证正确的位置，并将其与单个布局的原位图像模拟相结合。通过以下方式验证SRAF的放置：1）使用具有和不具有正确放置的SRAF的技术特定代表性样本设计来制定独特的图像属性; 2）模拟光掩模中每个单独设备布局的抗蚀剂图像，考虑每个单独设备的布局环境，并分析与被检测设备相关联的独特图像属性; 3）将每个设备的几何属性分类为预定类别; 和4）对于每个单独的设备布局，检查图像属性值和几何类别值，以及确定设备是否被SRAF充分地包围。如果不是，光掩模布局上的单个设备将标记有错误标记形状，以便随后更正。

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