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1. 发明授权

US08681894B2 Digital affine transformation modulated power amplifier for wireless communications 有权
标题翻译：用于无线通信的数字仿射变换调制功率放大器
公开(公告)号：US08681894B2
公开(公告)日：2014-03-25
申请号：US12611677
申请日：2009-11-03
申请人： Fenghao Mu , Sven Mattisson
发明人： Fenghao Mu , Sven Mattisson
IPC分类号： H04L27/00
CPC分类号： H03F3/24 , H03F3/195 , H03F3/211 , H03F2200/336
摘要： A digital affine transformation modulator and power amplifier drives a transmitter antenna. The modulator performs an affine transformation on a signal, wherein the I, Q space is mapped to a plurality of sectors. A signal in a sector is expressed as the sum of two vectors, the angles of which define the sector boundaries. A digital power amplifier comprises a plurality of amplifier cells, each cell comprising at least two amplifier units. For a given signal, each amplifier unit selectively amplifies a clock signal having a phase corresponding to one of the boundary angles of the signal's affine transformed sector. A subset of the plurality of amplifier cells receiving each phase clock signal are enabled, based on the magnitude of the associated vector describing the signal in affine transform space. The modulation scheme exhibits higher efficiency than quadrature modulation, without the bandwidth expansion and group delay mismatch of polar modulation.
摘要翻译：数字仿射变换调制器和功率放大器驱动发射机天线。调制器对信号执行仿射变换，其中I，Q空间映射到多个扇区。扇区中的信号被表示为两个矢量的和，它们的角度限定了扇区边界。数字功率放大器包括多个放大器单元，每个单元包括至少两个放大器单元。对于给定信号，每个放大器单元选择性地放大具有对应于信号仿射变换扇区的一个边界角的相位的时钟信号。基于描述仿射变换空间中的信号的相关矢量的大小，启用接收每个相位时钟信号的多个放大器单元的子集。调制方案表现出比正交调制更高的效率，没有频带扩展和极化调制的群延迟失配。

2. 发明申请

US20140051441A1 Complex Intermediate Frequency Based Receiver Architecture 有权
标题翻译：复杂的基于中频的接收机架构
公开(公告)号：US20140051441A1
公开(公告)日：2014-02-20
申请号：US13983566
申请日：2012-01-25
申请人： Leif Wilhelmsson , Lars Sundstrom , Fenghao Mu
发明人： Leif Wilhelmsson , Lars Sundstrom , Fenghao Mu
IPC分类号： H04W36/30 , H04B17/00
CPC分类号： H04W36/30 , H03D7/18 , H03D2200/0045 , H04B17/327 , H04B17/336
摘要： The disclosure relates to a Complex Intermediate Frequency (CIF)-based receiver adapted to process a received signal comprising a signal component at a desired frequency and a signal component as an image frequency. The CIF-based receiver determines the power of the received signal by calibrating the receiver to minimize the power of the signal component at the image frequency that interferes with the signal component at the desired frequency, introduces signal leakage from the image frequency to intentionally degrade the quality of the signal component at the desired frequency, and determines the power of the signal component at the image frequency based on the amount of degradation.
摘要翻译：本公开涉及一种适用于处理包含期望频率的信号分量和信号分量的接收信号作为图像频率的基于复数中频（CIF）的接收机。基于CIF的接收机通过校准接收机来确定接收信号的功率，以使图像频率处的信号分量的功率最小化，以在期望的频率处干扰信号分量，引入来自图像频率的信号泄漏以故意降级以期望频率的信号分量的质量，并且基于退化量确定图像频率处的信号分量的功率。

3. 发明申请

US20130281043A1 Low Noise Amplifier 有权
标题翻译：低噪声放大器
公开(公告)号：US20130281043A1
公开(公告)日：2013-10-24
申请号：US13992804
申请日：2011-12-09
申请人： Fenghao Mu
发明人： Fenghao Mu
IPC分类号： H03F3/193
CPC分类号： H03F3/193 , H03F1/223 , H03F1/347 , H03F3/45179 , H03F2200/06 , H03F2200/09 , H03F2200/294 , H03F2200/541 , H03F2203/45386 , H03F2203/45394 , H03F2203/45516 , H03F2203/45522 , H03F2203/45528 , H03F2203/45544 , H03F2203/45554 , H03F2203/45591 , H03F2203/45621 , H03F2203/45631 , H03F2203/45638 , H03F2203/45662 , H03F2203/45731
摘要： A low noise amplifier comprises at least one amplifying transistor (Ts1; Ts2) configured in a common source configuration to receive an input signal (RFin) at a gate terminal and provide an amplified signal at a drain terminal and at least one feedback path arranged to couple a part of the amplified signal back to the gate terminal and comprising a feedback impedance. The low noise amplifier further comprises a self-coupled step-up transformer having at least one primary winding (Lp) connected to a supply voltage (Vdd) and the drain terminal of the at least one amplifying transistor and at least one self-coupled secondary inductor winding (Lf1; Lf2) arranged in the feedback path. The low noise amplifier provides a better suppression for out-band interference and at the same time it has a wider input match bandwidth, decent conversion gain and decent noise figure without increasing power consumption.
摘要翻译：低噪声放大器包括至少一个配置在公共源配置中的放大晶体管（Ts1; Ts2），用于在栅极端接收输入信号（RFin），并在漏极端提供放大信号，并将至少一个反馈通路布置成将放大的信号的一部分耦合回到栅极端并包括反馈阻抗。低噪声放大器还包括自耦合升压变压器，其具有连接到电源电压（Vdd）的至少一个初级绕组（Lp）和至少一个放大晶体管的漏极端子以及至少一个自耦合次级电感绕组（Lf1; Lf2）布置在反馈路径中。低噪声放大器为带外干扰提供更好的抑制，同时具有更宽的输入匹配带宽，良好的转换增益和体面的噪声系数，而不增加功耗。

4. 发明申请

US20110026638A1 POSITIVE COEFFICIENT WEIGHTED QUADRATURE MODULATION METHOD AND APPARATUS 有权
标题翻译：积极系数权重调制方法和装置
公开(公告)号：US20110026638A1
公开(公告)日：2011-02-03
申请号：US12534294
申请日：2009-08-03
申请人： Fenghao Mu
发明人： Fenghao Mu
IPC分类号： H04L27/36 , H04L27/20
CPC分类号： H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D7/165 , H03D7/166 , H03D2200/0025 , H03D2200/0084 , H03D2200/009
摘要： A differential positive coefficient weighted quadrature modulator is actuated responsive to quadrature clock signals and positive digital modulation signals input to the modulator. The modulator includes an I-channel positive coefficient weighted modulator (PCWM) and a Q-channel PCWM. The I-channel PCWM has differential output nodes configured to output a differential I-channel signal responsive to the state of first and second positive digital modulation signals and first and second complimentary quadrature clock signals input to the I-channel PCWM. The Q-channel PCWM has differential output nodes configured to output a differential Q-channel signal responsive to the state of third and fourth positive digital modulation signals and third and fourth complimentary quadrature clock signals input to the Q-channel PCWM. The positive digital modulation signals input to the I-channel and Q-channel PCWMs have positive amplitude and the I-channel and Q-channel PCWMs conduct at approximately half clock cycle or less of the corresponding quadrature clock signals.
摘要翻译：响应于输入到调制器的正交时钟信号和正数字调制信号，启动差分正系数加权正交调制器。调制器包括I通道正系数加权调制器（PCWM）和Q通道PCWM。 I信道PCWM具有差分输出节点，其被配置为响应于第一和第二正数字调制信号的状态以及输入到I信道PCWM的第一和第二互补正交时钟信号来输出差分I信道信号。 Q通道PCWM具有差分输出节点，其被配置为响应于输入到Q通道PCWM的第三和第四正数字调制信号以及第三和第四互补正交时钟信号的状态输出差分Q信道信号。输入到I信道和Q信道PCWM的正数字调制信号具有正振幅，并且I信道和Q信道PCWM在相应的正交时钟信号的大约半个时钟周期或更短周期内传导。

5. 发明申请

US20110025415A1 Digital Modulated RF Power Amplifier with Impedance Compensation Circuit 有权
标题翻译：具有阻抗补偿电路的数字调制型RF功率放大器
公开(公告)号：US20110025415A1
公开(公告)日：2011-02-03
申请号：US12630320
申请日：2009-12-03
申请人： Fenghao Mu
发明人： Fenghao Mu
IPC分类号： H03F3/217
CPC分类号： H03F1/56 , H03F3/193 , H03F3/2175
摘要： A digital modulated power amplifier unit includes a differential radio frequency (RF) amplifier circuit having differential output nodes, a digital modulation signal input and complimentary clock signal inputs. The differential RF amplifier circuit includes a first pair of transistors operable to receive a digital modulation signal and a second pair of transistors operable to receive complimentary clock signals. The digital modulated power amplifier unit further includes an impedance compensation circuit connected between the differential output nodes of the differential RF amplifier circuit. The impedance compensation circuit includes a transistor connected in series between first and second RC circuits. The transistor is operable to electrically connect and disconnect the first RC circuit and the second RC circuit responsive to the digital modulation signal.
摘要翻译：数字调制功率放大器单元包括具有差分输出节点的差分射频（RF）放大器电路，数字调制信号输入和补充时钟信号输入。差分RF放大器电路包括可操作以接收数字调制信号的第一对晶体管和可操作以接收互补时钟信号的第二对晶体管。数字调制功率放大器单元还包括连接在差分RF放大器电路的差分输出节点之间的阻抗补偿电路。阻抗补偿电路包括串联连接在第一和第二RC电路之间的晶体管。晶体管可操作以响应于数字调制信号电连接和断开第一RC电路和第二RC电路。

6. 发明申请

US20100253442A1 Tank Tuning for Band Pass Filter Used in Radio Communications 有权
标题翻译：无线电通信中使用的带通滤波器的坦克调谐
公开(公告)号：US20100253442A1
公开(公告)日：2010-10-07
申请号：US12417446
申请日：2009-04-02
申请人： Fenghao Mu
发明人： Fenghao Mu
IPC分类号： H04B3/04 , H03H7/00
CPC分类号： H03J3/20 , H03J2200/10 , H04B1/18
摘要： A tuning method and circuit for an LC tank resonant circuit, including an inductor and a variable capacitor, are described. In a tuning mode, an RF input signal is applied to an input port of the circuit, and the RF output signal is monitored as a variable capacitor control input is varied. A peak output is detected, and the corresponding variable capacitor control input is stored, and applied to the variable capacitor in an operating mode. In one embodiment, the variable capacitor control input is adjusted for delay in the peak detection process. In one embodiment, the variable capacitor comprises a coarse capacitor and a fine capacitor; the tuning procedure is repeated for each capacitor; and both coarse and fine variable capacitor control inputs are stored and applied to the respective capacitors in operating mode.
摘要翻译：描述了包括电感器和可变电容器的用于LC箱谐振电路的调谐方法和电路。在调谐模式中，RF输入信号被施加到电路的输入端口，并且随着可变电容器控制输入的变化，RF输出信号被监视。检测到峰值输出，并存储相应的可变电容器控制输入，并以工作模式将其施加到可变电容器。在一个实施例中，针对峰值检测处理中的延迟来调节可变电容器控制输入。在一个实施例中，可变电容器包括粗电容器和精细电容器; 每个电容重复调谐过程; 并且粗调和微调可变电容器控制输入都以操作模式存储并施加到相应的电容器。

7. 发明申请

US20090268849A1 Passive Miser and Four-Phase Clocking Method and Apparatus 有权
标题翻译：无源智能和四相时钟方法与装置
公开(公告)号：US20090268849A1
公开(公告)日：2009-10-29
申请号：US12108252
申请日：2008-04-23
申请人： Fenghao Mu , Fredrik Tillman
发明人： Fenghao Mu , Fredrik Tillman
IPC分类号： H04L27/22
CPC分类号： H03D7/163 , H03D7/1441 , H03D7/1458 , H03D7/1466 , H03D7/165 , H03D7/166 , H03D2200/0043 , H03D2200/0084 , H03D2200/0088 , H03D2200/009
摘要： According to one embodiment, a radio frequency receiver comprises a quadrature mixer configured to convert radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer comprises an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer comprises a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a plurality of quadrature pulsed clock signals and delayed versions of the quadrature pulsed clock signals. The quadrature pulsed clock signals and the delayed versions of the quadrature pulsed clock signals drive the mixer input switch transistors and the output switch transistors.
摘要翻译：根据一个实施例，射频接收机包括被配置为将射频信号转换为基带信号或中频信号的正交混频器。正交混频器包括同相无源混频器和正交相位无源混频器。每个无源混频器包括具有多个混频器输入开关晶体管的混频器核心和连接到混频器输入开关晶体管的多个输出开关晶体管。时钟电路产生正交脉冲时钟信号的多个正交脉冲时钟信号和延迟版本。正交脉冲时钟信号和正交脉冲时钟信号的延迟版本驱动混频器输入开关晶体管和输出开关晶体管。

8. 发明授权

US08983471B2 Complex intermediate frequency based receiver architecture 有权
标题翻译：基于复杂中频接收机架构
公开(公告)号：US08983471B2
公开(公告)日：2015-03-17
申请号：US13983566
申请日：2012-01-25
申请人： Leif Wilhelmsson , Lars Sundstrom , Fenghao Mu
发明人： Leif Wilhelmsson , Lars Sundstrom , Fenghao Mu
IPC分类号： H04W36/30 , H03D7/18 , H04B17/00
CPC分类号： H04W36/30 , H03D7/18 , H03D2200/0045 , H04B17/327 , H04B17/336
摘要： The disclosure relates to a Complex Intermediate Frequency (CIF)-based receiver adapted to process a received signal comprising a signal component at a desired frequency and a signal component as an image frequency. The CIF-based receiver determines the power of the received signal by calibrating the receiver to minimize the power of the signal component at the image frequency that interferes with the signal component at the desired frequency, introduces signal leakage from the image frequency to intentionally degrade the quality of the signal component at the desired frequency, and determines the power of the signal component at the image frequency based on the amount of degradation.
摘要翻译：本公开涉及一种适用于处理包含期望频率的信号分量和信号分量的接收信号作为图像频率的基于复数中频（CIF）的接收机。基于CIF的接收机通过校准接收机来确定接收信号的功率，以使图像频率处的信号分量的功率最小化，以在期望的频率处干扰信号分量，引入来自图像频率的信号泄漏以故意降级以期望频率的信号分量的质量，并且基于退化量确定图像频率处的信号分量的功率。

9. 发明授权

US08792581B2 RF clock generator with spurious tone cancellation 有权
标题翻译： RF时钟发生器，具有杂音消除
公开(公告)号：US08792581B2
公开(公告)日：2014-07-29
申请号：US12708345
申请日：2010-02-18
申请人： Fenghao Mu , Henrik Sjöland
发明人： Fenghao Mu , Henrik Sjöland
IPC分类号： H03K9/00 , H04L25/49
CPC分类号： H03B28/00 , H03F1/3247
摘要： A clock generator circuit may generate a target clock signal and may include a pattern generator to generate a pre-distorted version of a modulation signal from patterns stored by the pattern generator. An up-converter may up-convert the pre-distorted version of the modulation signal and a radio frequency lock oscillator signal to obtain an RF clock signal having a desired frequency tone. A tone detection circuit may receive the RF clock signal and detect a presence of unwanted tones. A controller may write the patterns corresponding to the pre-distorted version of the modulation signal to the pattern generator based on the detected unwanted tones in the RF clock signal.
摘要翻译：时钟发生器电路可以产生目标时钟信号，并且可以包括模式发生器，以从图案发生器存储的模式产生调制信号的预失真版本。上变频器可以上变频调制信号的预失真版本和射频锁定振荡器信号，以获得具有期望频率音调的RF时钟信号。音调检测电路可以接收RF时钟信号并检测不需要的音调的存在。控制器可以基于RF时钟信号中检测到的不需要的音调将与调制信号的预失真版本对应的模式写入模式发生器。

10. 发明申请

US20130183921A1 Complex Intermediate Frequency Mixer Stage and Calibration Thereof 有权
标题翻译：复杂的中频混频器及其校准
公开(公告)号：US20130183921A1
公开(公告)日：2013-07-18
申请号：US13823785
申请日：2011-09-16
申请人： Fenghao Mu , Lars Sundström , Leif Wilhelmsson
发明人： Fenghao Mu , Lars Sundström , Leif Wilhelmsson
IPC分类号： H04B1/06
CPC分类号： H04B1/06 , H03D7/166 , H03D7/18
摘要： The invention relates to a complex intermediate frequency (CIF) mixer stage, methods of operation thereof, and methods of calibration thereof. The CIF mixer stage comprises numerous individual mixers driven by IF clock signals to down-convert received IF signals into a set of signals at baseband frequency which are further combined to form a lower side band signal and an upper side band signal. The IF clock signals used have a predefined phase relationship among them, which involves tunable phase skews. By calibration of the conversion gains and the phases of the IF clock signals the gain and phase imbalance introduced in a preceding radio frequency mixer stage and/or the CIF mixer stage can be cancelled. Further, in-channel IQ leakage control can be applied to the lower side band signal and/or the upper side band signal. The CIF mixer stage can thus effectively suppress image interference and IQ leakage.
摘要翻译：本发明涉及复杂中频（CIF）混频器级，其操作方法及其校准方法。 CIF混频器级包括由IF时钟信号驱动的多个单独的混频器，以将接收到的IF信号降频转换成基带频率的一组信号，这些信号进一步组合以形成下边带信号和上边带信号。所使用的IF时钟信号之间具有预定的相位关系，这涉及可调节的相位偏差。通过校准转换增益和IF时钟信号的相位，可以取消在前一个射频混频器级和/或CIF混频器级中引入的增益和相位不平衡。此外，信道内IQ泄漏控制可以应用于下边带信号和/或上边带信号。因此，CIF混频器级可以有效地抑制图像干扰和IQ泄漏。

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