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    • 1. 发明授权
    • Passive mixer mismatch tuning using self-tests to suppress IM2
    • 无源混频器不匹配调谐采用自检来抑制IM2
    • US08204467B2
    • 2012-06-19
    • US12368785
    • 2009-02-10
    • Fredrik TillmanFenghao Mu
    • Fredrik TillmanFenghao Mu
    • H04B1/26
    • H04B1/30H03D7/18H03D2200/0086
    • The second-order inter-modulation distortion, originating in a differential passive mixer core from imbalance between devices, is reduced by compensating for the mismatch or load, by means of tuning the differential output impedance at the mixer core, or the input impedance of a filter coupled to the output of the passive mixer. Compensating for the imbalance allows greater suppression of even-order harmonics in the differential structure, which reduces second-order intermodulation at the output of the mixers. The compensation is achieved by tunable resistive elements that are calibrated by a built-in self-test architecture. The calibration circuit is deactivated during receiver operation.
    • 通过调整混频器核心的差分输出阻抗或调制器的输入阻抗,通过补偿失配或负载来减少源自器件之间不平衡的差分无源混频器核心的二阶互调失真 滤波器耦合到无源混频器的输出。 补偿不平衡允许更大的抑制差分结构中的偶次谐波,这减少了混频器输出端的二阶互调。 补偿通过可调电阻元件实现,该电阻元件由内置的自检架构校准。 在接收机操作期间,校准电路被禁用。
    • 2. 发明申请
    • Passive Mixer Mismatch Tuning Using Self-Tests to Suppress IM2
    • 被动混频器不匹配调整使用自检来抑制IM2
    • US20100203860A1
    • 2010-08-12
    • US12368785
    • 2009-02-10
    • Fredrik TillmanFenghao Mu
    • Fredrik TillmanFenghao Mu
    • H04B1/16
    • H04B1/30H03D7/18H03D2200/0086
    • The second-order inter-modulation distortion, originating in a differential passive mixer core from imbalance between devices, is reduced by compensating for the mismatch or load, by means of tuning the differential output impedance at the mixer core, or the input impedance of a filter coupled to the output of the passive mixer. Compensating for the imbalance allows greater suppression of even-order harmonics in the differential structure, which reduces second-order intermodulation at the output of the mixers. The compensation is achieved by tunable resistive elements that are calibrated by a built-in self-test architecture. The calibration circuit is deactivated during receiver operation.
    • 通过调整混频器核心的差分输出阻抗或调制器的输入阻抗,通过补偿失配或负载来减少源自器件之间不平衡的差分无源混频器核心的二阶互调失真 滤波器耦合到无源混频器的输出。 补偿不平衡允许更大的抑制差分结构中的偶次谐波,这减少了混频器输出端的二阶互调。 补偿通过可调电阻元件实现,该电阻元件由内置的自检架构校准。 在接收机操作期间,校准电路被禁用。
    • 6. 发明授权
    • Passive mixer and four phase clocking method and apparatus
    • 无源混频器和四相时钟方法及装置
    • US08099070B2
    • 2012-01-17
    • US12108239
    • 2008-04-23
    • Fenghao MuFredrik Tillman
    • Fenghao MuFredrik Tillman
    • H04B1/16
    • H03D7/166H03D7/1441H03D7/1458H03D7/1466H03D7/163H03D7/165H03D2200/0043H03D2200/0084H03D2200/0088H03D2200/009
    • According to one embodiment, a radio frequency receiver includes a quadrature mixer for converting radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer includes an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer includes a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a first set of clock signals and a second set of clock signals. The first set of clock signals has a frequency twice that of the second set of clock signals. The first set of clock signals is arranged to drive the mixer input switch transistors and the second set of clock signals is arranged to drive the output switch transistors.
    • 根据一个实施例,射频接收机包括用于将射频信号转换成基带信号或中频信号的正交混频器。 正交混频器包括同相无源混频器和正交相位无源混频器。 每个无源混频器包括具有多个混频器输入开关晶体管的混频器核心和连接到混频器输入开关晶体管的多个输出开关晶体管。 时钟电路产生第一组时钟信号和第二组时钟信号。 第一组时钟信号的频率是第二组时钟信号的两倍。 第一组时钟信号被布置成驱动混频器输入开关晶体管,并且第二组时钟信号被布置成驱动输出开关晶体管。
    • 7. 发明申请
    • Re-Configurable Passive Mixer for Wireless Receivers
    • 无线接收机的可重构无源混频器
    • US20100081408A1
    • 2010-04-01
    • US12243232
    • 2008-10-01
    • Fenghao MuFredrik Tillman
    • Fenghao MuFredrik Tillman
    • H04B1/26
    • H03D7/1441H03D7/1458H03D7/1466H03D7/165H03D2200/0023H03D2200/0043H03D2200/0084H03D2200/0088
    • A configurable passive mixer is described herein. According to one exemplary embodiment, the passive mixer comprises a clock generator, a controller, and a plurality of passive mixer cores connected in parallel. The clock generator comprises a local oscillator drive unit for each passive mixer core. The controller varies an effective transistor size of the passive mixer by separately configuring each of the passive mixer cores to enable/disable each passive mixer core. For example, the controller may selectively enable one or more of the passive mixer cores to vary the effective transistor width of the passive mixer. As the performance requirements and/or the operating communication standard change, the controller may re-configure each passive mixer core.
    • 这里描述了可配置的无源混频器。 根据一个示例性实施例,无源混频器包括时钟发生器,控制器和并联连接的多个无源混频器核心。 时钟发生器包括用于每个无源混频器核心的本地振荡器驱动单元。 控制器通过分别配置每个无源混频器内核来实现/禁用每个无源混频器内核,从而改变无源混频器的有效晶体管尺寸。 例如,控制器可以选择性地使一个或多个无源混频器内核改变无源混频器的有效晶体管宽度。 随着性能要求和/或操作通信标准的改变,控制器可以重新配置每个无源混频器核心。
    • 8. 发明授权
    • Down-conversion using square wave local oscillator signals
    • 使用方波本地振荡器信号进行下变频
    • US08665000B2
    • 2014-03-04
    • US13576827
    • 2011-02-14
    • Stefan AnderssonFredrik TillmanImad Ud DinDaniel Eckerbert
    • Stefan AnderssonFredrik TillmanImad Ud DinDaniel Eckerbert
    • G06G7/12
    • H03D7/165H03D7/18H03D2200/0086
    • A method of frequency down-converting an input signal to an output signal, a first local oscillator signal is generated as a square wave having a duty cycle of 1/3 or 2/3, and the input signal is mixed with first oscillator signal to achieve a first down-converted signal, a second local oscillator signal is generated as a modified square wave having the same period time as the first oscillator signal and a duty cycle of 2/3, of which one part has a positive amplitude and another part has a negative amplitude. The input signal is mixed with the second oscillator signal to achieve a second down-converted signal. The first oscillator signal has a delay of 1/4 of the period time to achieve a phase shift of π/2 between the oscillator signals, and at least one down-converted signal is multiplied by a pre-calculated factor. The resulting down-converted signals are added to achieve the output signal.
    • 将输入信号下变频为输出信号的方法,产生第一本地振荡器信号作为占空比为1/3或2/3的方波,并将输入信号与第一振荡器信号混合 实现第一下变频信号,产生第二本地振荡器信号作为具有与第一振荡器信号相同周期时间的修正方波,并且产生其中一部分具有正振幅的占空比2/3,另一部分 具有负幅度。 输入信号与第二振荡器信号混合以实现第二下变频信号。 第一振荡器信号具有周期时间的1/4的延迟以实现振荡器信号之间的π/ 2的相移,并且至少一个下变频信号乘以预先计算的因子。 所产生的下变频信号被加入以实现输出信号。