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1. 发明授权

US07304327B1 Thyristor circuit and approach for temperature stability 失效
标题翻译：晶闸管电路和温度稳定性方法
公开(公告)号：US07304327B1
公开(公告)日：2007-12-04
申请号：US10706162
申请日：2003-11-12
申请人： Farid Nemati , Kailash Gopalakrishnan , Andrew E. Horch
发明人： Farid Nemati , Kailash Gopalakrishnan , Andrew E. Horch
IPC分类号： H01L29/745
CPC分类号： G11C11/39 , H01L29/7436 , H01L29/749
摘要： Switching operations, such as those used in memory devices, are enhanced using a semiconductor device having a thyristor adapted to switch between conducting and blocking states and operate at low power. According to an example embodiment of the present invention, thyristor characteristics are managed over a broad temperature range using a control circuit for coupling a signal, such as a DC voltage signal, to a portion of a thyristor for controlling temperature-related operation thereof, e.g., for controlling bipolar gains. In one implementation, a control port adaptively adjusts a signal coupled to the thyristor as a function of temperature, such that at relatively low temperatures unwanted increases in holding current (IH) are prevented. In another implementation, the control port couples the signal at relatively high temperature operation for controlling the forward blocking voltage (VFB) in such a manner that a blocking state of the thyristor is held. In still another implementation, a circuit controller is adapted for applying the signal to the thyristor via the control port as a function of temperature by monitoring operation of a reference thyristor. With these approaches, thyristor operation can be maintained in a relatively stable manner over a broad temperature range.
摘要翻译：使用具有适于在导通和阻塞状态之间切换并且以低功率操作的晶闸管的半导体器件来增强诸如存储器件中使用的切换操作。根据本发明的示例性实施例，使用用于将诸如DC电压信号的信号耦合到用于控制其温度相关操作的晶闸管的一部分的控制电路，在宽温度范围内管理晶闸管特性，例如，用于控制双极增益。在一个实施方案中，控制端口自适应地调节作为温度的函数耦合到晶闸管的信号，使得在相对较低的温度下，防止了保持电流（I H H）的不期望的增加。在另一实施方案中，控制端口以相对较高的温度操作耦合信号，以便控制可控硅晶闸管的阻塞状态的方式来控制正向阻断电压（V SUB FB）。在另一个实施方式中，电路控制器适于通过监视参考晶闸管的操作，通过控制端口将信号作为温度的函数施加到晶闸管。利用这些方法，可以在宽的温度范围内以相对稳定的方式保持晶闸管操作。

2. 发明授权

US07491586B2 Semiconductor device with leakage implant and method of fabrication 失效
标题翻译：具有漏电注入的半导体器件及其制造方法
公开(公告)号：US07491586B2
公开(公告)日：2009-02-17
申请号：US11159514
申请日：2005-06-22
申请人： Andrew E Horch , Hyun-Jin Cho , Farid Nemati , Scott Robins , Rajesh N. Gupta , Kevin J. Yang
发明人： Andrew E Horch , Hyun-Jin Cho , Farid Nemati , Scott Robins , Rajesh N. Gupta , Kevin J. Yang
IPC分类号： H01L21/332 , H01L21/04 , H01L21/425
CPC分类号： G11C11/39 , H01L27/0817 , H01L29/7436 , H01L29/7455 , H01L29/749
摘要： A method of fabricating a thyristor-based memory may include forming different opposite conductivity-type regions in silicon for defining a thyristor and an access device in series relationship. An activation anneal may activate dopants previously implanted for the different regions. A damaging implant of germanium or xenon or argon may be directed into select regions of the silicon including at least one p-n junction region for the access device and the thyristor. A re-crystallization anneal may then be performed to re-crystallize at least some of the damaged lattice structure resulting from the damaging implant. The re-crystallization anneal may use a temperature less than that of the previous activation anneal.
摘要翻译：制造基于晶闸管的存储器的方法可以包括在硅中形成用于限定可控硅和串联连接的存取装置的不同的相反导电型区域。激活退火可以激活先前为不同区域植入的掺杂剂。可以将锗或氙或氩的有害植入物引导到硅的选择区域中，包括用于进入装置和晶闸管的至少一个p-n结区域。然后可以进行重结晶退火，以重新结晶由损伤性植入物引起的至少一些损伤的晶格结构。再结晶退火可以使用比先前激活退火的温度低的温度。

3. 发明授权

US07037763B1 Gated-thyristor approach having angle-implanted base region 失效
标题翻译：具有角度注入基极区域的门控晶闸管方法
公开(公告)号：US07037763B1
公开(公告)日：2006-05-02
申请号：US10739859
申请日：2003-12-18
申请人： Farid Nemati , Scott Robins , Andrew E. Horch
发明人： Farid Nemati , Scott Robins , Andrew E. Horch
IPC分类号： H01L21/332
CPC分类号： H01L27/0817 , H01L29/742 , H01L29/7436
摘要： In an example gated-thyristor circuit, formation of thyristor body regions involves an angled implant of a thyristor body region, such as a base region, to mitigate capacitive coupling of a gated voltage pulse from the thyristor gate to a body region that is not underlying the thyristor gate. According to a more particular example embodiment, such a thyristor switches between a current-passing mode and a current blocking mode in response to at least one voltage pulse coupling to an underlying thyristor base region. Using a first ion type to provide one polarity, an immediately-adjacent thyristor base region is angle implanted through an emitter body region that is located to other side of the adjacent thyristor base region. The emitter body region is then implanted using ions of another ion type to provide the opposite polarity. This angle implantation permits definition of the adjacent thyristor base region sufficiently distant from (e.g., underlapping) the gate to mitigate gate-induced leakage to the second body region and the associated junction leakage between thyristor base regions. Applications include a variety of circuits benefiting from fast-switching and/or small-architecture features; example applications include thyristor-based latches and memory cells and power thyristor circuits.
摘要翻译：在示例性的门控晶闸管电路中，晶闸管体区域的形成涉及晶闸管本体区域（例如基极区域）的成角度注入，以缓解门控电压脉冲从晶闸管门极到不是底层的体区域的电容耦合晶闸管门。根据更具体的示例性实施例，这种晶闸管响应于至少一个连接到下游晶闸管基极区域的电压脉冲而在电流通过模式和电流阻塞模式之间切换。使用第一离子型来提供一个极性，通过位于相邻晶闸管基极区域的另一侧的发射体体区域，直接注入相邻的晶闸管基极区域。然后使用另一离子型离子注入发射体体区域以提供相反的极性。该角度注入允许定义足够远离（例如，重叠）栅极的相邻晶闸管基极区域，以减轻栅极引起的泄漏到第二体区域以及晶闸管基极区域之间的相关连结泄漏。应用包括受益于快速切换和/或小型架构特性的各种电路; 示例应用包括基于晶闸管的锁存器和存储器单元和功率晶闸管电路。

4. 发明授权

US08576649B1 Sense amplifiers and operations thereof 失效
标题翻译：感应放大器及其操作
公开(公告)号：US08576649B1
公开(公告)日：2013-11-05
申请号：US13172017
申请日：2011-06-29
申请人： Farid Nemati
发明人： Farid Nemati
IPC分类号： G11C7/00
CPC分类号： G11C11/39 , G11C7/065 , G11C11/406
摘要： Sense amplifiers and operations thereof are described. More particularly, embodiments of integrated circuit having a sense amplifier coupled to a first bitline and a second bitline of a memory array are described. The sense amplifier generally includes: a latch circuit and a group select input/output circuit, as well as read, reference voltage, and precharge circuitry. Further described is an embodiment of a method for a refresh operation. First data states of a group of memory cells of an array are read and written back as second data states without changing voltages at sense nodes of the latch circuits from the reading, where the second data states are an inverse of the first data states.
摘要翻译：描述了检测放大器及其操作。更具体地，描述了具有耦合到存储器阵列的第一位线和第二位线的读出放大器的集成电路的实施例。读出放大器通常包括：锁存电路和组选择输入/输出电路，以及读取，参考电压和预充电电路。进一步描述了刷新操作的方法的实施例。作为第二数据状态读取并写入阵列的一组存储器单元的第一数据状态，而不改变锁存电路的读出节点处的读取电压，其中第二数据状态是第一数据状态的倒数。

5. 发明申请

US20130182486A1 MEMORY CELLS HAVING A COMMON GATE TERMINAL 有权
公开(公告)号：US20130182486A1
公开(公告)日：2013-07-18
申请号：US13350061
申请日：2012-01-13
申请人： Rajesh N. Gupta , Farid Nemati
发明人： Rajesh N. Gupta , Farid Nemati
IPC分类号： G11C11/21 , H01L21/8239
CPC分类号： H01L27/2454 , G11C11/161 , G11C11/1659 , H01L27/228 , H01L27/2436 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/141 , H01L45/146 , H01L45/147 , H01L45/16 , H01L45/1608
摘要： Arrays of memory cells having a common gate terminal and methods of operating and forming the same are described herein. As an example, an array of memory cells may include a group of memory cells each having a resistive storage element coupled to a select device. Each select device includes a first terminal, a second terminal, and a gate terminal, where the gate terminal is common to each memory cell of the group.

6. 发明授权

US07489008B1 High Ion/Ioff SOI MOSFET using body voltage control 失效
标题翻译：高离子/ Ioff SOI MOSFET采用体电压控制
公开(公告)号：US07489008B1
公开(公告)日：2009-02-10
申请号：US11522037
申请日：2006-09-16
申请人： Zachary K. Lee , Farid Nemati , Scott Robins
发明人： Zachary K. Lee , Farid Nemati , Scott Robins
IPC分类号： H10L27/12
CPC分类号： H01L27/1203 , H01L29/7841
摘要： A semiconductor device may comprise a partially-depleted SOI MOSFET having a floating body region disposed between a source and drain. The floating body region may be driven to receive injected carriers for adjusting its potential during operation of the MOSFET. In a particular case, the MOSFET may comprise another region of semiconductor material in contiguous relationship with a drain/source region of the MOSFET and on a side thereof opposite to the body region. This additional region may be formed with a conductivity of type opposite the drain/source, and may establish an effective bipolar device per the body, the drain/source and the additional region. The geometries and doping thereof may be designed to establish a transport gain of magnitude sufficient to assist the injection of carriers into the floating body region, yet small enough to guard against inter-latching with the MOSFET.
摘要翻译：半导体器件可以包括部分耗尽的SOI MOSFET，其具有设置在源极和漏极之间的浮体区域。可以驱动浮体区域以接收注入的载流子，以在MOSFET的操作期间调整其电位。在特定的情况下，MOSFET可以包括与MOSFET的漏极/源极区域和与体区域相对的一侧连续关系的半导体材料的另一区域。该附加区域可以形成为具有与漏极/源极相反的类型的导电性，并且可以建立每个主体，漏极/源极和附加区域的有效双极器件。其几何形状和掺杂可被设计成建立足以帮助载流子注入浮体区域的传输增益，但足够小以防止与MOSFET的互锁。

7. 发明授权

US07245525B1 Data restore in thryistor based memory devices 失效
标题翻译：基于晶体管的存储器件的数据恢复
公开(公告)号：US07245525B1
公开(公告)日：2007-07-17
申请号：US11194184
申请日：2005-08-01
申请人： Zachary K. Lee , Farid Nemati , Scott Robins
发明人： Zachary K. Lee , Farid Nemati , Scott Robins
IPC分类号： G11C11/00
CPC分类号： G11C11/39
摘要： In a thyristor based memory cell, one end of a reversed-biased diode is connected to the cathode of the thyristor. During standby, the second end of the diode is biased at a voltage that is higher than that at the cathode of the thyristor. During restore operation, the second end is pulled down to zero or even a negative value. If the cell is storing a “1,” the voltage at the thyristor cathode can be approximately 0.6 volt at the time of the pull down. The large forward-bias across the diode pulls down the thryistor cathode. This causes the thyristor to be restored. If the cell is storing a “0,” the voltage at the thyristor cathode can be approximately zero volt. The small or zero forward-bias across the diode is unable to disturb the “0” state. As a result, the memory cell is restored to its original state.
摘要翻译：在基于晶闸管的存储单元中，反向偏置二极管的一端连接到晶闸管的阴极。在待机期间，二极管的第二端被偏置在高于晶闸管阴极处的电压。在恢复操作期间，第二端被拉低至零或甚至负值。如果电池正在存储“1”，则在下拉时，晶闸管阴极处的电压可能约为0.6伏特。二极管两端的大正向偏置可降低晶闸管阴极。这导致晶闸管恢复。如果电池正在存储“0”，晶闸管阴极处的电压可以近似为零伏。二极管两端的小或零正向偏置不能干扰“0”状态。结果，存储单元恢复到其原始状态。

8. 发明授权

US06967358B2 Thyristor-type memory device 失效
标题翻译：晶闸管型存储器件
公开(公告)号：US06967358B2
公开(公告)日：2005-11-22
申请号：US10777453
申请日：2004-02-12
申请人： Farid Nemati , James D. Plummer
发明人： Farid Nemati , James D. Plummer
IPC分类号： G11C11/41 , G11C11/39 , H01L21/8244 , H01L27/06 , H01L27/11 , H01L29/417 , H01L29/423 , H01L29/74 , H01L29/87
CPC分类号： H01L29/74 , G11C11/39 , H01L27/0617 , H01L27/0688 , H01L27/1023 , H01L27/1027 , H01L27/11 , H01L27/1104 , H01L29/41716 , H01L29/42308 , H01L29/749 , H01L29/87
摘要： A thyristor device can be used to implement a variety of semiconductor memory circuits, including high-density memory-cell arrays and single cell circuits. In one example embodiment, the thyristor device includes doped regions of opposite polarity, and a first word line that is used to provide read and write access to the memory cell. A second word line is located adjacent to and separated by an insulative material from one of the doped regions of the thyristor device for write operations to the memory cell, for example, by enhancing the switching of the thyristor device from a high conductance state to a low conductance state and/or from the low conductance state to the high conductance. This type of memory circuit can be implemented to significantly reduce standby power consumption and access time.
摘要翻译：晶闸管器件可用于实现包括高密度存储单元阵列和单个单元电路的各种半导体存储器电路。在一个示例性实施例中，晶闸管器件包括具有相反极性的掺杂区域，以及用于向存储器单元提供读取和写入访问的第一字线。第二字线例如通过增强晶闸管器件从高电导状态到高电导状态的切换而位于与用于写入操作的晶闸管器件的掺杂区域中的一个的绝缘材料相邻并由绝缘材料隔开的位置低电导状态和/或从低电导状态到高电导状态。可以实现这种类型的存储器电路，以显着降低待机功耗和访问时间。

9. 发明授权

US06944051B1 Data restore in thryistor based memory devices 失效
标题翻译：基于晶体管的存储器件的数据恢复
公开(公告)号：US06944051B1
公开(公告)日：2005-09-13
申请号：US10695171
申请日：2003-10-29
申请人： Zachary K. Lee , Farid Nemati , Scott Robins
发明人： Zachary K. Lee , Farid Nemati , Scott Robins
IPC分类号： G11C11/00
CPC分类号： G11C11/39
摘要： In a thyristor based memory cell, one end of a reversed-biased diode is connected to the cathode of the thyristor. During standby, the second end of the diode is biased at a voltage that is higher than that at the cathode of the thyristor. During restore operation, the second end is pulled down to zero or even a negative value. If the cell is storing a “1,” the voltage at the thyristor cathode can be approximately 0.6 volt at the time of the pull down. The large forward-bias across the diode pulls down the thryistor cathode. This causes the thyristor to be restored. If the cell is storing a “0,” the voltage at the thyristor cathode can be approximately zero volt. The small or zero forward-bias across the diode is unable to disturb the “0” state. As a result, the memory cell is restored to its original state.
摘要翻译：在基于晶闸管的存储单元中，反向偏置二极管的一端连接到晶闸管的阴极。在待机期间，二极管的第二端被偏置在高于晶闸管阴极处的电压。在恢复操作期间，第二端被拉低至零或甚至负值。如果电池正在存储“1”，则在下拉时，晶闸管阴极处的电压可能约为0.6伏特。二极管两端的大正向偏置可降低晶闸管阴极。这导致晶闸管恢复。如果电池正在存储“0”，晶闸管阴极处的电压可以近似为零伏。二极管两端的小或零正向偏置不能干扰“0”状态。结果，存储单元恢复到其原始状态。

10. 发明授权

US06885581B2 Dynamic data restore in thyristor-based memory device 失效
标题翻译：基于晶闸管的存储器件中的动态数据恢复
公开(公告)号：US06885581B2
公开(公告)日：2005-04-26
申请号：US10472737
申请日：2002-04-05
申请人： Farid Nemati , Hyun-Jin Cho , Robert Homan Igehy
发明人： Farid Nemati , Hyun-Jin Cho , Robert Homan Igehy
IPC分类号： G11C7/00 , G11C11/00 , G11C11/39 , H01L29/866
CPC分类号： G11C11/39
摘要： A dynamically-operating restoration circuit (106) is used to apply a voltage or current restore pulse signal to thyristor-based memory cells (108) and therein restore data in the cell using the internal positive feedback loop of the thyristor (110). In one example implementation, the internal positive feedback loop in the thyristor (110) is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.
摘要翻译：使用动态操作的恢复电路（106）将电压或电流恢复脉冲信号施加到基于晶闸管的存储器单元（108），并且其中使用晶闸管（110）的内部正反馈环路在单元中恢复数据。在一个示例实现中，晶闸管（110）中的内部正反馈环路用于在晶闸管电流下降到保持电流之前恢复器件的导通状态。定义并施加脉冲和/或周期波形以确保晶闸管不从其导通状态释放。晶闸管周期性恢复电流的时间平均值可能低于保持电流阈值。虽然不一定限于基于晶闸管的存储器单元，但是已经发现本发明的各种实施例对于其中使用薄电容耦合晶闸管来提供双向的高速，低功率存储器单元特别有用稳定存储元件

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