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    • 1. 发明授权
    • Dynamic data restore in thyristor-based memory device
    • 基于晶闸管的存储器件中的动态数据恢复
    • US06885581B2
    • 2005-04-26
    • US10472737
    • 2002-04-05
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • G11C7/00G11C11/00G11C11/39H01L29/866
    • G11C11/39
    • A dynamically-operating restoration circuit (106) is used to apply a voltage or current restore pulse signal to thyristor-based memory cells (108) and therein restore data in the cell using the internal positive feedback loop of the thyristor (110). In one example implementation, the internal positive feedback loop in the thyristor (110) is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.
    • 使用动态操作的恢复电路(106)将电压或电流恢复脉冲信号施加到基于晶闸管的存储器单元(108),并且其中使用晶闸管(110)的内部正反馈环路在单元中恢复数据。 在一个示例实现中,晶闸管(110)中的内部正反馈环路用于在晶闸管电流下降到保持电流之前恢复器件的导通状态。 定义并施加脉冲和/或周期波形以确保晶闸管不从其导通状态释放。 晶闸管周期性恢复电流的时间平均值可能低于保持电流阈值。 虽然不一定限于基于晶闸管的存储器单元,但是已经发现本发明的各种实施例对于其中使用薄电容耦合晶闸管来提供双向的高速,低功率存储器单元特别有用 稳定存储元件
    • 2. 发明授权
    • Dynamic data restore in thyristor-based memory device
    • 基于晶闸管的存储器件中的动态数据恢复
    • US07042759B2
    • 2006-05-09
    • US11112090
    • 2005-04-22
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • G11C11/00
    • G11C11/39
    • A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.
    • 使用动态操作的恢复电路将电压或电流恢复脉冲信号施加到基于晶闸管的存储器单元,并且其中使用晶闸管的内部正反馈回路在单元中恢复数据。 在一个示例实现中,晶闸管中的内部正反馈环路用于在晶闸管电流下降到保持电流以下之前恢复器件的导通状态。 定义并施加脉冲和/或周期波形以确保晶闸管不从其导通状态释放。 晶闸管周期性恢复电流的时间平均值可能低于保持电流阈值。 虽然不一定限于基于晶闸管的存储器单元,但是已经发现本发明的各种实施例对于其中使用薄电容耦合晶闸管来提供双向的高速,低功率存储器单元特别有用 稳定存储元件
    • 3. 发明授权
    • Dynamic data restore in thyristor-based memory device
    • 基于晶闸管的存储器件中的动态数据恢复
    • US07961540B2
    • 2011-06-14
    • US12182128
    • 2008-07-29
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • G11C11/00
    • G11C11/39
    • A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.
    • 使用动态操作的恢复电路将电压或电流恢复脉冲信号施加到基于晶闸管的存储器单元,并且其中使用晶闸管的内部正反馈回路在单元中恢复数据。 在一个示例实现中,晶闸管中的内部正反馈环路用于在晶闸管电流下降到保持电流以下之前恢复器件的导通状态。 定义并施加脉冲和/或周期波形以确保晶闸管不从其导通状态释放。 晶闸管周期性恢复电流的时间平均值可能低于保持电流阈值。 虽然不一定限于基于晶闸管的存储器单元,但是已经发现本发明的各种实施例对于其中使用薄电容耦合晶闸管来提供双向的高速,低功率存储器单元特别有用 稳定存储元件
    • 4. 发明申请
    • DYNAMIC DATA RESTORE IN THYRISTOR-BASED MEMORY DEVICE
    • 基于存储器的存储器件中的动态数据恢复
    • US20100315871A1
    • 2010-12-16
    • US12182128
    • 2008-07-29
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • G11C11/34
    • G11C11/39
    • A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.
    • 使用动态操作的恢复电路将电压或电流恢复脉冲信号施加到基于晶闸管的存储器单元,并且其中使用晶闸管的内部正反馈回路在单元中恢复数据。 在一个示例实现中,晶闸管中的内部正反馈环路用于在晶闸管电流下降到保持电流以下之前恢复器件的导通状态。 定义并施加脉冲和/或周期波形以确保晶闸管不从其导通状态释放。 晶闸管周期性恢复电流的时间平均值可能低于保持电流阈值。 虽然不一定限于基于晶闸管的存储器单元,但是已经发现本发明的各种实施例对于其中使用薄电容耦合晶闸管来提供双向的高速,低功率存储器单元特别有用 稳定存储元件
    • 5. 发明授权
    • Dynamic data restore in thyristor-based memory device
    • 基于晶闸管的存储器件中的动态数据恢复
    • US07405963B2
    • 2008-07-29
    • US11361334
    • 2006-02-24
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • Farid NematiHyun-Jin ChoRobert Homan Igehy
    • G11C11/00
    • G11C11/39
    • A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal positive feedback loop of the thyristor. In one example implementation, the internal positive feedback loop in the thyristor is used to restore the conducting state of a device after the thyristor current drops below the holding current. A pulse and/or periodic waveform are defined and applied to ensure that the thyristor is not released from its conducting state. The time average of the periodic restore current in the thyristor may be lower than the holding current threshold. While not necessarily limited to memory cells that are thyristor-based, various embodiments of the invention have been found to be the particularly useful for high-speed, low-power memory cells in which a thin capacitively-coupled thyristor is used to provide a bi-stable storage element.
    • 使用动态操作的恢复电路将电压或电流恢复脉冲信号施加到基于晶闸管的存储器单元,并且其中使用晶闸管的内部正反馈回路在单元中恢复数据。 在一个示例实现中,晶闸管中的内部正反馈环路用于在晶闸管电流下降到保持电流以下之前恢复器件的导通状态。 定义并施加脉冲和/或周期波形以确保晶闸管不从其导通状态释放。 晶闸管周期性恢复电流的时间平均值可能低于保持电流阈值。 虽然不一定限于基于晶闸管的存储器单元,但是已经发现本发明的各种实施例对于其中使用薄电容耦合晶闸管来提供双向的高速,低功率存储器单元特别有用 稳定存储元件
    • 6. 发明授权
    • Stability in thyristor-based memory device
    • 基于晶闸管的存储器件的稳定性
    • US06891205B1
    • 2005-05-10
    • US10666220
    • 2003-09-19
    • Hyun-Jin ChoFarid NematiScott Robins
    • Hyun-Jin ChoFarid NematiScott Robins
    • G11C11/39H01L29/74H01L29/749
    • H01L29/749G11C11/39H01L29/7436
    • A semiconductor device having a thyristor-based memory device exhibits improved stability under adverse operating conditions related to temperature, noise, electrical disturbances and light. In one particular example embodiment of the present invention, a semiconductor device includes a thyristor-based memory device that uses a shunt that effects a leakage current in the thyristor. The thyristor includes a capacitively-coupled control port and anode and cathode end portions. Each of the end portions has an emitter region and an adjacent base region. In one implementation, the current shunt is located between the emitter and base region of one of the end portions of the thyristor and is configured and arranged to shunt low-level current therebetween. In connection with an example embodiment, it has been discovered that shunting current in this manner improves the ability of the device to operate under adverse conditions that would, absent the shunt, result in inadvertent turn on, while keeping the standby current of the memory device to an acceptably low level.
    • 具有基于晶闸管的存储器件的半导体器件在与温度,噪声,电扰动和光线相关的不利操作条件下表现出改进的稳定性。 在本发明的一个具体示例实施例中,半导体器件包括基于晶闸管的存储器件,其使用在晶闸管中产生漏电流的分流器。 晶闸管包括电容耦合控制端口和阳极和阴极端部分。 每个端部具有发射极区域和相邻的基极区域。 在一个实施方案中,电流分流器位于晶闸管的一个端部的发射极和基极区域之间,并且被配置和布置成在它们之间分流低电平电流。 结合示例性实施例,已经发现,以这种方式分流电流提高了器件在不利条件下操作的能力,这种不利条件将在不存在分流的情况下导致无意中导通,同时保持存储器件的待机电流 达到可接受的低水平。
    • 7. 发明授权
    • Thyristor-based device including trench isolation
    • 基于晶闸管的器件包括沟槽隔离
    • US06777271B1
    • 2004-08-17
    • US10201654
    • 2002-07-23
    • Scott RobinsAndrew HorchFarid NematiHyun-Jin Cho
    • Scott RobinsAndrew HorchFarid NematiHyun-Jin Cho
    • H01L21332
    • H01L29/66363H01L21/76229H01L21/76237H01L21/763H01L27/0617H01L27/0817
    • A semiconductor device includes a thyristor designed to reduce or eliminate manufacturing and operational difficulties commonly experienced in the formation and operation of NDR devices. According to one example embodiment of the present invention, the semiconductor substrate is trenched adjacent a doped or dopable substrate region, which is formed to included at least two vertically-adjacent thyristor regions of different polarity. A capacitively-coupled control port for the thyristor is coupled to at least one of the thyristor regions. The trench also includes a dielectric material for electrically insulating the vertically-adjacent thyristor regions. The thyristor is electrically connected to other circuitry in the device, such as a transistor, and used to form a device, such as a memory cell.
    • 半导体器件包括设计用于减少或消除在NDR器件的形成和操作中通常经历的制造和操作困难的晶闸管。 根据本发明的一个示例实施例,半导体衬底在掺杂或可掺杂的衬底区域附近被沟槽,该衬底区域形成为包括不同极性的至少两个垂直相邻的晶闸管区域。 用于晶闸管的电容耦合控制端口耦合到至少一个晶闸管区域。 沟槽还包括用于使垂直相邻的晶闸管区域电绝缘的电介质材料。 晶闸管电连接到器件中的其它电路,例如晶体管,并用于形成诸如存储器单元的器件。
    • 10. 发明授权
    • Stability in thyristor-based memory device
    • 基于晶闸管的存储器件的稳定性
    • US06462359B1
    • 2002-10-08
    • US09814980
    • 2001-03-22
    • Farid NematiHyun-Jin ChoScott Robins
    • Farid NematiHyun-Jin ChoScott Robins
    • H01L2974
    • G11C11/39H01L29/7436H01L29/749
    • A semiconductor device having a thyristor-based memory device exhibits improved stability under adverse operating conditions related to temperature, noise, electrical disturbances and light. In one particular example embodiment of the present invention, a semiconductor device includes a thyristor-based memory device that uses a shunt between a base and emitter region in a thyristor that effects a leakage current in the thyristor. The thyristor includes a capacitively coupled control port and anode and cathode end portions. Each of the end portions has an emitter region and an adjacent base region, and the current shunt is located between the emitter and base region of one of the end portions of the thyristor. The current shunt is configured and arranged to shunt low-level current between the emitter region and the adjacent base region, and in doing so improves the ability of the device to operate under adverse conditions that would, absent the shunt, result in inadvertent turn on, while keeping the standby current of the memory device to an acceptably low level.
    • 具有基于晶闸管的存储器件的半导体器件在与温度,噪声,电扰动和光线相关的不利操作条件下表现出改进的稳定性。 在本发明的一个具体示例性实施例中,半导体器件包括基于晶闸管的存储器件,其使用晶闸管中的基极和发射极区之间的分流器,其实现晶闸管中的漏电流。 晶闸管包括电容耦合的控制端口和阳极和阴极端部分。 每个端部具有发射极区域和相邻的基极区域,并且电流分流器位于晶闸管的一个端部的发射极和基极区域之间。 电流分流器被配置和布置成在发射极区域和相邻基极区域之间分流低电平电流,并且在这样做时改善了器件在不利条件下操作的能力,这在不存在分流的情况下导致无意中导通 同时将存储器件的待机电流保持在可接受的低电平。