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1. 发明授权

US07230445B1 System monitor in a programmable logic device 有权
标题翻译：可编程逻辑器件中的系统监视器
公开(公告)号：US07230445B1
公开(公告)日：2007-06-12
申请号：US11590336
申请日：2006-10-31
申请人： F. Erich Goetting , John K. Jennings , Anthony J. Collins , Patrick J. Quinn
发明人： F. Erich Goetting , John K. Jennings , Anthony J. Collins , Patrick J. Quinn
IPC分类号： H03K19/003
CPC分类号： H03K19/17732 , G01R31/3167 , G01R31/318516
摘要： Method and apparatus for a system monitor embedded in a programmable logic device are described. The system monitor includes a dynamic reconfiguration port interface for configuring or reconfiguring the system monitor during operation thereof. The system monitor includes an analog-to-digital converter which is reconfigurable responsive to input via a dynamic reconfiguration port.
摘要翻译：描述嵌入可编程逻辑器件中的系统监视器的方法和装置。系统监视器包括用于在其操作期间配置或重新配置系统监视器的动态重新配置端口接口。系统监视器包括可经由动态重新配置端口响应于输入而重新配置的模数转换器。

2. 发明授权

US07235999B2 System monitor in a programmable logic device 有权
公开(公告)号：US07235999B2
公开(公告)日：2007-06-26
申请号：US11590023
申请日：2006-10-31
申请人： F. Erich Goetting , John K. Jennings , Anthony J. Collins , Patrick J. Quinn
发明人： F. Erich Goetting , John K. Jennings , Anthony J. Collins , Patrick J. Quinn
IPC分类号： H03K19/003
CPC分类号： H03K19/17732 , G01R31/3167 , G01R31/318516
摘要： Method and apparatus for a system monitor embedded in a programmable logic device are described. The system monitor includes a dynamic reconfiguration port interface for configuring or reconfiguring the system monitor during operation thereof. The system monitor includes an analog-to-digital converter which is reconfigurable responsive to input via a dynamic reconfiguration port.

3. 发明授权

US07138820B2 System monitor in a programmable logic device 有权
标题翻译：可编程逻辑器件中的系统监视器
公开(公告)号：US07138820B2
公开(公告)日：2006-11-21
申请号：US10837135
申请日：2004-04-30
申请人： F. Erich Goetting , John K. Jennings , Anthony J. Collins , Patrick J. Quinn
发明人： F. Erich Goetting , John K. Jennings , Anthony J. Collins , Patrick J. Quinn
IPC分类号： H03K19/03
CPC分类号： H03K19/17732 , G01R31/3167 , G01R31/318516
摘要： Method and apparatus for a system monitor (20) embedded in a programmable logic device (10, 50, 60) are described. The system monitor (20) includes a dynamic reconfiguration port interface (205) for configuring or reconfiguring the system monitor (20) during operation thereof. The system monitor (20) includes an analog-to-digital converter (200) which is reconfigurable responsive to input via a dynamic reconfiguration port (201).
摘要翻译：描述嵌入可编程逻辑器件（10,50,60）中的系统监视器（20）的方法和装置。系统监视器（20）包括用于在其操作期间配置或重新配置系统监视器（20）的动态重新配置端口接口（205）。系统监视器（20）包括响应于经由动态重新配置端口（201）的输入而被重新配置的模数转换器（200）。

4. 发明授权

US07599299B2 Dynamic reconfiguration of a system monitor (DRPORT) 有权
标题翻译：动态重新配置系统监视器（DRPORT）
公开(公告)号：US07599299B2
公开(公告)日：2009-10-06
申请号：US10837330
申请日：2004-04-30
申请人： F. Erich Goetting , John McGrath , Anthony J. Collins
发明人： F. Erich Goetting , John McGrath , Anthony J. Collins
IPC分类号： G01R31/08 , G06F11/00 , H04L12/28 , G06F15/173 , H03K17/04
CPC分类号： G01R31/318536
摘要： Method and apparatus for a dynamically reconfigurable system monitor (20) are described. A system monitor (20) has registers (206) accessible via a reconfiguration port (201). At least one of the registers may be dynamically reconfigured via the reconfiguration port (201) to select a channel to be monitored or to store an alarm value to be used in monitoring by the system monitor (20). Additionally, the system monitor (20) may be embedded in a columnar block architecture.
摘要翻译：描述了用于动态可重构系统监视器（20）的方法和装置。系统监视器（20）具有经由重新配置端口（201）可访问的寄存器（206）。可以经由重新配置端口（201）来动态地重新配置寄存器中的至少一个，以选择要监视的通道或存储要由系统监视器（20）监视的警报值。另外，系统监视器（20）可以嵌入在柱状块体系结构中。

5. 发明授权

US07102555B2 Boundary-scan circuit used for analog and digital testing of an integrated circuit 有权
标题翻译：用于集成电路模拟和数字测试的边界扫描电路
公开(公告)号：US07102555B2
公开(公告)日：2006-09-05
申请号：US10837171
申请日：2004-04-30
申请人： Anthony J. Collins , David P. Schultz , Neil G. Jacobson , Edward S. McGettigan , Bradley K. Fross
发明人： Anthony J. Collins , David P. Schultz , Neil G. Jacobson , Edward S. McGettigan , Bradley K. Fross
IPC分类号： H03M1/10 , G01R31/28
CPC分类号： G01R31/3167 , G01R31/318555
摘要： Method and apparatus are described for providing analog capability with boundary-scanning for an integrated circuit. The integrated circuit includes a boundary-scan controller (1517) coupled to an analog-to-digital converter (200). An analog channel is selected for input to the analog-to-digital converter (200). Analog information is converted to digital information by the analog-to-digital converter (200), and then such digital information may be stored in data registers (209) for reading out via the boundary-scan controller (1517).
摘要翻译：描述了用于为集成电路提供具有边界扫描的模拟能力的方法和装置。集成电路包括耦合到模拟 - 数字转换器（200）的边界扫描控制器（1517）。选择模拟通道用于输入到模数转换器（200）。模拟信息由模拟数字转换器（200）转换为数字信息，然后可以将数字信息存储在用于通过边界扫描控制器（1517）读出的数据寄存器（209）中。

6. 发明授权

US07378999B1 Method and apparatus for digital calibration of an analog-to-digital converter 有权
标题翻译：一种模数转换器的数字校准方法和装置
公开(公告)号：US07378999B1
公开(公告)日：2008-05-27
申请号：US11714361
申请日：2007-03-06
申请人： John McGrath , Anthony J. Collins
发明人： John McGrath , Anthony J. Collins
IPC分类号： H03M1/10
CPC分类号： H03M1/1028 , H03M1/14 , H03M1/46
摘要： Method and apparatus for digital calibration of an analog-to-digital converter (ADC). One example relates to calibrating an analog-to-digital (A/D) conversion system having an N-bit resolution. The A/D conversion system includes an ADC that generates an output having N most significant bits (MSBs) and M least significant bits (LSBs) (i.e., an N+M bit resolution). An offset calibration circuit is configured to determine an offset in the ADC and to compensate the N+M bit output using the offset to provide an N+M bit offset corrected output. A gain calibration circuit is configured to determine a gain correction factor for the ADC and to compensate the N+M bit offset corrected output using the gain correction factor to provide an N bit offset and gain corrected output.
摘要翻译：用于模数转换器（ADC）数字校准的方法和装置。一个例子涉及校准具有N位分辨率的模数（A / D）转换系统。 A / D转换系统包括产生具有N个最高有效位（MSB）和M个最低有效位（LSB）（即N + M位分辨率）的输出的ADC。偏移校准电路配置为确定ADC中的偏移量，并使用偏移来补偿N + M位输出，以提供N + M位偏移校正输出。增益校准电路被配置为确定ADC的增益校正因子，并且使用增益校正因子来补偿N + M位偏移校正输出，以提供N位偏移和增益校正输出。

7. 发明授权

US4545358A Crossbow 失效
标题翻译：弩
公开(公告)号：US4545358A
公开(公告)日：1985-10-08
申请号：US522583
申请日：1983-08-12
申请人： Anthony J. Collins
发明人： Anthony J. Collins
IPC分类号： F41B5/12 , F41B5/00
CPC分类号： F41B5/12
摘要： A crossbow has a prod in two parts, each of which is pivotally connected with the stock so that the prod parts can lie alongside the stock when the bow is not in use. When the bow is prepared for use, the prod parts are clamped in operative positions by a mechanism which includes a handle and which provides a substantial mechanical advantage to the operator.
摘要翻译：弩具有两部分的产品，每个部分与坯料枢转连接，使得当弓不使用时，产品可以与坯料一起放置。当弓准备使用时，产品部件通过包括手柄的机构夹紧在操作位置，并且为操作者提供了显着的机械优点。

8. 发明授权

US08182141B1 Method and circuit for providing distributed temperature sensing in an integrated circuit 有权
标题翻译：用于在集成电路中提供分布式温度感测的方法和电路
公开(公告)号：US08182141B1
公开(公告)日：2012-05-22
申请号：US12574442
申请日：2009-10-06
申请人： Anthony J. Collins , Juan J. Noguera Serra
发明人： Anthony J. Collins , Juan J. Noguera Serra
IPC分类号： G01K11/22
CPC分类号： G01K11/22
摘要： In one embodiment, an integrated circuit for providing distributed temperature sensing is disclosed. For example, the integrated circuit comprises a plurality of circuit components, an internal temperature sensing device deployed among the plurality of circuit components; and a plurality of ring-oscillators deployed among the plurality of circuit components, wherein at least one of the plurality of ring-oscillators is deployed adjacent to the internal temperature sensing device, where the plurality of ring-oscillators is used to provide one or more temperature measurements, e.g., a temperature gradient, for the integrated circuit.
摘要翻译：在一个实施例中，公开了一种用于提供分布式温度感测的集成电路。例如，集成电路包括多个电路部件，部署在多个电路部件中的内部温度感测装置; 以及多个环形振荡器，其布置在所述多个电路部件中，其中所述多个环形振荡器中的至少一个环绕所述内部温度感测装置展开，其中所述多个环形振荡器用于提供一个或多个温度测量，例如，集成电路的温度梯度。

9. 发明授权

US08548071B2 Integrated circuit enabling the communication of data and a method of communicating data in an integrated circuit 有权
标题翻译：能够进行数据通信的集成电路和在集成电路中传送数据的方法
公开(公告)号：US08548071B2
公开(公告)日：2013-10-01
申请号：US13186415
申请日：2011-07-19
申请人： Anthony J. Collins
发明人： Anthony J. Collins
IPC分类号： H04L27/00
CPC分类号： H03K19/17744 , H01L2924/15192 , H01L2924/15311 , H03M1/004
摘要： An integrated circuit enabling the communication of data is described. The integrated circuit comprises an input/output port; a plurality of data converter circuits; and programmable interconnect circuits coupled between the input/output port and the plurality of data converter circuits, the programmable interconnect circuits enabling a connection of the plurality of data converter circuits to the input/output port of the integrated circuit. A method of enabling the communication of data in an integrated circuit is also described.
摘要翻译：描述了能够进行数据通信的集成电路。集成电路包括输入/输出端口; 多个数据转换器电路; 以及耦合在所述输入/输出端口和所述多个数据转换器电路之间的可编程互连电路，所述可编程互连电路使得所述多个数据转换器电路能够连接到所述集成电路的输入/输出端口。还描述了能够进行集成电路中的数据通信的方法。

10. 发明申请

US20130022136A1 INTEGRATED CIRCUIT ENABLING THE COMMUNICATION OF DATA AND A METHOD OF COMMUNICATING DATA IN AN INTEGRATED CIRCUIT 有权
标题翻译：集成电路实现数据通信和在一体化电路中通信数据的方法
公开(公告)号：US20130022136A1
公开(公告)日：2013-01-24
申请号：US13186415
申请日：2011-07-19
申请人： Anthony J. Collins
发明人： Anthony J. Collins
IPC分类号： H04L27/00
CPC分类号： H03K19/17744 , H01L2924/15192 , H01L2924/15311 , H03M1/004
摘要： An integrated circuit enabling the communication of data is described. The integrated circuit comprises an input/output port; a plurality of data converter circuits; and programmable interconnect circuits coupled between the input/output port and the plurality of data converter circuits, the programmable interconnect circuits enabling a connection of the plurality of data converter circuits to the input/output port of the integrated circuit. A method of enabling the communication of data in an integrated circuit is also described.
摘要翻译：描述了能够进行数据通信的集成电路。集成电路包括输入/输出端口; 多个数据转换器电路; 以及耦合在所述输入/输出端口和所述多个数据转换器电路之间的可编程互连电路，所述可编程互连电路使得所述多个数据转换器电路能够连接到所述集成电路的输入/输出端口。还描述了能够进行集成电路中的数据通信的方法。

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