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1. 发明授权

US06955481B2 Method and apparatus for providing parallel optoelectronic communication with an electronic device 有权
标题翻译：用于提供与电子设备的平行光电通信的方法和设备
公开(公告)号：US06955481B2
公开(公告)日：2005-10-18
申请号：US10667234
申请日：2003-09-17
申请人： Evan G. Colgan , Bruce K. Furman , Daniel J. Stigliani, Jr.
发明人： Evan G. Colgan , Bruce K. Furman , Daniel J. Stigliani, Jr.
IPC分类号： G02B6/42 , G02B6/36
CPC分类号： G02B6/4214 , G02B6/4246 , G02B6/4249
摘要： An optoelectronic assembly for an electronic system includes a support electronic chip set configured for at least one of providing multiplexing, demultiplexing, coding, decoding and optoelectronic transducer driving and receive functions. A first substrate having a first surface and an opposite second surface is in communication with the support electronic chip set via the first surface while a second substrate is in communication with the second surface of the first substrate. The second substrate is configured for mounting at least one of data processing, data switching and data storage chips. An optoelectronic transducer is in signal communication with the support electronic chip set and an optical fiber array is aligned at a first end with the optoelectronic transducer and with an optical signaling medium at a second end. An electrical signal from the support electronic chip set is communicated to the optoelectronic transducer via an electrical signaling medium, and the support electronic chip set and the optoelectronic transducer share a common thermal path for cooling.
摘要翻译：一种用于电子系统的光电组件，包括配置用于提供多路复用，解复用，编码，解码和光电换能器驱动和接收功能中的至少一个的支持电子芯片组。具有第一表面和相对的第二表面的第一基板经由第一表面与支撑电子芯片组连通，而第二基板与第一基板的第二表面连通。第二基板被配置用于安装数据处理，数据交换和数据存储芯片中的至少一个。光电子传感器与支撑电子芯片组进行信号通信，光纤阵列在第一端与光电转换器对准，并在第二端与光信号介质对准。来自支持电子芯片组的电信号通过电信号介质传送到光电转换器，并且支持电子芯片组和光电转换器共享用于冷却的公共热路径。

2. 发明授权

US07128472B2 Method and apparatus for providing optoelectronic communication with an electronic device 有权
标题翻译：用于与电子设备进行光电通信的方法和设备
公开(公告)号：US07128472B2
公开(公告)日：2006-10-31
申请号：US10631933
申请日：2003-07-31
申请人： Alan F. Benner , Evan G. Colgan , How Tzu Lin , John H. Magerlein , Frank L. Pompeo , Subhash L. Shinde , Daniel J. Stigliani, Jr.
发明人： Alan F. Benner , Evan G. Colgan , How Tzu Lin , John H. Magerlein , Frank L. Pompeo , Subhash L. Shinde , Daniel J. Stigliani, Jr.
IPC分类号： G02B6/42 , G02B6/36 , G02B6/43
CPC分类号： G02B6/4201 , G02B6/4246 , G02B6/4249 , G02B6/4268 , G02B6/4281 , G02B6/4283 , G02B6/4292
摘要： An optoelectronic assembly for a computer system includes an electronic chip(s), a substrate, an electrical signaling medium, an optoelectronic transducer, and an optical coupling guide. The electronic chip(s) is in communication with the substrate, which is in communication with a first end of the electrical signaling medium. A second end of the electrical signaling medium is in communication with the optoelectronic transducer, and includes the optical coupling guide for aligning an optical signaling medium with the optoelectronic transducer. An electrical signal from the electronic chip is communicated to the optoelectronic transducer via the substrate and the electrical signaling medium. The optical transducer and electronic chip(s) share a common heat spreader, and communication to other groups of electronic chip(s) is done without the need for communication via a second level electrical package.
摘要翻译：用于计算机系统的光电组件包括电子芯片，基板，电信号介质，光电转换器和光耦合引导件。电子芯片与基板通信，该基板与电信号介质的第一端连通。电信令介质的第二端与光电换能器通信，并且包括用于使光信号介质与光电换能器对准的光耦合引导件。来自电子芯片的电信号通过衬底和电信令介质传送到光电换能器。光学传感器和电子芯片共享共同的散热器，并且完成与其他电子芯片组的通信，而不需要通过第二级电气封装进行通信。

3. 发明授权

US06963119B2 Integrated optical transducer assembly 失效
标题翻译：集成光学换能器组件
公开(公告)号：US06963119B2
公开(公告)日：2005-11-08
申请号：US10250050
申请日：2003-05-30
申请人： Evan G. Colgan , Casimer M. DeCusatis , Lawrence Jacobowitz , Daniel J. Stigliani, Jr.
发明人： Evan G. Colgan , Casimer M. DeCusatis , Lawrence Jacobowitz , Daniel J. Stigliani, Jr.
IPC分类号： H01S5/022 , G02B6/43 , H01L31/0232 , H01S5/02 , H01S5/40 , H01S5/42 , H04B10/12 , H04B10/13 , H04B10/135 , H04B10/14
CPC分类号： H01S5/423 , G02B6/43 , H01L2224/16225 , H01S5/0224 , H01S5/02248 , H01S5/02256
摘要： An integrated optical transducer assembly includes a substrate and an optoelectronic array attached to the substrate. The optoelectronic array further includes a plurality of individual subunits bonded together to form a single array, with each of the subunits including a defined number of individual optoelectronic elements associated therewith. The elastomeric material maintains an original alignment between the plurality of subunits.
摘要翻译：集成光学换能器组件包括衬底和附着到衬底的光电子阵列。光电子阵列还包括多个单独的子单元，其结合在一起以形成单个阵列，其中每个子单元包括与其相关联的限定数量的单个光电元件。弹性体材料保持多个子单元之间的原始对准。

4. 发明授权

US06789957B1 High-density optoelectronic transceiver assembly for optical communication data links 有权
标题翻译：用于光通信数据链路的高密度光电收发器组件
公开(公告)号：US06789957B1
公开(公告)日：2004-09-14
申请号：US10250102
申请日：2003-06-04
申请人： Evan G. Colgan , Casimer M. DeCusatis , Lawrence Jacobowitz , Daniel J. Stigliani, Jr.
发明人： Evan G. Colgan , Casimer M. DeCusatis , Lawrence Jacobowitz , Daniel J. Stigliani, Jr.
IPC分类号： G02B600
CPC分类号： G02B6/43 , G02B6/4206
摘要： An optoelectronic transceiver assembly includes a plurality of optical transmission devices coupled to a first end of a multimode optical fiber core. Each of the plurality of optical transmission devices generates light at a different wavelength with respect to one another. A wavelength demultiplexing device is coupled to a second end of the multimode optical fiber core, and a plurality of optical detection devices is in proximity to the demultiplexing device. The optical detection devices receive light transmitted by the plurality of optical transmission devices.
摘要翻译：光电收发器组件包括耦合到多模光纤芯的第一端的多个光传输装置。多个光传输装置中的每一个相对于彼此产生不同波长的光。波长解复用装置耦合到多模光纤核心的第二端，并且多个光学检测装置靠近解复用装置。光检测装置接收由多个光传输装置发射的光。

5. 发明授权

US06752539B2 Apparatus and system for providing optical bus interprocessor interconnection 有权
标题翻译：用于提供光总线处理器互连的设备和系统
公开(公告)号：US06752539B2
公开(公告)日：2004-06-22
申请号：US10185304
申请日：2002-06-28
申请人： Evan G. Colgan , Daniel J. Stigliani, Jr.
发明人： Evan G. Colgan , Daniel J. Stigliani, Jr.
IPC分类号： G02B636
CPC分类号： G02B6/43
摘要： An exemplary embodiment of the present invention is an apparatus for providing optical interprocessor communication. The apparatus comprises a multichip module and an optical module. The multichip module includes a substrate, an integrated circuit electrically connected to the substrate and a hermetically sealed cover. The hermetically sealed cover encloses a sealed portion of the substrate and the integrated circuit is inside of the sealed cover. The optical module includes an optical transceiver located on the substrate outside of the sealed portion and the optical transceiver is electrically connected to the integrated circuit through the substrate.
摘要翻译：本发明的示例性实施例是一种用于提供光学处理器间通信的装置。该装置包括多芯片模块和光学模块。多芯片模块包括基板，电连接到基板的集成电路和密封的盖。密封的盖子包围基板的密封部分，并且集成电路在密封盖的内部。光学模块包括位于密封部分外部的基板上的光收发器，并且光收发器通过基板电连接到集成电路。

6. 发明授权

US07917785B2 Method of optimizing performance of multi-core chips and corresponding circuit and computer program product 有权
标题翻译：优化多核芯片性能的方法及相应的电路及计算机程序产品
公开(公告)号：US07917785B2
公开(公告)日：2011-03-29
申请号：US11747300
申请日：2007-05-11
申请人： Lawrence Jacobowitz , Mark B. Ritter , Daniel J. Stigliani, Jr.
发明人： Lawrence Jacobowitz , Mark B. Ritter , Daniel J. Stigliani, Jr.
IPC分类号： G06F1/26 , G06F1/00 , G06F1/32 , G01R31/00
CPC分类号： G06F1/3203 , G06F1/3243 , G06F11/3442 , G06F2201/88 , Y02D10/126 , Y02D10/152 , Y02D10/34
摘要： A method of optimizing performance of a multi-core chip having a plurality of cores includes the steps of determining a Vdd-frequency SCHMOO characteristic for each of the plurality of cores individually; saving data indicative of the Vdd-frequency SCHMOO characteristics for each of the plurality of cores; configuring the cores to obtain a configuration providing at least one of optimum power consumption and optimum performance, for a given workload, based on the saved data; and saving the configuration such that it may be updated and used on at least one of a periodic and a continual basis.
摘要翻译：一种优化具有多个核心的多核芯片的性能的方法包括以下步骤：分别确定多个核心中的每一个的Vdd频率SCHMOO特性; 保存表示所述多个核心中的每一个的Vdd频率SCHMOO特性的数据; 基于所保存的数据，配置所述核以获得为给定工作负载提供至少一个最佳功耗和最佳性能的配置; 并且保存配置，使得其可以在周期性和持续性的至少一个上被更新和使用。

7. 发明授权

US08161314B2 Method and system for analog frequency clocking in processor cores 有权
标题翻译：处理器内核中模拟频率时钟的方法和系统
公开(公告)号：US08161314B2
公开(公告)日：2012-04-17
申请号：US11734334
申请日：2007-04-12
申请人： Lawrence Jacobowitz , Mark B. Ritter , Daniel J. Stigliani, Jr.
发明人： Lawrence Jacobowitz , Mark B. Ritter , Daniel J. Stigliani, Jr.
IPC分类号： G06F1/12 , G06F1/00 , G06F1/04
CPC分类号： G06F1/08 , G06F1/06 , H03L7/1976
摘要： A method of and system for frequency clocking in a processor core are disclosed. In this system, at least one processor core is provided, and that at least one processor core has a clocking subsystem for generating an analog output clock signal at a variable frequency. Digital frequency control data and an analog signal are both transmitted to that at least one processor core; and that processor core uses the received analog signal and digital frequency control data to set the frequency of the output clock signal of the clocking subsystem. In a preferred implementation, multiple cores are asynchronously clocked and the core frequencies are independently set.
摘要翻译：公开了一种用于处理器核心中频率计时的方法和系统。在该系统中，提供至少一个处理器核心，并且至少一个处理器核心具有用于以可变频率产生模拟输出时钟信号的时钟子系统。数字频率控制数据和模拟信号都传送到该至少一个处理器核心; 并且处理器核心使用接收的模拟信号和数字频率控制数据来设置时钟子系统的输出时钟信号的频率。在优选实施例中，多个核心被异步计时并且核心频率被独立设置。

8. 发明授权

US07764132B2 All digital frequency-locked loop circuit method for clock generation in multicore microprocessor systems 失效
标题翻译：用于多核微处理器系统中时钟产生的所有数字锁相环电路方法
公开(公告)号：US07764132B2
公开(公告)日：2010-07-27
申请号：US12182204
申请日：2008-07-30
申请人： Lawrence Jacobowitz , Daniel J. Stigliani, Jr.
发明人： Lawrence Jacobowitz , Daniel J. Stigliani, Jr.
IPC分类号： H03K3/03
CPC分类号： H03L7/0996 , H03L7/18
摘要： A (DFLL) circuit residing on a local core of a multi-core microprocessor for generating a local core clock with a frequency for driving the local core includes a micro-controller configured to receive core characterizing digital data; a ring oscillator configured to generate the local core clock for the local core, and having a delay chain disposed between an output and a feedback input of the ring oscillator, the delay chain having delay taps each receiving the local core clock enabling quantum changes in the frequency of the local core clock; and a counter device configured to continually validate the frequency by generating a digital signal representative of the frequency to the micro-controller, the micro-controller compares the frequency of the local core clock to a desired clock frequency, and selects one of the delay taps based on the comparison to adjust the frequency value of the local core clock.
摘要翻译：驻留在用于产生具有用于驱动本地核的频率的本地核心时钟的多核微处理器的本地核心上的（DFLL）电路包括被配置为接收核心表征数字数据的微控制器; 环形振荡器，其被配置为产生用于本地核心的本地核心时钟，并且具有设置在环形振荡器的输出和反馈输入之间的延迟链，所述延迟链具有每个接收本地核心时钟的延迟抽头，从而能够在本地核心时钟频率; 以及配置为通过向微控制器生成表示频率的数字信号来连续验证频率的计数器装置，微控制器将本地核心时钟的频率与期望的时钟频率进行比较，并且选择延迟抽头之一基于比较来调整本地核心时钟的频率值。

9. 发明授权

US06874950B2 Devices and methods for side-coupling optical fibers to optoelectronic components 失效
标题翻译：将光纤侧耦合到光电子部件的装置和方法
公开(公告)号：US06874950B2
公开(公告)日：2005-04-05
申请号：US10321765
申请日：2002-12-17
申请人： Evan George Colgan , Fuad Elias Doany , Bruce Kenneth Furman , Daniel J. Stigliani, Jr.
发明人： Evan George Colgan , Fuad Elias Doany , Bruce Kenneth Furman , Daniel J. Stigliani, Jr.
IPC分类号： G02B6/36 , G02B6/42 , G02B6/26
CPC分类号： G02B6/3636 , G02B6/3652 , G02B6/3692 , G02B6/4214 , G02B6/423
摘要： Optical devices, components and methods for mounting optical fibers and for side-coupling light to/from optical fibers using a modified silicon V-groove, or silicon V-groove array, wherein V-grooves, which are designed for precisely aligning/spacing optical fibers, are “recessed” below the surface of the silicon. Optical fibers can be recessed below the surface of the silicon substrate such that a precisely controlled portion of the cladding layer extending above the silicon surface can be removed (lapped). With the cladding layer removed, the separation between the fiber core(s) and optoelectronic device(s) can be reduced resulting in improved optical coupling when the optical fiber silicon array is connected to, e.g., a VCSEL array.
摘要翻译：用于安装光纤的光学装置，部件和方法以及用于使用改进的硅V形槽或光纤V沟槽阵列将光耦合到光纤的光纤，其中V形槽被设计用于精确对准/间隔光学纤维在硅的表面下“凹进”。光纤可以在硅衬底的表面下方凹入，从而可以去除（重叠）在硅表面之上延伸的覆层的精确控制部分。当去除包覆层时，可以减小光纤芯和光电子器件之间的分离，从而当光纤硅阵列连接到例如VCSEL阵列时改善光耦合。

10. 发明授权

US5535139A Portable fiber optic splitter tool for multimode optical fiber cable link 失效
标题翻译：便携式光纤分路器，用于多模光纤电缆链路
公开(公告)号：US5535139A
公开(公告)日：1996-07-09
申请号：US222754
申请日：1994-04-04
申请人： Wayne A. Barringer , Casimer M. Decusatis , Daniel J. Stigliani, Jr.
发明人： Wayne A. Barringer , Casimer M. Decusatis , Daniel J. Stigliani, Jr.
IPC分类号： H04B10/08
CPC分类号： H04B10/07
摘要： In a tool for measuring optical power on a fiber optic cable link, optical conditioning means in conjunction with a splitter are used to achieve measurement consistency and repeatability. In accordance with preferred embodiments of the present invention, light conditioning means are provided by disposing the optical fiber cable in a position so as to achieve mode filtering. This may be accomplished either by disposing the optical fiber in a coil, as for example in a mandrel, or disposing the coil in a series of serpentine or zig-zag paths.
摘要翻译：在用于测量光纤电缆链路上的光功率的工具中，使用与分路器结合的光学调节装置来实现测量一致性和重复性。根据本发明的优选实施例，通过将光纤电缆设置在实现模式滤波的位置来提供光调节装置。这可以通过将光纤布置在线圈中，例如在心轴中，或者将线圈设置在一系列蛇形或锯齿形路径中来实现。

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