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1. 发明申请

US20120056326A1 TITANIUM NITRIDE FILMS 有权
标题翻译：硝酸铁膜
公开(公告)号：US20120056326A1
公开(公告)日：2012-03-08
申请号：US13296018
申请日：2011-11-14
申请人： Brenda D. Kraus , Eugene P. Marsh
发明人： Brenda D. Kraus , Eugene P. Marsh
IPC分类号： H01L23/48 , H01L21/28
CPC分类号： H01L21/28562 , C23C16/34 , C23C16/45534 , H01L21/02186 , H01L21/0228 , H01L21/28061 , H01L21/3141 , H01L21/76843 , H01L21/76846 , H01L28/75 , H01L29/4941 , Y10S257/915
摘要： The use of a monolayer or partial monolayer sequencing process to form conductive titanium nitride produces a reliable structure for use in a variety of electronic devices. In an embodiment, a structure can be formed by using ammonia and carbon monoxide reactant materials with respect to a titanium-containing precursor exposed to a substrate. Such a TiN layer has a number of uses including, but not limited to, use as a diffusion barrier underneath another conductor or use as an electro-migration preventing layer on top of a conductor. Such deposited TiN material may have characteristics associated with a low resistivity, a smooth topology, high deposition rates, excellent step coverage, and electrical continuity.
摘要翻译：使用单层或部分单层测序方法来形成导电氮化钛产生用于各种电子器件的可靠结构。在一个实施方案中，可以通过使用氨和一氧化碳反应物材料相对于暴露于基底的含钛前体形成结构。这样的TiN层具有多种用途，包括但不限于在另一导体下方作为扩散阻挡层使用，或者用作导电体顶部的防电镀层。这种沉积的TiN材料可以具有与低电阻率，平滑拓扑结构，高沉积速率，优异的台阶覆盖和电连续性相关联的特性。

2. 发明申请

US20110278661A1 APPARATUS INCLUDING RHODIUM-BASED CHARGE TRAPS 有权
标题翻译：装置包括基于RHODIUM的充电手段
公开(公告)号：US20110278661A1
公开(公告)日：2011-11-17
申请号：US13194188
申请日：2011-07-29
申请人： Eugene P. Marsh , Brenda D. Kraus
发明人： Eugene P. Marsh , Brenda D. Kraus
IPC分类号： H01L27/105 , B82Y10/00 , H01L29/792
CPC分类号： H01L29/42332 , B22F9/12 , B22F2998/00 , B22F2999/00 , B82Y10/00 , B82Y30/00 , H01L21/28273 , H01L29/7881 , B22F1/0018 , B22F2202/13
摘要： Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge traps in electronic structures for use in a wide range of electronic devices and systems. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge traps.
摘要翻译：电介质层上的隔离导电纳米颗粒和制造这种隔离导电纳米颗粒的方法在电子结构中提供电荷陷阱，用于广泛的电子设备和系统。在一个实施例中，通过等离子体辅助沉积工艺将导电纳米颗粒沉积在电介质层上，使得每个导电纳米颗粒与其它导电纳米颗粒分离，以将导电纳米颗粒配置为电荷陷阱。

3. 发明授权

US06462367B2 RuSixOy-containing adhesion layers 有权
标题翻译：含RuSixOy的粘附层
公开(公告)号：US06462367B2
公开(公告)日：2002-10-08
申请号：US09888891
申请日：2001-06-25
申请人： Eugene P. Marsh , Brenda D. Kraus
发明人： Eugene P. Marsh , Brenda D. Kraus
IPC分类号： H01L2976
CPC分类号： H01L28/75 , H01L21/76843 , H01L28/55
摘要： A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface. An adhesion layer is formed over at least a portion of the surface. The adhesion layer is formed of RuSixOy, where x and y are in the range of about 0.01 to about 10. The adhesion layer may be formed by depositing RuSixOy by chemical vapor deposition, atomic layer deposition, or physical vapor deposition or the adhesion layer may be formed by forming a layer of ruthenium or ruthenium oxide over a silicon-containing region and performing an anneal to form RuSixOy from the layer of ruthenium and silicon from the adjacent silicon-containing region. Capacitor electrodes, interconnects or other structures may be formed with such an adhesion layer. Semiconductor structures and devices can be formed to include adhesion layers formed of RuSixOy.
摘要翻译：用于制造集成电路的方法包括提供具有表面的基板组件。在表面的至少一部分上形成粘合层。粘合层由RuSixOy形成，其中x和y在约0.01至约10的范围内。粘合层可以通过通过化学气相沉积，原子层沉积或物理气相沉积沉积RuSixOy而形成，或者粘合层可以通过在含硅区域上形成钌或氧化钌层并进行退火以从相邻的含硅区域的钌和硅层形成RuSixOy。电容器电极，互连或其他结构可以用这种粘合层形成。半导体结构和器件可以形成为包括由RuSixOy形成的粘附层。

4. 发明申请

US20120018693A1 CONFINED RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS 有权
标题翻译：限制电阻可变存储器单元结构和方法
公开(公告)号：US20120018693A1
公开(公告)日：2012-01-26
申请号：US12843695
申请日：2010-07-26
申请人： Brenda D. Kraus , Eugene P. Marsh , Timothy A. Quick
发明人： Brenda D. Kraus , Eugene P. Marsh , Timothy A. Quick
IPC分类号： H01L45/00 , H01L21/06
CPC分类号： H01L45/1616 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148
摘要： Confined resistance variable memory cell structures and methods are described herein. One or more methods of forming a confined resistance variable memory cell structure includes forming a via in a memory cell structure and forming a resistance variable material in the via by performing a process that includes providing a germanium amidinate precursor and a first reactant to a process chamber having the memory cell structure therein and providing an antimony ethoxide precursor and a second reactant to the process chamber subsequent to removing excess germanium.
摘要翻译：本文描述了限制性电阻变量存储单元结构和方法。形成限制电阻可变存储单元结构的一种或多种方法包括在存储单元结构中形成通孔，并在通孔中形成电阻可变材料，该方法包括：向处理室提供锗酰脒前体和第一反应物在其中具有记忆单元结构并且在除去过量的锗之后向处理室提供锑乙醇前体和第二反应物。

5. 发明申请

US20090302371A1 CONDUCTIVE NANOPARTICLES 审中-公开
标题翻译：导电纳米粒子
公开(公告)号：US20090302371A1
公开(公告)日：2009-12-10
申请号：US12542423
申请日：2009-08-17
申请人： Brenda D. Kraus , Eugene P. Marsh
发明人： Brenda D. Kraus , Eugene P. Marsh
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L29/42332 , B82Y10/00 , B82Y30/00 , H01L21/28556 , H01L29/40114 , H01L29/7881 , Y10S438/964 , Y10S977/943
摘要： Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge storage units in electronic structures for use in a wide range of electronic devices and systems. The isolated conductive nanoparticles may be used as a floating gate in a flash memory. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge storage elements.
摘要翻译：电介质层上的隔离导电纳米颗粒和制造这种隔离导电纳米颗粒的方法提供电子结构中的电荷存储单元，用于广泛的电子设备和系统。隔离的导电纳米颗粒可以用作闪存中的浮动栅极。在一个实施例中，通过等离子体辅助沉积工艺将导电纳米颗粒沉积在电介质层上，使得每个导电纳米颗粒与其它导电纳米颗粒分离，以将导电纳米颗粒配置为电荷存储元件。

6. 发明申请

US20090173991A1 METHODS FOR FORMING RHODIUM-BASED CHARGE TRAPS AND APPARATUS INCLUDING RHODIUM-BASED CHARGE TRAPS 有权
标题翻译：用于形成基于阳极的充电轨迹的方法和包括基于阳极的充电轨迹的装置
公开(公告)号：US20090173991A1
公开(公告)日：2009-07-09
申请号：US12408920
申请日：2009-03-23
申请人： Eugene P. Marsh , Brenda D. Kraus
发明人： Eugene P. Marsh , Brenda D. Kraus
IPC分类号： H01L29/792 , H01L21/762
CPC分类号： H01L29/42332 , B22F9/12 , B22F2998/00 , B22F2999/00 , B82Y10/00 , B82Y30/00 , H01L21/28273 , H01L29/7881 , B22F1/0018 , B22F2202/13
摘要： Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge traps in electronic structures for use in a wide range of electronic devices and systems. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge traps.
摘要翻译：电介质层上的隔离导电纳米颗粒和制造这种隔离导电纳米颗粒的方法在电子结构中提供电荷陷阱，用于广泛的电子设备和系统。在一个实施例中，通过等离子体辅助沉积工艺将导电纳米颗粒沉积在电介质层上，使得每个导电纳米颗粒与其它导电纳米颗粒分离，以将导电纳米颗粒配置为电荷陷阱。

7. 发明授权

US07282408B2 Surface treatment of an oxide layer to enhance adhesion of a ruthenium metal layer 失效
标题翻译：氧化物层的表面处理以增强钌金属层的附着力
公开(公告)号：US07282408B2
公开(公告)日：2007-10-16
申请号：US10848985
申请日：2004-05-18
申请人： Eugene P. Marsh , Brenda D. Kraus
发明人： Eugene P. Marsh , Brenda D. Kraus
IPC分类号： H01L21/8242
CPC分类号： H01L27/10852 , H01L21/28556 , H01L21/32051 , H01L21/76814 , H01L21/76877 , H01L27/10814 , H01L28/65 , H01L28/90
摘要： A method for forming a ruthenium metal layer on a dielectric layer comprises forming a silicon dioxide layer, then treating the silicon dioxide with a silicon-containing gas, for example silicon hydrides such as silane, disilane, or methylated silanes. Subsequently, a ruthenium metal layer is formed on the treated dielectric layer. Treating the dielectric layer with a silicon-containing gas enhances adhesion between the dielectric and the ruthenium without requiring the addition of a separate adhesion layer between the dielectric layer and the ruthenium metal layer.
摘要翻译：在电介质层上形成钌金属层的方法包括形成二氧化硅层，然后用含硅气体处理二氧化硅，例如硅烷，乙硅烷或甲基化硅烷等氢化硅。随后，在经处理的电介质层上形成钌金属层。用含硅气体处理电介质层增强电介质和钌之间的粘附性，而不需要在电介质层和钌金属层之间添加单独的粘合层。

8. 发明授权

US06867449B2 Capacitor having RuSixOy-containing adhesion layers 失效
标题翻译：具有含RuSxOy的粘附层的电容器
公开(公告)号：US06867449B2
公开(公告)日：2005-03-15
申请号：US10430457
申请日：2003-05-06
申请人： Eugene P. Marsh , Brenda D. Kraus
发明人： Eugene P. Marsh , Brenda D. Kraus
IPC分类号： H01L21/02 , H10L27/108
CPC分类号： H01L28/75 , H01L21/76843 , H01L28/55
摘要： A capacitor structure includes a first electrode formed on a substrate assembly surface and on one or more side surfaces of a contact opening in the substrate assembly. A high- dielectric constant material is formed on at least a portion of the first electrode and a second electrode is formed on the high-dielectric constant material. At least one of the first and second electrodes comprises an adhesion layer formed of RuSixOy, where x and y are in a range of about 0.01 to about 10. The adhesion layer of at least one of the first and second electrodes may be formed on at least a portion of a silicon-containing region. The adhesion layers may consist of three to five monolayers of RuSixOy.
摘要翻译：电容器结构包括形成在基板组件表面上的第一电极和基板组件中的接触开口的一个或多个侧表面上。在第一电极的至少一部分上形成高介电常数材料，在高介电常数材料上形成第二电极。第一和第二电极中的至少一个包括由RuSixOy形成的粘合层，其中x和y在约0.01至约10的范围内。第一和第二电极中的至少一个的粘合层可以形成在至少一部分含硅区域。粘附层可以由三至五个单层的RuSixOy组成。

9. 发明授权

US06617634B2 RuSixOy-containing adhesion layers and process for fabricating the same 有权
标题翻译：具有含RuSixOy的粘合层的电容器
公开(公告)号：US06617634B2
公开(公告)日：2003-09-09
申请号：US10075819
申请日：2002-02-12
申请人： Eugene P. Marsh , Brenda D. Kraus
发明人： Eugene P. Marsh , Brenda D. Kraus
IPC分类号： H01L27108
CPC分类号： H01L28/75 , H01L21/76843 , H01L28/55
摘要： A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface. An adhesion layer is formed over at least a portion of the surface. The adhesion layer is formed of RuSixOy, where x and y are in the range of about 0.01 to about 10. The adhesion layer may be formed by depositing RuSixOy by chemical vapor deposition, atomic layer deposition, or physical vapor deposition or the adhesion layer may be formed by forming a layer of ruthenium or ruthenium oxide over a silicon-containing region and performing an anneal to form RuSixOy from the layer of ruthenium and silicon from the adjacent silicon-containing region. Capacitor electrodes, interconnects or other structures may be formed with such an adhesion layer. Semiconductor structures and devices can be formed to include adhesion layers formed of RuSixOy.
摘要翻译：一种用于制造集成电路的方法包括提供具有表面的基片组件。在表面的至少一部分上形成粘合层。粘合层由RuSixOy形成，其中x和y在约0.01至约10的范围内。粘合层可以通过通过化学气相沉积，原子层沉积或物理气相沉积沉积RuSixOy而形成，或者粘合层可以通过在含硅区域上形成钌或氧化钌层并进行退火以从相邻的含硅区域的钌和硅层形成RuSixOy。电容器电极，互连或其他结构可以用这种粘合层形成。半导体结构和器件可以形成为包括由RuSixOy形成的粘附层。

10. 发明申请

US20120149146A1 CONFINED RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS 审中-公开
公开(公告)号：US20120149146A1
公开(公告)日：2012-06-14
申请号：US13403443
申请日：2012-02-23
申请人： Brenda D. Kraus , Eugene P. Marsh , Timothy A. Quick
发明人： Brenda D. Kraus , Eugene P. Marsh , Timothy A. Quick
IPC分类号： H01L21/06
CPC分类号： H01L45/1616 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148
摘要： Confined resistance variable memory cell structures and methods are described herein. One or more methods of forming a confined resistance variable memory cell structure includes forming a via in a memory cell structure and forming a resistance variable material in the via by performing a process that includes providing a germanium amidinate precursor and a first reactant to a process chamber having the memory cell structure therein and providing an antimony ethoxide precursor and a second reactant to the process chamber subsequent to removing excess germanium.

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