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1. 发明申请

US20050114629A1 Method and apparatus to extend the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code 有权
标题翻译：以与现有代码兼容的方式扩展具有固定长度指令的处理器中指令位数目的方法和装置
公开(公告)号：US20050114629A1
公开(公告)日：2005-05-26
申请号：US10720585
申请日：2003-11-24
申请人： Erik Altman , Michael Gschwind , David Luick , Daniel Prener , Jude Rivers , Sumedh Sathaye , John-David Wellman
发明人： Erik Altman , Michael Gschwind , David Luick , Daniel Prener , Jude Rivers , Sumedh Sathaye , John-David Wellman
IPC分类号： G06F9/30 , G06F9/318 , G06F9/38
CPC分类号： G06F9/3816 , G06F9/30149 , G06F9/30181 , G06F9/30185
摘要： This invention pertains to apparatus, method and a computer program stored on a computer readable medium. The computer program includes instructions for use with an instruction unit having a code page, and has computer program code for partitioning the code page into at least two sections for storing in a first section thereof a plurality of instruction words and, in association with at least one instruction word, for storing in a second section thereof an extension to each instruction word in the first section. The computer program further includes computer program code for setting a state of at least one page table entry bit for indicating, on a code page by code page basis, whether the code page is partitioned into the first and second sections for storing instruction words and their extensions, or whether the code page is comprised instead of a single section storing only instruction words.
摘要翻译：本发明涉及存储在计算机可读介质上的装置，方法和计算机程序。计算机程序包括与具有代码页的指令单元一起使用的指令，并且具有用于将代码页划分为至少两个部分的计算机程序代码，用于在其第一部分中存储多个指令字，并且至少与一个指令字，用于在其第二部分中存储对第一部分中的每个指令字的扩展。计算机程序还包括用于设置至少一个页表条目位的状态的计算机程序代码，用于通过代码页在代码页上指示代码页是否被分割成用于存储指令字的第一和第二部分，以及它们扩展，还是包含代码页而不是仅存储指令字的单个部分。

2. 发明申请

US20080065861A1 Method And Apparatus To Extend The Number Of Instruction Bits In Processors With Fixed Length Instructions, In A Manner Compatible With Existing Code 有权
标题翻译：使用固定长度指令扩展处理器中指令位数的方法和装置，与现有代码兼容
公开(公告)号：US20080065861A1
公开(公告)日：2008-03-13
申请号：US11931815
申请日：2007-10-31
申请人： Erik Altman , Michael Gschwind , David Luick , Daniel Prener , Jude Rivers , Sumedh Sathaye , John-David Wellman
发明人： Erik Altman , Michael Gschwind , David Luick , Daniel Prener , Jude Rivers , Sumedh Sathaye , John-David Wellman
IPC分类号： G06F9/30
CPC分类号： G06F9/3816 , G06F9/30149 , G06F9/30181 , G06F9/30185
摘要： This invention pertains to apparatus, method and a computer program stored on a computer readable medium. The computer program includes instructions for use with an instruction unit having a code page, and has computer program code for partitioning the code page into at least two sections for storing in a first section thereof a plurality of instruction words and, in association with at least one instruction word, for storing in a second section thereof an extension to each instruction word in the first section. The computer program further includes computer program code for setting a state of at least one page table entry bit for indicating, on a code page by code page basis, whether the code page is partitioned into the first and second sections for storing instruction words and their extensions, or whether the code page is comprised instead of a single section storing only instruction words.
摘要翻译：本发明涉及存储在计算机可读介质上的装置，方法和计算机程序。计算机程序包括与具有代码页的指令单元一起使用的指令，并且具有用于将代码页划分为至少两个部分的计算机程序代码，用于在其第一部分中存储多个指令字，并且至少与一个指令字，用于在其第二部分中存储对第一部分中的每个指令字的扩展。计算机程序还包括用于设置至少一个页表条目位的状态的计算机程序代码，用于通过代码页在代码页上指示代码页是否被分割成用于存储指令字的第一和第二部分，以及它们扩展，还是包含代码页而不是仅存储指令字的单个部分。

3. 发明申请

US20060174089A1 Method and apparatus for embedding wide instruction words in a fixed-length instruction set architecture 审中-公开
标题翻译：用于将宽指令字嵌入固定长度指令集架构中的方法和装置
公开(公告)号：US20060174089A1
公开(公告)日：2006-08-03
申请号：US11047983
申请日：2005-02-01
申请人： Erik Altman , Michael Gschwind , Daniel Prener , Jude Rivers , Sumedh Sathaye , John-David Wellman , Victor Zyuban
发明人： Erik Altman , Michael Gschwind , Daniel Prener , Jude Rivers , Sumedh Sathaye , John-David Wellman , Victor Zyuban
IPC分类号： G06F15/00
CPC分类号： G06F9/30185 , G06F9/30072 , G06F9/30076 , G06F9/30145 , G06F9/30149 , G06F9/30181 , G06F9/30189 , G06F9/382 , G06F9/3822
摘要： A method, system, and computer program product for mixing of conventional and augmented instructions within an instruction stream, wherein control may be directly transferred, without operating system intervention, between one type of instruction to another. Extra instruction word bits are added in a manner that is designed to minimally interfere with the encoding, decoding, and instruction processing environment in a manner compatible with existing conventional fixed instruction width code. A plurality of instruction words are inserted into an instruction word oriented architecture to form an encoding group of instruction words. The instruction words in the encoding group are dispatched and executed either independently or in parallel based on a specific microprocessor implementation. The encoding group does not indicate any form of required parallelism or sequentiality. One or more indicators for the encoding group are created, wherein one indicator is used to indicate presence of the encoding group.
摘要翻译：一种用于在指令流内混合常规和增强指令的方法，系统和计算机程序产品，其中可以在一种类型的指令与另一种指令之间直接传送控制，而无需操作系统干预。附加指令字位以被设计为以与现有常规固定指令宽度代码兼容的方式最小程度地干扰编码，解码和指令处理环境的方式被添加。多个指令字被插入到面向指令字的架构中以形成指令字的编码组。基于特定的微处理器实现，编码组中的指令字被独立地或并行地调度和执行。编码组不表示任何形式的必需的并行性或顺序性。创建编码组的一个或多个指示符，其中一个指示符用于指示编码组的存在。

4. 发明申请

US20070174828A1 Apparatus and method for partitioning programs between a general purpose core and one or more accelerators 有权
标题翻译：用于在通用核心和一个或多个加速器之间划分程序的装置和方法
公开(公告)号：US20070174828A1
公开(公告)日：2007-07-26
申请号：US11339592
申请日：2006-01-25
申请人： John Kevin O'Brien , Kathryn O'Brien , Daniel Prener
发明人： John Kevin O'Brien , Kathryn O'Brien , Daniel Prener
IPC分类号： G06F9/45
CPC分类号： G06F8/45 , G06F8/451 , G06F8/456
摘要： An apparatus and method for partitioning programs between a general purpose core and one or more accelerators are provided. With the apparatus and method, a compiler front end is provided for converting a program source code in a corresponding high level programming language into an intermediate code representation. This intermediate code representation is provided to an interprocedural optimizer which determines which core processor or accelerator each portion of the program should execute on and partitions the program into sub-programs based on this set of decisions. The interprocedural optimizer may further add instructions to the partitions to coordinate and synchronize the sub-programs as required. Each sub-program is compiled on an appropriate compiler backend for the instruction set architecture of the particular core processor or accelerator selected to execute the sub-program. The compiled sub-programs and then linked to thereby generate an executable program.
摘要翻译：提供了用于在通用内核和一个或多个加速器之间分配程序的装置和方法。利用该装置和方法，提供了一种编译器前端，用于将相应高级编程语言中的程序源代码转换为中间代码表示。该中间代码表示被提供给过程间优化器，其确定程序的每个部分应执行哪个核心处理器或加速器，并且基于该组决定将程序分割成子程序。过程间优化器可以进一步向分区添加指令以根据需要协调和同步子程序。每个子程序被编译在用于执行子程序的特定核心处理器或加速器的指令集架构的适当编译器后端上。编译的子程序然后链接从而生成可执行程序。

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