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1. 发明授权

US07532041B2 Systems and methods for hysteresis control in a comparator 有权
标题翻译：比较器中滞后控制的系统和方法
公开(公告)号：US07532041B2
公开(公告)日：2009-05-12
申请号：US11613344
申请日：2006-12-20
申请人： Eric C. Blackall , Mohammad Al-Shyoukh
发明人： Eric C. Blackall , Mohammad Al-Shyoukh
IPC分类号： H03K5/22
CPC分类号： H03K3/3565
摘要： Various systems and methods for comparing signals are disclosed herein. For example, some embodiments of the present invention provide comparator circuits with programmable hysteresis. Such circuits include a comparator input circuit that receives two inputs to be compared. The comparator input circuit provides a first differential current output based at least in part on a difference between the first voltage input and the second voltage input. The aforementioned circuits further include a hysteresis control circuit that is operable to receive a single programmable voltage input, and to provide a second differential current output based at least in part on the comparator output and the single programmable voltage input. An output circuit is also included that sums the first differential current and the second differential current, and provides a comparator output based at least in part on the sum of the first differential current and the second differential current.
摘要翻译：本文公开了用于比较信号的各种系统和方法。例如，本发明的一些实施例提供具有可编程滞后的比较器电路。这种电路包括一个比较器输入电路，其接收要比较的两个输入。比较器输入电路至少部分地基于第一电压输入和第二电压输入之间的差异提供第一差分电流输出。上述电路还包括可操作以接收单个可编程电压输入的滞后控制电路，并且至少部分地基于比较器输出和单个可编程电压输入来提供第二差分电流输出。还包括输出电路，其将第一差分电流和第二差分电流相加，并且至少部分地基于第一差分电流和第二差分电流的和提供比较器输出。

2. 发明申请

US20080150589A1 SYSTEMS AND METHODS FOR MULTIPLE EQUATION GRAPHING 有权
标题翻译：多方程图的系统和方法
公开(公告)号：US20080150589A1
公开(公告)日：2008-06-26
申请号：US11613344
申请日：2006-12-20
申请人： Eric C. Blackall , Mohammad Al-Shyoukh
发明人： Eric C. Blackall , Mohammad Al-Shyoukh
IPC分类号： H03K5/24
CPC分类号： H03K3/3565
摘要： Various systems and methods for comparing signals are disclosed herein. For example, some embodiments of the present invention provide comparator circuits with programmable hysteresis. Such circuits include a comparator input circuit that receives two inputs to be compared. The comparator input circuit provides a first differential current output based at least in part on a difference between the first voltage input and the second voltage input. The aforementioned circuits further include a hysteresis control circuit that is operable to receive a single programmable voltage input, and to provide a second differential current output based at least in part on the comparator output and the single programmable voltage input. An output circuit is also included that sums the first differential current and the second differential current, and provides a comparator output based at least in part on the sum of the first differential current and the second differential current.
摘要翻译：本文公开了用于比较信号的各种系统和方法。例如，本发明的一些实施例提供具有可编程滞后的比较器电路。这种电路包括一个比较器输入电路，其接收要比较的两个输入。比较器输入电路至少部分地基于第一电压输入和第二电压输入之间的差异提供第一差分电流输出。上述电路还包括可操作以接收单个可编程电压输入的滞后控制电路，并且至少部分地基于比较器输出和单个可编程电压输入来提供第二差分电流输出。还包括输出电路，其将第一差分电流和第二差分电流相加，并且至少部分地基于第一差分电流和第二差分电流的和提供比较器输出。

3. 发明授权

US07323793B2 System and method for driving one or more loads 有权
标题翻译：用于驱动一个或多个负载的系统和方法
公开(公告)号：US07323793B2
公开(公告)日：2008-01-29
申请号：US10740998
申请日：2003-12-19
申请人： Eric C. Blackall , David J. Baldwin , Patrick P. Siniscalchi
发明人： Eric C. Blackall , David J. Baldwin , Patrick P. Siniscalchi
IPC分类号： H02J1/00 , H02J1/04 , H02J3/00 , H02J3/10
CPC分类号： H03F3/21 , H03F1/02 , H03F1/34 , H03F1/56 , Y10T307/422
摘要： A system and method for driving a load at a desired operating level. A driver is connected to a load. The load can be selected from a plurality of loads by a selection system, such as a multiplexer, or a single load can be utilized. Feedback from the load is provided to the driver for achieving the desired operating level. A zero temperature coefficient resistance formed by two resistors having different resistances can be used so that the driver emulates an ideal resistor having a substantially zero temperature coefficient, providing a temperature independent current to the load.
摘要翻译：一种用于以期望的操作水平驱动负载的系统和方法。驱动器连接到负载。可以通过诸如多路复用器之类的选择系统从多个负载中选择负载，或者可以使用单个负载。来自负载的反馈被提供给驾驶员以实现期望的操作水平。可以使用由具有不同电阻的两个电阻器形成的零温度系数电阻，使得驱动器模拟具有基本为零的温度系数的理想电阻器，为负载提供与温度无关的电流。

4. 发明授权

US07923976B2 Fault protection circuit, method of operating a fault protection circuit and a voltage regulator employing the same 有权
标题翻译：故障保护电路，故障保护电路的运行方法及采用该故障保护电路的稳压器
公开(公告)号：US07923976B2
公开(公告)日：2011-04-12
申请号：US12329537
申请日：2008-12-05
申请人： Mohammad A. Al-Shyoukh , Eric C. Blackall
发明人： Mohammad A. Al-Shyoukh , Eric C. Blackall
IPC分类号： H02H7/12
CPC分类号： G05F1/569
摘要： Embodiments of the present disclosure provide a fault protection circuit, a method of operating a fault protection circuit and a voltage regulator. In one embodiment, the fault protection circuit is for use with the voltage regulator and includes an output power section having first and second MOS transistors configured to provide a regulated voltage on an output node of the voltage regulator. The fault protection circuit also includes a gate pull-down section connected to the first and second MOS transistors and configured to provide a gate pull-down MOS transistor to limit a current through the first and second MOS transistors during a current overload fault condition on the output node.
摘要翻译：本公开的实施例提供故障保护电路，操作故障保护电路和电压调节器的方法。在一个实施例中，故障保护电路用于电压调节器，并且包括输出功率部分，其具有被配置为在电压调节器的输出节点上提供调节电压的第一和第二MOS晶体管。故障保护电路还包括连接到第一和第二MOS晶体管的栅极下拉部分，并且被配置为提供栅极下拉MOS晶体管，以限制在电流过载故障状态下通过第一和第二MOS晶体管的电流输出节点。

5. 发明申请

US20090167266A1 FAULT PROTECTION CIRCUIT, METHOD OF OPERATING A FAULT PROTECTION CIRCUIT AND A VOLTAGE REGULATOR EMPLOYING THE SAME 有权
标题翻译：故障保护电路，故障保护电路的运行方法及使用其的电压稳压器
公开(公告)号：US20090167266A1
公开(公告)日：2009-07-02
申请号：US12329537
申请日：2008-12-05
申请人： Mohammad A. Al-Shyoukh , Eric C. Blackall
发明人： Mohammad A. Al-Shyoukh , Eric C. Blackall
IPC分类号： G05F1/569 , H02H9/02
CPC分类号： G05F1/569
摘要： Embodiments of the present disclosure provide a fault protection circuit, a method of operating a fault protection circuit and a voltage regulator. In one embodiment, the fault protection circuit is for use with the voltage regulator and includes an output power section having first and second MOS transistors configured to provide a regulated voltage on an output node of the voltage regulator. The fault protection circuit also includes a gate pull-down section connected to the first and second MOS transistors and configured to provide a gate pull-down MOS transistor to limit a current through the first and second MOS transistors during a current overload fault condition on the output node.
摘要翻译：本公开的实施例提供故障保护电路，操作故障保护电路和电压调节器的方法。在一个实施例中，故障保护电路用于电压调节器，并且包括输出功率部分，其具有被配置为在电压调节器的输出节点上提供调节电压的第一和第二MOS晶体管。故障保护电路还包括连接到第一和第二MOS晶体管的栅极下拉部分，并且被配置为提供栅极下拉MOS晶体管，以限制在电流过载故障状态下通过第一和第二MOS晶体管的电流输出节点。

6. 发明申请

US20080284391A1 FAULT PROTECTION CIRCUIT, METHOD OF OPERATING A FAULT PROTECTION CIRCUIT AND A VOLTAGE REGULATOR EMPLOYING THE SAME 审中-公开
标题翻译：故障保护电路，故障保护电路的运行方法及使用其的电压稳压器
公开(公告)号：US20080284391A1
公开(公告)日：2008-11-20
申请号：US11967506
申请日：2007-12-31
申请人： Mohammad A. Al-Shyoukh , Eric C. Blackall
发明人： Mohammad A. Al-Shyoukh , Eric C. Blackall
IPC分类号： G05F1/569
CPC分类号： G05F1/569
摘要： Embodiments of the present disclosure provide a fault protection circuit, a method of operating a fault protection circuit and a voltage regulator. In one embodiment, the fault protection circuit is for use with the voltage regulator and includes an output power section having first and second MOS transistors configured to provide a regulated voltage on an output node of the voltage regulator. The fault protection circuit also includes a gate pull-down section connected to the first and second MOS transistors and configured to provide a gate pull-down MOS transistor to limit a current through the first and second MOS transistors during a current overload fault condition on the output node.
摘要翻译：本公开的实施例提供故障保护电路，操作故障保护电路和电压调节器的方法。在一个实施例中，故障保护电路用于电压调节器，并且包括输出功率部分，其具有被配置为在电压调节器的输出节点上提供调节电压的第一和第二MOS晶体管。故障保护电路还包括连接到第一和第二MOS晶体管的栅极下拉部分，并且被配置为提供栅极下拉MOS晶体管，以限制在电流过载故障状态下通过第一和第二MOS晶体管的电流输出节点。

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