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1. 发明授权

US4595129A Moistureproof sealing of a container 失效
标题翻译：容器的防潮密封
公开(公告)号：US4595129A
公开(公告)日：1986-06-17
申请号：US566429
申请日：1983-12-28
申请人： Eiichi Okuno , Naomi Okamura , Keiji Ozawa , Takashi Saitoh
发明人： Eiichi Okuno , Naomi Okamura , Keiji Ozawa , Takashi Saitoh
IPC分类号： B65D81/26 , B65D8/04
CPC分类号： B65D81/266
摘要： A container for storing a moisture-sensitive material which comprises a fillable space behind the moisture-sensitive material, which has contained therein a water-reactive, highly volatile silane, alkyl titanate or isocyanate which, upon reaction with water, produces a low-viscosity material which is water repellant. The water-reactive compound prevents contact of moisture with the moisture-sensitive material while it is in the container.
摘要翻译：一种用于储存湿敏材料的容器，其中包含湿敏材料后面的可填充空间，其中含有水反应性高挥发性硅烷，钛酸烷基酯或异氰酸酯，其在与水反应时产生低粘度防水材料。水反应性化合物防止水分与湿敏物质在容器中的接触。

2. 发明授权

US4562237A One component room temperature curable sealant composition 失效
标题翻译：单组分室温可固化密封剂组合物
公开(公告)号：US4562237A
公开(公告)日：1985-12-31
申请号：US515548
申请日：1983-07-20
申请人： Eiichi Okuno , Naomi Okamura , Takashi Saitoh
发明人： Eiichi Okuno , Naomi Okamura , Takashi Saitoh
IPC分类号： C08L71/00 , C08G18/10 , C08G65/00 , C08G65/32 , C08K5/00 , C08L71/02 , C08L75/08 , C08L83/10 , C09K3/10 , C08G77/18
CPC分类号： C08L71/02 , C08G18/10 , C08L75/08 , C08L83/10
摘要： A one component room temperature curable sealant composition comprising:(A) a polyether polymer having at its terminal a hydrolyzable silicone functional group represented by the general formula: ##STR1## (B) a partial addition condensation product of: (a) an aminoalkylalkoxysilane represented by the general formula: ##STR2## with (b) an epoxy compound containing at least one epoxy group in its molecule and having a molecular weight of from 100 to 1000 and an epoxy equivalent of from 100 to 500,(c) a compound represented by the general formula: ##STR3## (d) an alkoxy silane represented by the general formula: ##STR4## (e) an organic titanic acid ester; and (C) a condensation catalyst of a silanol compound.
摘要翻译：一种单组分室温可固化密封剂组合物，其包含：（A）在其末端具有由以下通式表示的可水解硅氧烷官能团的聚醚聚合物：（B）部分加成缩合产物，其包含：（a）氨基烷基烷氧基硅烷，其通式为：（b）在其分子中含有至少一个环氧基并且分子量为100至1000且环氧当量为100至500的环氧化合物，（c）表示的化合物通式如下：（d）由下列通式表示的烷氧基硅烷：（e）有机钛酸酯; 和（C）硅烷醇化合物的缩合催化剂。

3. 发明授权

US08164100B2 Semiconductor device and method of manufacturing thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08164100B2
公开(公告)日：2012-04-24
申请号：US12338151
申请日：2008-12-18
申请人： Hirokazu Fujiwara , Masaki Konishi , Eiichi Okuno
发明人： Hirokazu Fujiwara , Masaki Konishi , Eiichi Okuno
IPC分类号： H01L29/72
CPC分类号： H01L29/7813 , H01L29/04 , H01L29/1608 , H01L29/66068 , H01L29/872
摘要： A semiconductor device is provided in which the contact resistance of the interface between an electrode and the semiconductor substrate is reduced. The semiconductor device includes a 4H polytype SiC substrate, and an electrode formed on a surface of the substrate. A 3C polytype layer, which extends obliquely relative to the surface of the substrate and whose end portion at the substrate surface is in contact with the electrode, is formed at the surface of the substrate. The 3C polytype layer has a lower bandgap than 4H polytype. Hence, electrons present in the 4H polytype region pass through the 3C polytype layer and reach the electrode. More precisely, the width of the passageway of the electrons is determined by the thickness of the 3C polytype layer. Consequently, with this semiconductor device, in which the passageway of the electrons is narrow, the electrons are able to reach the electrode at a speed close to the theoretical value, by the quantum wire effect. In this way, the contact resistance can be reduced in the semiconductor device.
摘要翻译：提供一种半导体器件，其中电极和半导体衬底之间的界面的接触电阻降低。半导体器件包括4H多型SiC衬底和形成在衬底的表面上的电极。形成在基板表面上相对于基板的表面倾斜地延伸并且其基板表面的端部与电极接触的3C多型层。 3C多型层具有比4H多型更低的带隙。因此，存在于4H多型区域中的电子通过3C多型层并到达电极。更准确地说，电子通道的宽度由3C多型层的厚度决定。因此，通过电子通道窄的这种半导体器件，电子能够以接近理论值的速度通过量子线效应到达电极。以这种方式，可以在半导体器件中降低接触电阻。

4. 发明授权

US07825017B2 Method of making silicon carbide semiconductor device having multi-layered passivation film with uneven surfaces 有权
标题翻译：制造具有不平坦表面的多层钝化膜的碳化硅半导体器件的方法
公开(公告)号：US07825017B2
公开(公告)日：2010-11-02
申请号：US12406578
申请日：2009-03-18
申请人： Takeo Yamamoto , Takeshi Endo , Eiichi Okuno , Masaki Konishi
发明人： Takeo Yamamoto , Takeshi Endo , Eiichi Okuno , Masaki Konishi
IPC分类号： H01L21/28 , H01L21/283 , H01L21/44 , H01L21/441 , H01L31/0312 , H01L29/47
CPC分类号： H01L29/872 , H01L21/0495 , H01L29/0611 , H01L29/063 , H01L29/1608 , H01L29/6606 , H01L29/7395 , H01L29/8083 , H01L2224/02166 , H01L2224/04042 , H01L2224/05552 , H01L2224/05567 , H01L2924/0002 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/00
摘要： A silicon carbide semiconductor device provided as a semiconductor chip includes a substrate, a drift layer on the substrate, an insulation film on the drift layer, a semiconductor element formed in a cell region of the drift layer, a surface electrode formed on the drift layer and electrically coupled to the semiconductor element through an opening of the insulation film, and a passivation film formed above the drift layer around the periphery of the cell region to cover an outer edge of the surface electrode. The passivation film has an opening through which the surface electrode is exposed outside. A surface of the passivation film is made uneven to increase a length from an inner edge of the opening of the passivation film to a chip edge measured along the surface of the passivation film.
摘要翻译：设置为半导体芯片的碳化硅半导体器件包括衬底，衬底上的漂移层，漂移层上的绝缘膜，形成在漂移层的单元区域中的半导体元件，形成在漂移层上的表面电极并且通过所述绝缘膜的开口电耦合到所述半导体元件，以及钝化膜，所述钝化膜形成在所述电池区周围的漂移层上方以覆盖所述表面电极的外边缘。钝化膜具有开口，表面电极通过该开口暴露在外部。钝化膜的表面被制成不均匀以增加从钝化膜的开口的内边缘到沿着钝化膜的表面测量的芯片边缘的长度。

5. 发明授权

US07824995B2 SiC semiconductor device and method for manufacturing the same 有权
标题翻译： SiC半导体器件及其制造方法
公开(公告)号：US07824995B2
公开(公告)日：2010-11-02
申请号：US12071717
申请日：2008-02-26
申请人： Takeshi Endo , Tsuyoshi Yamamoto , Eiichi Okuno
发明人： Takeshi Endo , Tsuyoshi Yamamoto , Eiichi Okuno
IPC分类号： H01L29/72
CPC分类号： H01L29/7828 , H01L21/049 , H01L29/045 , H01L29/0847 , H01L29/1608 , H01L29/51 , H01L29/66068
摘要： A SiC semiconductor device includes: a SiC substrate having a main surface; a channel region on the substrate; first and second impurity regions on upstream and downstream sides of the channel region, respectively; a gate on the channel region through a gate insulating film. The channel region for flowing current between the first and second impurity regions is controlled by a voltage applied to the gate. An interface between the channel region and the gate insulating film has a hydrogen concentration equal to or greater than 2.6×1020 cm−3. The interface provides a channel surface perpendicular to a (0001)-orientation plane.
摘要翻译： SiC半导体器件包括：具有主表面的SiC衬底; 衬底上的沟道区; 分别在通道区域的上游侧和下游侧的第一和第二杂质区域; 通过栅极绝缘膜在沟道区上形成栅极。用于在第一和第二杂质区域之间流动电流的沟道区域由施加到栅极的电压来控制。沟道区域和栅极绝缘膜之间的界面的氢浓度等于或大于2.6×1020cm-3。界面提供垂直于（0001）取向平面的通道表面。

6. 发明授权

US07745276B2 Method for manufacturing SiC semiconductor device 有权
标题翻译： SiC半导体器件的制造方法
公开(公告)号：US07745276B2
公开(公告)日：2010-06-29
申请号：US12068263
申请日：2008-02-05
申请人： Eiichi Okuno , Hiroki Nakamura , Naohiro Suzuki
发明人： Eiichi Okuno , Hiroki Nakamura , Naohiro Suzuki
IPC分类号： H01L21/8234
CPC分类号： H01L29/7828 , H01L29/045 , H01L29/0615 , H01L29/0619 , H01L29/0657 , H01L29/1608 , H01L29/45 , H01L29/66068 , H01L29/7802 , H01L29/7811 , H01L29/7813
摘要： A method for manufacturing a SiC semiconductor device includes: preparing a SiC substrate having a (11-20)-orientation surface; forming a drift layer on the substrate; forming a base region in the drift layer; forming a first conductivity type region in the base region; forming a channel region on the base region to couple between the drift layer and the first conductivity type region; forming a gate insulating film on the channel region; forming a gate electrode on the gate insulating film; forming a first electrode to electrically connect to the first conductivity type region; and forming a second electrode on a backside of the substrate. The device controls current between the first and second electrodes by controlling the channel region. The forming the base region includes epitaxially forming a lower part of the base region on the drift layer.
摘要翻译：一种制造SiC半导体器件的方法包括：制备具有（11-20）取向表面的SiC衬底; 在衬底上形成漂移层; 在漂移层中形成基极区; 在所述基底区域中形成第一导电类型区域; 在所述基极区上形成沟道区，以在所述漂移层和所述第一导电类型区之间耦合; 在沟道区上形成栅极绝缘膜; 在栅极绝缘膜上形成栅电极; 形成电连接到所述第一导电类型区域的第一电极; 以及在所述衬底的背面上形成第二电极。该器件通过控制沟道区域来控制第一和第二电极之间的电流。形成基极区域包括外延地形成漂移层上的基极区域的下部。

7. 发明申请

US20090166730A1 SiC semiconductor device having bottom layer and method for manufacturing the same 有权
标题翻译：具有底层的SiC半导体器件及其制造方法
公开(公告)号：US20090166730A1
公开(公告)日：2009-07-02
申请号：US12318183
申请日：2008-12-23
申请人： Eiichi Okuno , Naohiro Suzuki , Nobuyuki Kato
发明人： Eiichi Okuno , Naohiro Suzuki , Nobuyuki Kato
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7813 , H01L29/0623 , H01L29/1608 , H01L29/66068
摘要： A SiC semiconductor device includes: a substrate; a drift layer on the substrate; a trench on the drift layer; a base region in the drift layer sandwiching the trench; a channel between the base region and the trench; a source region in the base region sandwiching the trench via the channel; a gate electrode in the trench via a gate insulation film; a source electrode coupled with the source region; a drain electrode on the substrate opposite to the drift layer; and a bottom layer under the trench. An edge portion of the bottom layer under a corner of a bottom of the trench is deeper than a center portion of the bottom layer under a center portion of the bottom of the trench.
摘要翻译： SiC半导体器件包括：衬底; 衬底上的漂移层; 漂移层上的沟槽; 夹在沟槽中的漂移层中的基底区域; 基极区域和沟槽之间的沟道; 所述基极区域中的源极区域经由所述沟道夹持所述沟槽; 通过栅极绝缘膜在沟槽中的栅电极; 与源极区域耦合的源电极; 衬底上的与漂移层相反的漏电极; 和沟槽下方的底层。在沟槽的底部的角部下方的底层的边缘部分比沟槽底部的中心部分下方的底层的中心部分更深。

8. 发明申请

US20090159898A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090159898A1
公开(公告)日：2009-06-25
申请号：US12338151
申请日：2008-12-18
申请人： Hirokazu FUJIWARA , Masaki Konishi , Eiichi Okuno
发明人： Hirokazu FUJIWARA , Masaki Konishi , Eiichi Okuno
IPC分类号： H01L29/24 , H01L21/265
CPC分类号： H01L29/7813 , H01L29/04 , H01L29/1608 , H01L29/66068 , H01L29/872
摘要： A semiconductor device is provided in which the contact resistance of the interface between an electrode and the semiconductor substrate is reduced. The semiconductor device includes a 4H polytype SiC substrate, and an electrode formed on a surface of the substrate. A 3C polytype layer, which extends obliquely relative to the surface of the substrate and whose end portion at the substrate surface is in contact with the electrode, is formed at the surface of the substrate. The 3C polytype layer has a lower bandgap than 4H polytype. Hence, electrons present in the 4H polytype region pass through the 3C polytype layer and reach the electrode. More precisely, the width of the passageway of the electrons is determined by the thickness of the 3C polytype layer. Consequently, with this semiconductor device, in which the passageway of the electrons is narrow, the electrons are able to reach the electrode at a speed close to the theoretical value, by the quantum wire effect. In this way, the contact resistance can be reduced in the semiconductor device.
摘要翻译：提供一种半导体器件，其中电极和半导体衬底之间的界面的接触电阻降低。半导体器件包括4H多型SiC衬底和形成在衬底的表面上的电极。形成在基板表面上相对于基板的表面倾斜地延伸并且其基板表面的端部与电极接触的3C多型层。 3C多型层具有比4H多型更低的带隙。因此，存在于4H多型区域中的电子通过3C多型层并到达电极。更准确地说，电子通道的宽度由3C多型层的厚度决定。因此，通过电子通道窄的这种半导体器件，电子能够以接近理论值的速度通过量子线效应到达电极。以这种方式，可以在半导体器件中降低接触电阻。

9. 发明申请

US20080277669A1 SiC semiconductor having junction barrier Schottky device 有权
标题翻译：具有接合屏障肖特基装置的SiC半导体
公开(公告)号：US20080277669A1
公开(公告)日：2008-11-13
申请号：US12078370
申请日：2008-03-31
申请人： Eiichi Okuno , Takeo Yamamoto
发明人： Eiichi Okuno , Takeo Yamamoto
IPC分类号： H01L29/24
CPC分类号： H01L29/872 , H01L29/0615 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/0692 , H01L29/1608 , H01L29/6606 , H01L29/861
摘要： A semiconductor device having a JBS diode includes: a SiC substrate; a drift layer on the substrate; an insulation film on the drift layer having an opening in a cell region; a Schottky barrier diode having a Schottky electrode contacting the drift layer through the opening and an ohmic electrode on the substrate; a terminal structure having a RESURF layer in the drift layer surrounding the cell region; and multiple second conductive type layers in the drift layer on an inner side of the RESURF layer contacting the Schottky electrode. The second conductive type layers are separated from each other. The second conductive type layers and the drift layer provide a PN diode. Each second conductive type layer has a depth larger than the RESURF layer.
摘要翻译：具有JBS二极管的半导体器件包括：SiC衬底; 衬底上的漂移层; 漂移层上的绝缘膜在电池区域具有开口; 具有肖特基电极的肖特基势垒二极管，其通过开口接触漂移层，并在衬底上接触欧姆电极; 具有围绕所述单元区域的所述漂移层中的RESURF层的端子结构; 以及在与肖特基电极接触的RESURF层的内侧上的漂移层中的多个第二导电类型层。第二导电类型的层彼此分离。第二导电类型层和漂移层提供PN二极管。每个第二导电类型层的深度大于RESURF层。

10. 发明授权

US07365363B2 Silicon carbide semiconductor device and method for manufacturing the same 有权
标题翻译：碳化硅半导体器件及其制造方法
公开(公告)号：US07365363B2
公开(公告)日：2008-04-29
申请号：US11108906
申请日：2005-04-19
申请人： Jun Kojima , Takeshi Endo , Eiichi Okuno , Yoshihito Mitsuoka , Yoshiyuki Hisada , Hideo Matsuki
发明人： Jun Kojima , Takeshi Endo , Eiichi Okuno , Yoshihito Mitsuoka , Yoshiyuki Hisada , Hideo Matsuki
IPC分类号： H01L31/0312
CPC分类号： H01L29/66068 , H01L21/02024 , H01L29/045 , H01L29/513 , H01L29/517 , H01L29/7828
摘要： A silicon carbide semiconductor device includes: a semiconductor substrate having a principal surface and a backside surface; a drift layer disposed on the principal surface; a base region disposed on the drift layer; a source region disposed on the base region; a surface channel layer disposed on both of the drift layer and the base region for connecting between the source region and the drift layer; a gate insulation film disposed on the surface channel layer and including a high dielectric constant film; a gate electrode disposed on the gate insulation film; a source electrode disposed on the source region; and a backside electrode disposed on the backside surface.
摘要翻译：碳化硅半导体器件包括：具有主表面和背面的半导体衬底; 设置在主表面上的漂移层; 设置在漂移层上的基极区域; 设置在所述基底区域上的源极区域; 设置在所述漂移层和所述基极区域两者上的表面沟道层，用于在所述源极区域和所述漂移层之间连接; 栅极绝缘膜，设置在所述表面沟道层上并且包括高介电常数膜; 设置在所述栅极绝缘膜上的栅电极; 源电极，其设置在所述源极区域上; 以及设置在所述背面上的背面电极。

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