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1. 发明申请

US20140212534A1 Fabrication of High-Throughput Nano-Imprint Lithography Templates 审中-公开
标题翻译：高通量纳米压印光刻模板的制作
公开(公告)号：US20140212534A1
公开(公告)日：2014-07-31
申请号：US13754015
申请日：2013-01-30
申请人： Edward B. Fletcher , Frank Y. Xu , Weijun Liu , Fen Wan , Marlon Menezes , Kosta S. Selinidis
发明人： Edward B. Fletcher , Frank Y. Xu , Weijun Liu , Fen Wan , Marlon Menezes , Kosta S. Selinidis
IPC分类号： B29C59/02 , C23C16/40
CPC分类号： C23C16/401 , B82Y10/00 , B82Y40/00 , G03F7/0002
摘要： An imprint lithography template includes a porous material defining a multiplicity of pores with an average pore size of at least about 0.4 nm. The porous material includes silicon and oxygen, and a ratio of Young's modulus (E) to relative density of the porous material with respect to fused silica (ρporous/ρfused silica) is at least about 10:1. A refractive index of the porous material is between about 1.4 and 1.5. The porous material may form an intermediate layer or a cap layer of an imprint lithography template. The template may include a pore seal layer between a porous layer and a cap layer, or a pore seal layer on top of a cap layer.
摘要翻译：压印光刻模板包括限定平均孔径至少约0.4nm的多个孔的多孔材料。多孔材料包括硅和氧，并且杨氏模量（E）与多孔材料相对于熔融二氧化硅（“多孔/熔融二氧化硅”）的相对密度之比至少为约10:1。多孔材料的折射率在约1.4和1.5之间。多孔材料可以形成压印光刻模板的中间层或盖层。模板可以包括在多孔层和盖层之间的孔密封层，或者在盖层的顶部上的孔密封层。

2. 发明申请

US20100104852A1 Fabrication of High-Throughput Nano-Imprint Lithography Templates 审中-公开
标题翻译：高通量纳米压印光刻模板的制作
公开(公告)号：US20100104852A1
公开(公告)日：2010-04-29
申请号：US12604094
申请日：2009-10-22
申请人： Edward B. Fletcher , Frank Y. Xu , Weijun Liu , Fen Wan , Marlon Menezes , Kosta S. Selinidis
发明人： Edward B. Fletcher , Frank Y. Xu , Weijun Liu , Fen Wan , Marlon Menezes , Kosta S. Selinidis
IPC分类号： B32B3/26 , B05D3/10 , B01D3/00 , C23C16/00 , B05D3/06
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00 , G03F7/0017 , Y10T428/249978 , Y10T428/268
摘要： An imprint lithography template includes a porous material defining a multiplicity of pores with an average pore size of at least about 0.4 nm. The porous material includes silicon and oxygen, and a ratio of Young's modulus (E) to relative density of the porous material with respect to fused silica (pporous/pfused silica) is at least about 10:1. A refractive index of the porous material is between about 1.4 and 1.5. The porous material may form an intermediate layer or a cap layer of an imprint lithography template. The template may include a pore seal layer between a porous layer and a cap layer, or a pore seal layer on top of a cap layer.
摘要翻译：压印光刻模板包括限定平均孔径至少约0.4nm的多个孔的多孔材料。多孔材料包括硅和氧，并且杨氏模量（E）与多孔材料相对于熔融二氧化硅的相对密度（磷/二氧化硅）的比例为至少约10:1。多孔材料的折射率在约1.4和1.5之间。多孔材料可以形成压印光刻模板的中间层或盖层。模板可以包括在多孔层和盖层之间的孔密封层，或者在盖层的顶部上的孔密封层。

3. 发明申请

US20100084376A1 NANO-IMPRINT LITHOGRAPHY TEMPLATES 有权
标题翻译： NANO-IMPRINT LITHOGRAPHY模板
公开(公告)号：US20100084376A1
公开(公告)日：2010-04-08
申请号：US12572838
申请日：2009-10-02
申请人： Niyaz Khusnatdinov , Weijun Liu , Frank Y. Xu , Fen Wan , Edward Brian Fletcher , Marlon Menezes
发明人： Niyaz Khusnatdinov , Weijun Liu , Frank Y. Xu , Fen Wan , Edward Brian Fletcher , Marlon Menezes
IPC分类号： B44C1/22 , H05B6/00 , B29C59/00
CPC分类号： G03F7/0002 , B32B37/14 , B82Y10/00 , B82Y40/00 , Y10T156/10
摘要： Porous nano-imprint lithography templates may include pores, channels, or porous layers arranged to allow evacuation of gas trapped between a nano-imprint lithography template and substrate. The pores or channels may be formed by etch or other processes. Gaskets may be formed on an nano-imprint lithography template to restrict flow of polymerizable material during nano-imprint lithography processes.
摘要翻译：多孔纳米压印光刻模板可以包括孔，通道或多孔层，布置成允许排出捕获在纳米压印光刻模板和衬底之间的气体。孔或通道可以通过蚀刻或其它工艺形成。垫片可以形成在纳米压印光刻模板上以限制纳米压印光刻工艺期间可聚合材料的流动。

4. 发明授权

US08541053B2 Enhanced densification of silicon oxide layers 有权
标题翻译：增强氧化硅层的致密化
公开(公告)号：US08541053B2
公开(公告)日：2013-09-24
申请号：US13178057
申请日：2011-07-07
申请人： Marlon Menezes , Frank Y. Xu , Fen Wan
发明人： Marlon Menezes , Frank Y. Xu , Fen Wan
IPC分类号： B05D3/02 , B05D3/04 , B32B3/26
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00 , H01L21/3105 , Y10T428/249953
摘要： Densifying a multi-layer substrate includes providing a substrate with a first dielectric layer on a surface of the substrate. The first dielectric layer includes a multiplicity of pores. Water is introduced into the pores of the first dielectric layer to form a water-containing dielectric layer. A second dielectric layer is provided on the surface of the water-containing first dielectric layer. The first and second dielectric layers are annealed at temperature of 600° C. or less. In an example, the multi-layer substrate is a nanoimprint lithography template. The second dielectric layer may have a density and therefore an etch rate similar to that of thermal oxide, yet may still be porous enough to allow more rapid diffusion of helium than a thermal oxide layer.
摘要翻译：致密化多层基板包括在基板的表面上提供具有第一介电层的基板。第一介电层包括多个孔。将水引入第一介电层的孔中以形成含水介电层。在含水的第一介电层的表面上设置有第二介质层。第一和第二电介质层在600℃或更低的温度下退火。在一个实例中，多层衬底是纳米压印光刻模板。第二电介质层可以具有与热氧化物类似的密度，因此蚀刻速率可能仍然足够多孔以允许氦比热氧化物层更快速地扩散。

5. 发明申请

US20120009413A1 ENHANCED DENSIFICATION OF SILICON OXIDE LAYERS 有权
标题翻译：氧化硅层的增强渗透
公开(公告)号：US20120009413A1
公开(公告)日：2012-01-12
申请号：US13178057
申请日：2011-07-07
申请人： Marlon Menezes , Frank Y. Xu , Fen Wan
发明人： Marlon Menezes , Frank Y. Xu , Fen Wan
IPC分类号： B32B3/26 , B28B3/00 , B05D3/00 , B05D3/12 , H01L21/312 , B05D5/00
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00 , H01L21/3105 , Y10T428/249953
摘要： Densifying a multi-layer substrate includes providing a substrate with a first dielectric layer on a surface of the substrate. The first dielectric layer includes a multiplicity of pores. Water is introduced into the pores of the first dielectric layer to form a water-containing dielectric layer. A second dielectric layer is provided on the surface of the water-containing first dielectric layer. The first and second dielectric layers are annealed at temperature of 600° C. or less. In an example, the multi-layer substrate is a nanoimprint lithography template. The second dielectric layer may have a density and therefore an etch rate similar to that of thermal oxide, yet may still be porous enough to allow more rapid diffusion of helium than a thermal oxide layer.
摘要翻译：致密化多层基板包括在基板的表面上提供具有第一介电层的基板。第一介电层包括多个孔。将水引入第一介电层的孔中以形成含水介电层。在含水的第一介电层的表面上设置有第二介质层。第一和第二电介质层在600℃或更低的温度下退火。在一个实例中，多层衬底是纳米压印光刻模板。第二电介质层可以具有与热氧化物类似的密度，因此蚀刻速率可能仍然足够多孔以允许氦比热氧化物层更快速地扩散。

6. 发明申请

US20100109201A1 Nano-Imprint Lithography Template with Ordered Pore Structure 审中-公开
标题翻译：具有有序孔结构的纳米压印光刻模板
公开(公告)号：US20100109201A1
公开(公告)日：2010-05-06
申请号：US12609808
申请日：2009-10-30
申请人： Edward Brian Fletcher , Frank Y. Xu , Weijun Liu , Marlon Menezes
发明人： Edward Brian Fletcher , Frank Y. Xu , Weijun Liu , Marlon Menezes
IPC分类号： B29C41/42 , B32B3/26 , B32B5/00 , B44C1/22
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00 , Y10T428/24802 , Y10T428/249953
摘要： A nano-imprint lithography template includes a non-porous base layer, a cap layer, and a porous layer between the base layer and the cap layer. The porous layer defines a multiplicity of pores and has an ordered pore structure. The cap layer is permeable to helium, and the pores in the porous layer are configured to accept gas passing through the cap layer during an imprint lithography process. The porous layer provides high porosity with a Young's modulus and hardness that are advantageous for imprint lithography processes.
摘要翻译：纳米压印光刻模板包括在基层和盖层之间的无孔基层，盖层和多孔层。多孔层限定多个孔并具有有序孔结构。盖层对氦是可渗透的，并且多孔层中的孔构造成在压印光刻过程中接受通过盖层的气体。多孔层提供具有杨氏模量和硬度的高孔隙率，其有利于压印光刻工艺。

7. 发明授权

US08470188B2 Nano-imprint lithography templates 有权
公开(公告)号：US08470188B2
公开(公告)日：2013-06-25
申请号：US12572838
申请日：2009-10-02
申请人： Marlon Menezes
发明人： Marlon Menezes
IPC分类号： C23F1/00
CPC分类号： G03F7/0002 , B32B37/14 , B82Y10/00 , B82Y40/00 , Y10T156/10
摘要： Porous nano-imprint lithography templates may include pores, channels, or porous layers arranged to allow evacuation of gas trapped between a nano-imprint lithography template and substrate. The pores or channels may be formed by etch or other processes. Gaskets may be formed on an nano-imprint lithography template to restrict flow of polymerizable material during nano-imprint lithography processes.

8. 发明申请

US20080057740A1 DOPANT ACTIVATION IN DOPED SEMICONDUCTOR SUBSTRATES 失效
标题翻译：掺杂半导体衬底中的掺杂活性
公开(公告)号：US20080057740A1
公开(公告)日：2008-03-06
申请号：US11844810
申请日：2007-08-24
申请人： Jeffrey Munro , Srinivas Nemani , Young Lee , Marlon Menezes , Christopher Bencher , Vijay Parihar
发明人： Jeffrey Munro , Srinivas Nemani , Young Lee , Marlon Menezes , Christopher Bencher , Vijay Parihar
IPC分类号： H01L21/00
CPC分类号： H01L21/268 , H01L21/26513
摘要： Methods are disclosed for activating dopants in a doped semiconductor substrate. A carbon precursor is flowed into a substrate processing chamber within which the doped semiconductor substrate is disposed. A plasma is formed from the carbon precursor in the substrate processing chamber. A carbon film is deposited over the substrate with the plasma. A temperature of the substrate is maintained while depositing the carbon film less than 500° C. The deposited carbon film is exposed to electromagnetic radiation for a period less than 10 ms, and has an extinction coefficient greater than 0.3 at a wavelength comprised by the electromagnetic radiation.
摘要翻译：公开了用于激活掺杂半导体衬底中的掺杂剂的方法。碳前体流入其中设置掺杂半导体衬底的衬底处理室。在基板处理室中由碳前体形成等离子体。用等离子体沉积在衬底上的碳膜。在沉积低于500℃的碳膜的同时保持基板的温度。沉积的碳膜暴露于电磁辐射小于10ms的时间段，并且在电磁波包括的波长处具有大于0.3的消光系数辐射。

9. 发明授权

US07989366B2 Dopant activation in doped semiconductor substrates 失效
标题翻译：掺杂半导体衬底中的掺杂剂活化
公开(公告)号：US07989366B2
公开(公告)日：2011-08-02
申请号：US11844810
申请日：2007-08-24
申请人： Jeffrey C. Munro , Srinivas D. Nemani , Young S. Lee , Marlon Menezes , Christopher Dennis Bencher , Vijay Parihar
发明人： Jeffrey C. Munro , Srinivas D. Nemani , Young S. Lee , Marlon Menezes , Christopher Dennis Bencher , Vijay Parihar
IPC分类号： H01L21/00
CPC分类号： H01L21/268 , H01L21/26513
摘要： Methods are disclosed for activating dopants in a doped semiconductor substrate. A carbon precursor is flowed into a substrate processing chamber within which the doped semiconductor substrate is disposed. A plasma is formed from the carbon precursor in the substrate processing chamber. A carbon film is deposited over the substrate with the plasma. A temperature of the substrate is maintained while depositing the carbon film less than 500° C. The deposited carbon film is exposed to electromagnetic radiation for a period less than 10 ms, and has an extinction coefficient greater than 0.3 at a wavelength comprised by the electromagnetic radiation.
摘要翻译：公开了用于激活掺杂半导体衬底中的掺杂剂的方法。碳前体流入其中设置掺杂半导体衬底的衬底处理室。在基板处理室中由碳前体形成等离子体。用等离子体沉积在衬底上的碳膜。在沉积低于500℃的碳膜的同时保持基板的温度。沉积的碳膜暴露于电磁辐射小于10ms的时间段，并且在电磁波包括的波长处具有大于0.3的消光系数辐射。

10. 发明申请

US20070054504A1 Post deposition plasma treatment to increase tensile stress of HDP-CVD SIO2 失效
标题翻译：后沉积等离子体处理以增加HDP-CVD SIO2的拉伸应力
公开(公告)号：US20070054504A1
公开(公告)日：2007-03-08
申请号：US11221303
申请日：2005-09-07
申请人： Xiaolin Chen , Srinivas Nemani , DongQing Li , Jeffrey Munro , Marlon Menezes
发明人： Xiaolin Chen , Srinivas Nemani , DongQing Li , Jeffrey Munro , Marlon Menezes
IPC分类号： H01L21/31
CPC分类号： H01L21/3105 , C23C16/402 , C23C16/56 , H01L21/02164 , H01L21/02274 , H01L21/0234 , H01L21/31612
摘要： A plasma treatment process for increasing the tensile stress of a silicon wafer is described. Following deposition of a dielectric layer on a substrate, the substrate is lifted to an elevated position above the substrate receiving surface and exposed to a plasma treatment process which treats both the top and bottom surface of the wafer and increases the tensile stress of the deposited layer. Another embodiment of the invention involves biasing of the substrate prior to plasma treatment to bombard the wafer with plasma ions and raise the temperature of the substrate. In another embodiment of the invention, a two-step plasma treatment process can be used where the substrate is first exposed to a plasma at a processing position directly after deposition, and then raised to an elevated position where both the top and bottom of the wafer are exposed to the plasma.
摘要翻译：描述了用于增加硅晶片的拉伸应力的等离子体处理工艺。在基底上沉积介电层之后，将衬底提升到衬底接收表面上方的升高位置，并暴露于等离子体处理工艺，其处理晶片的顶表面和底表面并增加沉积层的拉伸应力。本发明的另一实施例涉及在等离子体处理之前偏压衬底以用等离子体离子轰击晶片并提高衬底的温度。在本发明的另一个实施例中，可以使用两步等离子体处理工艺，其中首先在沉积后直接在处理位置处暴露于等离子体，然后升高到晶片的顶部和底部两者的升高位置暴露于等离子体。

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