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1. 发明申请

US20080124883A1 SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE 审中-公开
公开(公告)号：US20080124883A1
公开(公告)日：2008-05-29
申请号：US11941452
申请日：2007-11-16
申请人： Douglas D. COOLBAUGH , Alvin J. Joseph , Seong-dong Kim , Louis D. Laozerotti , Xuefeng Liu , Robert M. Rassel
发明人： Douglas D. COOLBAUGH , Alvin J. Joseph , Seong-dong Kim , Louis D. Laozerotti , Xuefeng Liu , Robert M. Rassel
IPC分类号： H01L21/8222
CPC分类号： H01L27/0814 , H01L27/0664 , H01L27/0823 , H01L29/0821 , H01L29/7371 , H01L29/868
摘要： A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.

2. 发明授权

US08022496B2 Semiconductor structure and method of manufacture 有权
标题翻译：半导体结构及制造方法
公开(公告)号：US08022496B2
公开(公告)日：2011-09-20
申请号：US11873696
申请日：2007-10-17
申请人： Douglas D. Coolbaugh , Alvin J. Joseph , Seong-dong Kim , Louis D. Lanzerotti , Xuefeng Liu , Robert M. Rassel
发明人： Douglas D. Coolbaugh , Alvin J. Joseph , Seong-dong Kim , Louis D. Lanzerotti , Xuefeng Liu , Robert M. Rassel
IPC分类号： H01L29/47
CPC分类号： H01L27/0814 , H01L27/0664 , H01L27/0823 , H01L29/0821 , H01L29/7371 , H01L29/868
摘要： A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.
摘要翻译：一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。还可以设想一种方法，其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。第二掺杂区形成在与第一掺杂区不同的深度。该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。

3. 发明授权

US07329940B2 Semiconductor structure and method of manufacture 有权
标题翻译：半导体结构及制造方法
公开(公告)号：US07329940B2
公开(公告)日：2008-02-12
申请号：US11163882
申请日：2005-11-02
申请人： Douglas D. Coolbaugh , Alvin J. Joseph , Seong-dong Kim , Louis D. Lanzerotti , Xuefeng Liu , Robert M. Rassel
发明人： Douglas D. Coolbaugh , Alvin J. Joseph , Seong-dong Kim , Louis D. Lanzerotti , Xuefeng Liu , Robert M. Rassel
IPC分类号： H01L27/082
CPC分类号： H01L27/0814 , H01L27/0664 , H01L27/0823 , H01L29/0821 , H01L29/7371 , H01L29/868
摘要： A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.
摘要翻译：一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。还可以设想一种方法，其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。第二掺杂区形成在与第一掺杂区不同的深度。该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。

4. 发明申请

US20070096257A1 SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US20070096257A1
公开(公告)日：2007-05-03
申请号：US11163882
申请日：2005-11-02
申请人： Douglas Coolbaugh , Alvin Joseph , Seong-dong Kim , Louis Lanzerotti , Xuefeng Liu , Robert Rassel
发明人： Douglas Coolbaugh , Alvin Joseph , Seong-dong Kim , Louis Lanzerotti , Xuefeng Liu , Robert Rassel
IPC分类号： H01L27/102
CPC分类号： H01L27/0814 , H01L27/0664 , H01L27/0823 , H01L29/0821 , H01L29/7371 , H01L29/868
摘要： A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.
摘要翻译：一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。还可以设想一种方法，其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。第二掺杂区形成在与第一掺杂区不同的深度。该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。

5. 发明申请

US20080099787A1 SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US20080099787A1
公开(公告)日：2008-05-01
申请号：US11873696
申请日：2007-10-17
申请人： Douglas Coolbaugh , Alvin Joseph , Seong-dong Kim , Louis Lanzerotti , Xuefeng Liu , Robert Rassel
发明人： Douglas Coolbaugh , Alvin Joseph , Seong-dong Kim , Louis Lanzerotti , Xuefeng Liu , Robert Rassel
IPC分类号： H01L27/06
CPC分类号： H01L27/0814 , H01L27/0664 , H01L27/0823 , H01L29/0821 , H01L29/7371 , H01L29/868
摘要： A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.
摘要翻译：一种结构包括具有形成在具有第一厚度的第一区域中的第一子集电极的单晶片和形成在具有不同于第一厚度的第二厚度的第二区域中的第二子集电极。还可以设想一种方法，其包括提供包括第一层并在第一层中形成第一掺杂区的衬底。该方法还包括在第一层上形成第二层并在第二层中形成第二掺杂区域。第二掺杂区形成在与第一掺杂区不同的深度。该方法还包括在第一层中形成第一通道并在第二层中形成第二通道以将第一通道连接到表面。

6. 发明申请

US20100197124A1 Methods of Forming Semiconductor Devices Using Plasma Dehydrogenation and Devices Formed Thereby 审中-公开
标题翻译：使用等离子体脱氢形成半导体器件的方法和由此形成的器件
公开(公告)号：US20100197124A1
公开(公告)日：2010-08-05
申请号：US12363980
申请日：2009-02-02
申请人： Yong-kuk Jeong , Dong-hee Yu , Jong-ho Yang , Seong-dong Kim
发明人： Yong-kuk Jeong , Dong-hee Yu , Jong-ho Yang , Seong-dong Kim
IPC分类号： H01L21/426 , H01L21/4763
CPC分类号： H01L29/6656 , H01L21/3105 , H01L29/6659 , H01L29/7833
摘要： A semiconductor integrated circuit device with enhanced reliability is provided. The semiconductor integrated circuit device includes a semiconductor substrate; a gate insulation film that is provided on the semiconductor substrate; a gate electrode that is provided on the gate insulation film; and a sidewall spacer that is provided on side walls of the gate insulation film and the gate electrode and includes, wherein the sidewall spacer has a first sidewall spacer in contact with the gate electrode and a second sidewall spacer formed on the side walls of the first sidewall spacer, and a ratio of an Si—OH area to an Si—O area in at least one of the first and second sidewall spacers is 0.05 or less, as measured by Fourier Transform InfraRed (FTIR).
摘要翻译：提供了具有增强的可靠性的半导体集成电路器件。半导体集成电路器件包括半导体衬底; 设置在所述半导体基板上的栅极绝缘膜; 设置在栅极绝缘膜上的栅电极; 以及设置在所述栅极绝缘膜和所述栅电极的侧壁上的侧壁间隔件，并且包括所述侧壁间隔件具有与所述栅电极接触的第一侧壁间隔件和形成在所述第一栅极绝缘膜的侧壁上的第二侧壁间隔件并且通过傅里叶变换红外（FTIR）测量，第一和第二侧壁间隔物中的至少一个中的Si-OH面积与Si-O面积的比例为0.05以下。

7. 发明授权

US06633318B1 Screen saver having message management function and method therefor 失效
标题翻译：具有消息管理功能的屏幕保护程序及其方法
公开(公告)号：US06633318B1
公开(公告)日：2003-10-14
申请号：US09219876
申请日：1998-12-24
申请人： Young-jun Kim , Seong-dong Kim
发明人： Young-jun Kim , Seong-dong Kim
IPC分类号： G09G500
CPC分类号： G06Q10/10 , G09G5/00 , G09G2320/046
摘要： A screen saver having a function of managing a message for a computer system user, created by another user, and a method therefor are provided. The screen saver includes a screen saving portion for monitoring a state of a screen output to a display device provided in the computer system, an event detector for detecting an event input from an input device provided in the computer system, a password input portion for receiving a password from the user if the event detector detects the event, displaying the screen displayed immediately before the screen state is changed into the screen saving state if the password received from the user is identical with a prestored password, and changing the screen state into the screen saving state if not, and a message input portion for receiving a message from the user if the event detector detects an event, storing the message in a storage means provided in the computer system, and changing the screen state into a screen saving state. Therefore, when the computer system is in a screen protection mode and even when the user password of the user of the computer system is not known, another person can inform the user of a useful message using the computer system.
摘要翻译：提供了具有管理由另一用户创建的计算机系统用户的消息的功能的屏幕保护程序及其方法。屏幕保护器包括用于监视输出到设置在计算机系统中的显示装置的屏幕的状态的屏幕保存部分，用于检测从设置在计算机系统中的输入装置输入的事件的事件检测器，用于接收的密码输入部分如果事件检测器检测到事件，则来自用户的密码，如果从用户接收的密码与预存的密码相同，则将屏幕状态之前立即显示的屏幕显示为屏幕保存状态，并且将屏幕状态改变为如果不是，则屏幕保存状态;以及消息输入部分，用于如果事件检测器检测到事件，则从用户接收消息，将消息存储在设置在计算机系统中的存储装置中，并将屏幕状态改变为屏幕保存状态。因此，当计算机系统处于屏幕保护模式时，即使当计算机系统的用户的用户密码不知道时，另一个人可以使用计算机系统向用户通知有用的消息。

8. 发明申请

US20080157118A1 INTEGRATED CIRCUIT SYSTEM EMPLOYING STRAINED TECHNOLOGY 审中-公开
标题翻译：集成电路系统应用应变技术
公开(公告)号：US20080157118A1
公开(公告)日：2008-07-03
申请号：US11618453
申请日：2006-12-29
申请人： Jae Gon Lee , Lee Wee Teo , Seong-dong Kim
发明人： Jae Gon Lee , Lee Wee Teo , Seong-dong Kim
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L27/092 , H01L21/823807 , H01L21/823814 , H01L29/66636 , H01L29/7834 , H01L29/7843 , H01L29/7848
摘要： An integrated circuit system that includes: providing a substrate with a PMOS device and an NMOS device; forming an NMOS shallow recess within the substrate; forming a PMOS recess within the substrate; forming a strain inducing layer over the PMOS recess; forming a first dielectric layer over the NMOS device and a second dielectric layer over the PMOS device.
摘要翻译：一种集成电路系统，包括：提供具有PMOS器件和NMOS器件的衬底; 在衬底内形成NMOS浅凹槽; 在衬底内形成PMOS凹槽; 在所述PMOS凹部上形成应变诱导层; 在所述NMOS器件上形成第一电介质层，并且在所述PMOS器件上形成第二电介质层。

9. 发明授权

US6128719A Indirect rotator graph network 失效
标题翻译：间接旋转图形网络
公开(公告)号：US6128719A
公开(公告)日：2000-10-03
申请号：US157584
申请日：1998-09-21
申请人： Seong-dong Kim
发明人： Seong-dong Kim
IPC分类号： G06F15/16 , G06F15/173 , G06F15/80 , G06F17/16 , G06F15/00
CPC分类号： G06F15/17368
摘要： An interconnection network used for a multiprocessor system. An indirect n-dimensional rotator graph network having a transmission path of arbitrary nodes in a multiprocessor system including n! nodes includes n! input ports, n! output ports, a first stage switch module including n! demultiplexers, second through (n-1)th stage switch modules each having n! n.times.n crossbar switches, and an nth stage switch module including n! multiplexers, in which the switches or the demultiplexers composing switch modules of first to (n-1)th stages comprise n generators g.sub.1, g.sub.2, . . . , g.sub.n, the g.sub.1 is connected to a switch or multiplexer of a later stage having an identifier identical to that of a demultiplexer or switch, to which the g.sub.1 is included, and the g.sub.i (2.ltoreq.i.ltoreq.n) is connected to a switch or multiplexer of a later stage having an identifier identical to the identifier obtained by rotating the first (n-i+2) symbols of the identifier of the switch or the demultiplexer to which the g.sub.i is included to the left. Accordingly, when the number of nodes is equal in indirect networks, a network according to the present invention, may have the transmission stage shorter than other networks. Thus, the tag required for routing is reduced, to thereby increase a message transmission efficiency rate.
摘要翻译：用于多处理器系统的互连网络。一种间接n维旋转图形网络，其具有包括n个多处理器系统中的任意节点的传输路径。节点包括n！输入端口，n！输出端口，第一级开关模块包括n！解复用器，第二至第（n-1）级开关模块，每个具有n！ nxn交叉开关和第n级开关模块，包括n！多路复用器，其中构成第一至第（n-1）级的开关模块的开关或多路复用器包括n个发生器g1，g2，...。。。 gn，g1连接到具有与解复用器或开关的标识符相同的标识符的后级的开关或多路复用器，g1被包括在其中，并且gi（2≤n≤n）是连接到具有与通过旋转开关的标识符的第一（n-i + 2）个符号或其中包含gi的多路分解器获得的标识符相同的标识符的标识符的后一级的开关或多路复用器。因此，当间接网络中的节点数量相等时，根据本发明的网络可以具有比其他网络短的传输级。因此，路由所需的标签被减少，从而增加消息传输效率。

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